JP2527016B2 - Method for manufacturing semiconductor film - Google Patents
Method for manufacturing semiconductor filmInfo
- Publication number
- JP2527016B2 JP2527016B2 JP63285420A JP28542088A JP2527016B2 JP 2527016 B2 JP2527016 B2 JP 2527016B2 JP 63285420 A JP63285420 A JP 63285420A JP 28542088 A JP28542088 A JP 28542088A JP 2527016 B2 JP2527016 B2 JP 2527016B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- sio
- polycrystalline
- opening
- selectively
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体膜の製造方法に関するものである。TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor film.
従来から用いられてきた半導体膜の製造方法では、Si
O2膜を所定の部分に形成し所定の領域の半導体層を露出
した部分にのみ選択的にエピタキシャル成長を行い、さ
らにSiO2膜上へ横方向に過剰成長を行う方法が知られて
いる(J.Appl.Phys.55(2)15,January 1984,p.519,Co
ntrol of lateral epitaxial chemical vapor depositi
on of silicon over insulators)。In the conventional method of manufacturing a semiconductor film,
A method is known in which an O 2 film is formed in a predetermined portion, and epitaxial growth is selectively performed only in a portion where a semiconductor layer in a predetermined region is exposed, and overgrowth is laterally formed on a SiO 2 film (J .Appl.Phys.55 (2) 15, January 1984, p.519, Co
ntrol of lateral epitaxial chemical vapor depositi
on of silicon over insulators).
従来の技術では基板表面に形成した非晶質絶縁膜上へ
過剰成長を行って横方向へ半導体を形成してSOI(Semic
onductor On Insulator)の構造を得る場合、不必要な
縦方向へも成長が進行するため薄い成長膜を得ることが
できない。In the conventional technology, over-growth is performed on the amorphous insulating film formed on the substrate surface to form a semiconductor in the lateral direction, and SOI (Semic
When obtaining an on-ductor-on-insulator structure, a thin growth film cannot be obtained because the growth progresses in the unnecessary vertical direction.
本発明の目的は、この問題を解決した半導体膜の製造
方法を提供することにある。An object of the present invention is to provide a method for manufacturing a semiconductor film that solves this problem.
上記目的を達成するために、本発明は、p型シリコン
基板上に第1のSiO2膜を形成したのち、前記p型シリコ
ン基板を露出する第1の開口部を形成し、この第1の開
口部のみに選択的に第1のエピタキシャル成長Si膜の成
長を行い、第1のSiO2膜と第1のエピタキシャル成長Si
膜上へ多結晶Si膜を堆積し、空洞部領域確保を行い、こ
の多結晶Si膜上へ第2のSiO2膜を形成し、この第2のSi
O2膜に前記多結晶Si膜が露出するように第2の開口部を
形成し、第1,第2のSiO2膜に挟まれた前記多結晶Si膜を
第2の開口部から選択的にエッチングを行い空洞部を形
成し、この空洞部に選択的に第2のエピタキシャル成長
Si膜を横方向に成長させるようにしたものである。In order to achieve the above object, the present invention forms a first SiO 2 film on a p-type silicon substrate and then forms a first opening exposing the p-type silicon substrate. The first epitaxially grown Si film is selectively grown only in the opening, and the first SiO 2 film and the first epitaxially grown Si film are grown.
A polycrystalline Si film is deposited on the film to secure a cavity region, and a second SiO 2 film is formed on the polycrystalline Si film.
A second opening is formed in the O 2 film so that the polycrystalline Si film is exposed, and the polycrystalline Si film sandwiched between the first and second SiO 2 films is selectively removed from the second opening. Etching is performed to form a cavity, and the second epitaxial growth is selectively performed in this cavity.
The Si film is grown laterally.
従来の半導体膜を製造する技術では、縦方向に必要以
上に成長し薄い成長膜を得ることができない。これは原
料ガス濃度分布が縦横両方ともほぼ同じ濃度の条件で成
長が行われるためで、結晶の成長速度の面方位依存性が
生じている。この結果、縦と横との成長面を異なる面と
して選んだ場合でも、各面の成長速度の比が縦横比と同
じ値となって、それ以上大きな縦横比は得られなくな
る。With the conventional technique for manufacturing a semiconductor film, it is impossible to obtain a thin grown film by growing more than necessary in the vertical direction. This is because the growth is performed under the condition that the source gas concentration distribution is substantially the same in both the vertical and horizontal directions, and the crystal growth rate is dependent on the plane orientation. As a result, even when the vertical and horizontal growth planes are selected as different planes, the growth rate ratio of each plane becomes the same value as the aspect ratio, and a larger aspect ratio cannot be obtained.
これに対し本発明では、あらかじめ設定した縦横比を
有する空洞部分を形成することによって、その空洞部分
にのみ選択的にエピタキシャル成長を行うことにより、
必要な縦横比の膜厚の半導体膜の成長を行うことを可能
にしている。On the other hand, in the present invention, by forming a cavity portion having a preset aspect ratio, by selectively performing epitaxial growth only in the cavity portion,
This makes it possible to grow a semiconductor film having a required aspect ratio.
以下、この発明の実施例を模式図を用いて説明する。
第1図は実施例の工程段階を示す断面模式図である。Embodiments of the present invention will be described below with reference to schematic diagrams.
FIG. 1 is a schematic sectional view showing a process step of an example.
第1図(a)に示すように、p型シリコン基板12の表
面に第1のSiO2膜14を酸化温度950℃,ウェット酸化に
よって〜5000Å形成する。As shown in FIG. 1 (a), a first SiO 2 film 14 is formed on the surface of the p-type silicon substrate 12 by wet oxidation at an oxidation temperature of 950 ° C. up to 5000 Å.
つぎに第1図(b)に示すように、リソグラフィ技術
によって第1のSiO2膜14に第1の開口部15を形成し、p
型シリコン基板12を露出させ、第1の開口部15にのみ選
択的に第1のエピタキシャル成長Si膜13を、成長温度85
0℃,SiH2Cl2流量300cc/min,HCl流量500cc/min,圧力30T
orrで成長させる。Next, as shown in FIG. 1 (b), a first opening 15 is formed in the first SiO 2 film 14 by a lithography technique, and p
The type silicon substrate 12 is exposed, and the first epitaxially grown Si film 13 is selectively formed only at the first opening 15 at a growth temperature of 85.
0 ℃, SiH 2 Cl 2 flow rate 300cc / min, HCl flow rate 500cc / min, pressure 30T
Grow with orr.
つぎに第1図(c)に示すように、多結晶Si膜17を基
板温度600℃,SiH4流量150cc/min,圧力1Torrの条件で〜
3000Å堆積して、リソグラフィ技術によって必要とする
横方向の大きさに多結晶Si膜17を島状に形成する。Next, as shown in FIG. 1 (c), the polycrystalline Si film 17 was formed under the conditions of a substrate temperature of 600 ° C., a SiH 4 flow rate of 150 cc / min, and a pressure of 1 Torr.
3000 Å is deposited, and a polycrystalline Si film 17 is formed in an island shape in a required lateral size by a lithography technique.
つぎに第1図(d)に示すように、多結晶Si膜17を含
む基板全面に第2のSiO2膜19を堆積し、リソグラフィ技
術によって第2のSiO2膜19に第2の開口部21を形成し、
基板温度850℃,HCl流量500cc/min,圧力30Torrで多結晶S
i膜17のみ選択的にガスエッチングを行いあらかじめ設
定した縦横比の空洞部分23を形成する。Next, as shown in FIG. 1 (d), the second SiO 2 film 19 is deposited on the entire surface of the substrate including the polycrystalline Si film 17, a second opening in the second SiO 2 film 19 by lithography Forming 21,
Polycrystalline S at substrate temperature 850 ℃, HCl flow rate 500cc / min, pressure 30Torr
Only the i film 17 is selectively gas-etched to form a cavity portion 23 having a preset aspect ratio.
つぎに第1図(e)に示すように、空洞部分23に選択
的に横方向の第2のエピタキシャル成長Si膜25を成長温
度850℃,SiH2Cl2流量300cc/min,HCl流量500cc/min,圧
力30Torrで成長させる。Next, as shown in FIG. 1 (e), a lateral second epitaxial growth Si film 25 is selectively formed in the cavity 23 at a growth temperature of 850 ° C., a SiH 2 Cl 2 flow rate of 300 cc / min, and an HCl flow rate of 500 cc / min. Grow at a pressure of 30 Torr.
最後に第1図(f)に示すように、第2のSiO2膜19を
剥離すると薄くて所望の面積を有するSi膜を形成するこ
とができる。Finally, as shown in FIG. 1 (f), the second SiO 2 film 19 is peeled off to form a thin Si film having a desired area.
以上の実施例において空洞部を形成する方法として、
ガスエッチングを利用したが、多結晶膜のみ選択的にエ
ッチングすることができるような他の方法(たとえばウ
ェットエッチング等)によっても形成することが可能な
ことはいうまでもない。As a method of forming the cavity in the above embodiment,
Although gas etching is used, it goes without saying that it can also be formed by another method capable of selectively etching only a polycrystalline film (for example, wet etching).
本発明を適用するならば、酸化膜上へ必要な膜厚の単
結晶半導体膜を形成することが可能となる。If the present invention is applied, it becomes possible to form a single crystal semiconductor film having a required film thickness on an oxide film.
第1図は本発明の一実施例による半導体膜の作成工程を
示した断面模式図である。 12……p型シリコン基板 13……第1のエピタキシャル成長Si膜 14……第1のSiO2膜 15……第1の開口部 17……多結晶Si膜 19……第2のSiO2膜 21……第2の開口部 23……空洞部分 25……第2のエピタキシャル成長Si膜FIG. 1 is a schematic sectional view showing a process of forming a semiconductor film according to an embodiment of the present invention. 12 …… p-type silicon substrate 13 …… first epitaxially grown Si film 14 …… first SiO 2 film 15 …… first opening 17 …… polycrystalline Si film 19 …… second SiO 2 film 21 …… Second opening 23 …… Cavity 25 …… Second epitaxially grown Si film
Claims (1)
したのち、前記p型シリコン基板を露出する第1の開口
部を形成し、この第1の開口部のみに選択的に第1のエ
ピタキシャル成長Si膜の成長を行い、第1のSiO2膜と第
1のエピタキシャル成長Si膜上へ多結晶Si膜を堆積し、
空洞部領域確保を行い、この多結晶Si膜上へ第2のSiO2
膜を形成し、この第2のSiO2膜に前記多結晶Si膜が露出
するように第2の開口部を形成し、第1,第2のSiO2膜に
挟まれた前記多結晶Si膜を第2の開口部から選択的にエ
ッチングを行い空洞部を形成し、この空洞部に選択的に
第2のエピタキシャル成長Si膜を横方向に成長させるこ
とを特徴とする半導体膜の製造方法。1. A first SiO 2 film is formed on a p-type silicon substrate, and then a first opening is formed to expose the p-type silicon substrate, and only the first opening is selectively formed. Growing a first epitaxially grown Si film, depositing a polycrystalline Si film on the first SiO 2 film and the first epitaxially grown Si film,
The cavity area is secured, and the second SiO 2 is deposited on this polycrystalline Si film.
Film is formed, the said the second SiO 2 film as a polycrystalline Si film is exposed to form a second opening, the first, the polycrystalline Si film sandwiched between the second SiO 2 film Is selectively etched from the second opening to form a cavity, and the second epitaxially grown Si film is selectively grown in the cavity in the lateral direction.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63285420A JP2527016B2 (en) | 1988-11-11 | 1988-11-11 | Method for manufacturing semiconductor film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63285420A JP2527016B2 (en) | 1988-11-11 | 1988-11-11 | Method for manufacturing semiconductor film |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH02130917A JPH02130917A (en) | 1990-05-18 |
JP2527016B2 true JP2527016B2 (en) | 1996-08-21 |
Family
ID=17691290
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63285420A Expired - Lifetime JP2527016B2 (en) | 1988-11-11 | 1988-11-11 | Method for manufacturing semiconductor film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2527016B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100695144B1 (en) * | 2004-12-01 | 2007-03-14 | 삼성전자주식회사 | Single crystal substrate and fabrication method thereof |
WO2023276107A1 (en) * | 2021-07-01 | 2023-01-05 | 日本電信電話株式会社 | Method for forming semiconductor layer |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0666257B2 (en) * | 1986-08-20 | 1994-08-24 | 日本電気株式会社 | Method for manufacturing semiconductor film |
FR2629637B1 (en) * | 1988-04-05 | 1990-11-16 | Thomson Csf | METHOD FOR PRODUCING AN ALTERNATION OF LAYERS OF SINGLE-CRYSTAL SEMICONDUCTOR MATERIAL AND LAYERS OF INSULATING MATERIAL |
-
1988
- 1988-11-11 JP JP63285420A patent/JP2527016B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH02130917A (en) | 1990-05-18 |
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