JPH0474428U - - Google Patents

Info

Publication number
JPH0474428U
JPH0474428U JP11791790U JP11791790U JPH0474428U JP H0474428 U JPH0474428 U JP H0474428U JP 11791790 U JP11791790 U JP 11791790U JP 11791790 U JP11791790 U JP 11791790U JP H0474428 U JPH0474428 U JP H0474428U
Authority
JP
Japan
Prior art keywords
insulating substrate
matching capacitor
transistor chip
metal wires
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11791790U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11791790U priority Critical patent/JPH0474428U/ja
Publication of JPH0474428U publication Critical patent/JPH0474428U/ja
Pending legal-status Critical Current

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  • Bipolar Transistors (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例である半導体装置
のトランジスタ搭載部を示す平面図、第2図は従
来の場合を示した半導体装置の平面図、第3図は
第1図および第2図の等価回路の回路図である。 図において、1はトランジスタチツプ、2は整
合用キヤパシタ、21,22は整合用キヤパシタ
電極、31〜33は接続ワイヤ、41〜43はメ
タライズパターン、5はベース電極、6はエミツ
タ電極を示す。なお、図中、同一符号は同一、ま
たは相当部分を示す。
FIG. 1 is a plan view showing a transistor mounting part of a semiconductor device that is an embodiment of this invention, FIG. 2 is a plan view of a conventional semiconductor device, and FIG. It is a circuit diagram of the equivalent circuit of. In the figure, 1 is a transistor chip, 2 is a matching capacitor, 21 and 22 are matching capacitor electrodes, 31 to 33 are connection wires, 41 to 43 are metallized patterns, 5 is a base electrode, and 6 is an emitter electrode. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 絶縁基板上に回路が形成された半導体集積回路
装置において、トランジスタチツプと整合用キヤ
パシタと絶縁基板上導体パターンとの金属ワイヤ
による接続に、信号入力側の整合用キヤパシタと
絶縁基板上とを接続する金属ワイヤ数を、トラン
ジスタチツプと整合用キヤパシタとを接続する金
属ワイヤ数よりも多くしたことを特徴とする半導
体装置。
In a semiconductor integrated circuit device in which a circuit is formed on an insulating substrate, the matching capacitor on the signal input side and the insulating substrate are connected to the metal wire connection between the transistor chip, the matching capacitor, and the conductor pattern on the insulating substrate. A semiconductor device characterized in that the number of metal wires is greater than the number of metal wires connecting a transistor chip and a matching capacitor.
JP11791790U 1990-11-07 1990-11-07 Pending JPH0474428U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11791790U JPH0474428U (en) 1990-11-07 1990-11-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11791790U JPH0474428U (en) 1990-11-07 1990-11-07

Publications (1)

Publication Number Publication Date
JPH0474428U true JPH0474428U (en) 1992-06-30

Family

ID=31865815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11791790U Pending JPH0474428U (en) 1990-11-07 1990-11-07

Country Status (1)

Country Link
JP (1) JPH0474428U (en)

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