JPH04717A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To reduce an area in a part required for a contact and to simplify a production process by a method wherein a conductive material is formed in a self-aligned manner with reference to a contact hole and is connected to two conductive parts via it. CONSTITUTION:Barrier metal films 17a and 17b are formed, by a sputtering method, on the exposed surface of a source diffusion layer 15 and on the surface of a photoresist pattern 18. At this time, since the thickness of the barrier metal films is extremely thin as compared with the thickness of the photoresist pattern 18, no barrier film is formed on side faces of the photoresist pattern 18. Then, the photoresist pattern 18 is removed by using an organic solvent or the like. At this time, the barrier metal film 17b which has been formed on the surface of the photoresist pattern 18 is removed simultaneously. As a result, a barrier metal layer 17 is formed on the exposed surface of the source diffusion layer 15, i.e. only on the bottom of a contact hole. Then, aluminum or an aluminum alloy is deposited; it is patterned to a prescribed shape; an interconnection layer 16 coming into contact with the surface of the barrier metal layer 17 is formed.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a semiconductor device and a method for manufacturing the same. [Prior Art] In a flat conductor integrated circuit, two conductive parts formed above and below an insulating layer are usually connected through a contact hole. However, depending on the combination of materials forming the two conductive parts, poor contact may occur due to adhesion problems, mutual reaction problems, etc. To solve this problem of contact failure, it has conventionally been done to connect two conductive parts by interposing another conductive material between them. Figures 2 and 3 show an example of the conventional connection method described above.
This figure shows the vicinity of the source of the transistor. 31 is a silicon substrate, 32 is a gate insulating layer, 33 is a gate electrode,
34 is an interlayer insulating layer, 35 is a source diffusion layer, and 36 is an aluminum wiring layer. If the source diffusion layer 35 and the aluminum wiring layer 36 are directly connected, silicon and aluminum will react and cause leakage and conduction failure. The source diffusion layer 35 and the aluminum wiring layer 36 are connected through the barrier metal layer 3. [Problems to be Solved] The conventional example shown in FIG. 2 had the following problems. The barrier metal layer 37 must be patterned to be larger in circumference than the contact hole in consideration of pattern misalignment. Therefore, the aluminum wiring layer 36 has a pattern that is twice as large as the contact hole, resulting in an increase in the area required for the contact. Additionally, an extra mid-mask is required to form the barrier metal layer 37, resulting in an increase in the number of steps. On the other hand, the conventional example shown in FIG. 1@3 does not have the problem of an increase in the area of the contact portion or the problem of an increase in the number of steps. However, since the ends of the barrier metal layer 37 are exposed, there is a problem in that an electrode reaction occurs between the aluminum wiring layer 36 and the barrier metal layer 3 due to adsorption of moisture, resulting in corrosion. The above-mentioned points r, , 'l Ii are not limited to the above-mentioned conventional example, and similar problems occur when two conductive parts are connected via a conductive material formed in a contact hole part. The object of the present invention is to reduce the area required for the contact and to simplify the manufacturing process. The purpose of N2 in the present invention is to prevent electrode reactions and suppress the occurrence of corrosion. [Means for Solving the Problems] According to the present invention, a conductive material is formed in a self-aligned manner with respect to a contact hole, and two conductive parts are connected through the conductive material. [Example] Hereinafter, the present invention will be described in detail based on the accompanying drawings. Figures 1 (A) to (D) show the manufacturing process of the example, and the MO
5 shows the vicinity of the source of the MO5 type transistor in the product circuit of type 5. 11 is a silicon substrate, 12 is a gate insulating layer (several tens of nanometers thick) formed by thermal oxidation, 13 is a gate electrode, and 14 is an interlayer insulating layer (several tens of nanometers thick) formed using silicon oxide.
The thickness is several hundred nanometers). 15 is I! This is a source diffusion layer that becomes a conductive part of No. 1. Reference numeral 16 denotes a wiring layer serving as a third conductive portion, and is formed using aluminum or an aluminum alloy. 17 is a barrier metal layer (thickness of several nanometers and several tens of nanometers) which becomes the second conductive part.
The source diffusion layer IS is formed using titanium, tungsten, or titanium nitride (TIN).
and the aluminum wiring layer 16. This barrier metal layer 17 is formed in a self-aligned manner with respect to the contact hole 19. 18 is a photoresist pattern (thickness 1000 nanometers). Next, the manufacturing process will be explained according to FIGS. 1(A) to 1(D). Step (A): After sequentially forming gate insulating layer 12, gate electrode 13, and source diffusion layer 15 on the main surface side of silicon substrate 11, glabellar insulating layer 14 is formed. A photoresist pattern 18 having an opening pattern is formed on this glabellar insulating layer 14. This photoresist pattern 1
8 as a mask, interlayer insulating layer 14 and gate insulating layer 1
2 to form a contact hole 19,
The surface of the source diffusion layer 150 is exposed. Step ff1 (B): Form barrier metal films 17m and 17b on the exposed surface of the source diffusion layer 15 and the surface of the photoresist pattern 18 by sputtering. Since the thickness of the barrier metal film is extremely thin, no barrier metal film is formed on the side surfaces of the photoresist pattern 18. Step (C): The photoresist pattern 18 is removed using an organic solvent or the like. At this time, the barrier metal film 17b formed on the surface of the photoresist pattern 18 is also removed at the same time. As a result, the pariah layer 17 is formed only on the exposed surface of the source diffusion layer 15, that is, on the bottom of the contact hole. Engineering 1. (D) Nialuminum or aluminum alloy is deposited and patterned into a predetermined shape to form the wiring layer 16 in contact with the surface of the barrier metal layer 17. Note that the present invention is not limited to the above-mentioned embodiments, but can be applied when it is necessary to interpose another conductive material when connecting two conductive parts through a contact hole. For example, in a MOS integrated circuit with a multilayer wiring structure, lower layer wiring (wiring using polysilicon, silicide, etc.) and upper layer wiring (wiring using aluminum, aluminum alloy, etc.) are connected through contact holes. In this case, a barrier metal layer can be formed on the exposed surface of the underlying wiring using a method similar to that described in the above embodiment.

【effect】

In the present invention, the conductive material is formed in a self-aligned manner with respect to the contact hole, and two conductive parts are connected through this, so the area required for the contact can be reduced and electrode reactions can be prevented. This can prevent corrosion from occurring. Further, by using the manufacturing method of the present invention, the manufacturing process can be simplified.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing the manufacturing process of an embodiment of the present invention, and FIGS. 2 and 3 are sectional views showing a conventional example. 15...First conductive part 16...' IM3 conductive part 17...Second conductive part or higher

Claims (2)

[Claims] (1) an insulating layer formed on the main surface side of a semiconductor substrate and having a contact hole; a first conductive part formed under the contact hole; and a first conductive part formed inside the contact hole. a second conductive part in contact with a surface of the contact hole; and a third conductive part in contact with a surface of the second conductive part, the second conductive part being formed in self-alignment with the contact hole. Semiconductor devices that are manufactured by (2) forming an insulating layer on the main surface side of the semiconductor substrate on which the first conductive part is formed; forming a photoresist pattern having an opening pattern on the insulating layer; etching the insulating layer as a mask to form a contact hole and exposing the surface of the first conductive part; etching a second conductive part on the exposed surface of the first conductive part and the surface of the photoresist pattern; forming a film that will become a conductive part; and removing the photoresist pattern on which the film that will become the second conductive part is formed to form a second conductive part on the exposed surface of the first conductive part. A method for manufacturing a semiconductor device, comprising: a step of forming a third conductive portion in contact with a surface of the second conductive portion.