JPH04677B2 - - Google Patents

Info

Publication number
JPH04677B2
JPH04677B2 JP8938689A JP8938689A JPH04677B2 JP H04677 B2 JPH04677 B2 JP H04677B2 JP 8938689 A JP8938689 A JP 8938689A JP 8938689 A JP8938689 A JP 8938689A JP H04677 B2 JPH04677 B2 JP H04677B2
Authority
JP
Japan
Prior art keywords
opening
ball
winning ball
closing
winning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP8938689A
Other languages
English (en)
Japanese (ja)
Other versions
JPH01303170A (ja
Inventor
Shiro Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sankyo Co Ltd
Original Assignee
Sankyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sankyo Co Ltd filed Critical Sankyo Co Ltd
Priority to JP8938689A priority Critical patent/JPH01303170A/ja
Publication of JPH01303170A publication Critical patent/JPH01303170A/ja
Publication of JPH04677B2 publication Critical patent/JPH04677B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Pinball Game Machines (AREA)
JP8938689A 1989-04-07 1989-04-07 弾球遊技機 Granted JPH01303170A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8938689A JPH01303170A (ja) 1989-04-07 1989-04-07 弾球遊技機

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8938689A JPH01303170A (ja) 1989-04-07 1989-04-07 弾球遊技機

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP5846682A Division JPH0232903B2 (ja) 1982-04-07 1982-04-07 Dankyujugiki

Publications (2)

Publication Number Publication Date
JPH01303170A JPH01303170A (ja) 1989-12-07
JPH04677B2 true JPH04677B2 (enrdf_load_stackoverflow) 1992-01-08

Family

ID=13969227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8938689A Granted JPH01303170A (ja) 1989-04-07 1989-04-07 弾球遊技機

Country Status (1)

Country Link
JP (1) JPH01303170A (enrdf_load_stackoverflow)

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6877146B1 (en) 2001-06-03 2005-04-05 Cadence Design Systems, Inc. Method and apparatus for routing a set of nets
US6877149B2 (en) 2001-08-23 2005-04-05 Cadence Design Systems, Inc. Method and apparatus for pre-computing routes
US6883154B2 (en) 2001-01-19 2005-04-19 Cadence Design Systems, Inc. LP method and apparatus for identifying route propagations
US6892369B2 (en) 2002-11-18 2005-05-10 Cadence Design Systems, Inc. Method and apparatus for costing routes of nets
US6898773B1 (en) 2002-01-22 2005-05-24 Cadence Design Systems, Inc. Method and apparatus for producing multi-layer topological routes
US6907593B2 (en) 2000-12-06 2005-06-14 Cadence Design Systems, Inc. Method and apparatus for pre-computing attributes of routes
US6931616B2 (en) 2001-08-23 2005-08-16 Cadence Design Systems, Inc. Routing method and apparatus
US6938234B1 (en) 2002-01-22 2005-08-30 Cadence Design Systems, Inc. Method and apparatus for defining vias
US6957411B1 (en) 2001-06-03 2005-10-18 Cadence Design Systems, Inc. Gridless IC layout and method and apparatus for generating such a layout
US6957408B1 (en) 2002-01-22 2005-10-18 Cadence Design Systems, Inc. Method and apparatus for routing nets in an integrated circuit layout
US6957410B2 (en) 2000-12-07 2005-10-18 Cadence Design Systems, Inc. Method and apparatus for adaptively selecting the wiring model for a design region
US6973634B1 (en) 2002-01-22 2005-12-06 Cadence Design Systems, Inc. IC layouts with at least one layer that has more than one preferred interconnect direction, and method and apparatus for generating such a layout
US6988257B2 (en) 2002-11-18 2006-01-17 Cadence Design Systems, Inc. Method and apparatus for routing
US6996789B2 (en) 2002-11-18 2006-02-07 Cadence Design Systems, Inc. Method and apparatus for performing an exponential path search
US7003754B2 (en) 2000-12-07 2006-02-21 Cadence Design Systems, Inc. Routing method and apparatus that use of diagonal routes
US7010771B2 (en) 2002-11-18 2006-03-07 Cadence Design Systems, Inc. Method and apparatus for searching for a global path
US7013451B1 (en) 2002-01-22 2006-03-14 Cadence Design Systems, Inc. Method and apparatus for performing routability checking
US7069530B1 (en) 2001-06-03 2006-06-27 Cadence Design Systems, Inc. Method and apparatus for routing groups of paths
US7080342B2 (en) 2002-11-18 2006-07-18 Cadence Design Systems, Inc Method and apparatus for computing capacity of a region for non-Manhattan routing
US7080329B1 (en) 2002-01-22 2006-07-18 Cadence Design Systems, Inc. Method and apparatus for identifying optimized via locations
US7089524B1 (en) 2002-01-22 2006-08-08 Cadence Design Systems, Inc. Topological vias route wherein the topological via does not have a coordinate within the region
US7093221B2 (en) 2002-11-18 2006-08-15 Cadence Design Systems, Inc. Method and apparatus for identifying a group of routes for a set of nets
US7096449B1 (en) 2002-01-22 2006-08-22 Cadence Design Systems, Inc. Layouts with routes with different widths in different directions on the same layer, and method and apparatus for generating such layouts
US7107564B1 (en) 2001-06-03 2006-09-12 Cadence Design Systems, Inc. Method and apparatus for routing a set of nets
US7117468B1 (en) 2002-01-22 2006-10-03 Cadence Design Systems, Inc. Layouts with routes with different spacings in different directions on the same layer, and method and apparatus for generating such layouts
US7143382B2 (en) 2001-08-23 2006-11-28 Cadence Design Systems, Inc. Method and apparatus for storing routes
US7216308B2 (en) 2002-11-18 2007-05-08 Cadence Design Systems, Inc. Method and apparatus for solving an optimization problem in an integrated circuit layout
US7480885B2 (en) 2002-11-18 2009-01-20 Cadence Design Systems, Inc. Method and apparatus for routing with independent goals on different layers

Cited By (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7013450B2 (en) 2000-12-06 2006-03-14 Cadence Design Systems, Inc. Method and apparatus for routing
US6907593B2 (en) 2000-12-06 2005-06-14 Cadence Design Systems, Inc. Method and apparatus for pre-computing attributes of routes
US6952815B2 (en) 2000-12-06 2005-10-04 Cadence Design Systems, Inc. Probabilistic routing method and apparatus
US7003754B2 (en) 2000-12-07 2006-02-21 Cadence Design Systems, Inc. Routing method and apparatus that use of diagonal routes
US6957410B2 (en) 2000-12-07 2005-10-18 Cadence Design Systems, Inc. Method and apparatus for adaptively selecting the wiring model for a design region
US6883154B2 (en) 2001-01-19 2005-04-19 Cadence Design Systems, Inc. LP method and apparatus for identifying route propagations
US7096448B2 (en) 2001-01-19 2006-08-22 Cadence Design Systems, Inc. Method and apparatus for diagonal routing by using several sets of lines
US7139994B2 (en) 2001-01-19 2006-11-21 Cadence Design Systems, Inc. Method and apparatus for pre-computing routes
US7107564B1 (en) 2001-06-03 2006-09-12 Cadence Design Systems, Inc. Method and apparatus for routing a set of nets
US6957411B1 (en) 2001-06-03 2005-10-18 Cadence Design Systems, Inc. Gridless IC layout and method and apparatus for generating such a layout
US6877146B1 (en) 2001-06-03 2005-04-05 Cadence Design Systems, Inc. Method and apparatus for routing a set of nets
US7069530B1 (en) 2001-06-03 2006-06-27 Cadence Design Systems, Inc. Method and apparatus for routing groups of paths
US6931616B2 (en) 2001-08-23 2005-08-16 Cadence Design Systems, Inc. Routing method and apparatus
US7143382B2 (en) 2001-08-23 2006-11-28 Cadence Design Systems, Inc. Method and apparatus for storing routes
US7155697B2 (en) 2001-08-23 2006-12-26 Cadence Design Systems, Inc. Routing method and apparatus
US6877149B2 (en) 2001-08-23 2005-04-05 Cadence Design Systems, Inc. Method and apparatus for pre-computing routes
US7089524B1 (en) 2002-01-22 2006-08-08 Cadence Design Systems, Inc. Topological vias route wherein the topological via does not have a coordinate within the region
US6957409B1 (en) 2002-01-22 2005-10-18 Cadence Design Systems, Inc. Method and apparatus for generating topological routes for IC layouts using perturbations
US6898773B1 (en) 2002-01-22 2005-05-24 Cadence Design Systems, Inc. Method and apparatus for producing multi-layer topological routes
US6898772B1 (en) 2002-01-22 2005-05-24 Cadence Design Systems, Inc. Method and apparatus for defining vias
US7013451B1 (en) 2002-01-22 2006-03-14 Cadence Design Systems, Inc. Method and apparatus for performing routability checking
US7020863B1 (en) 2002-01-22 2006-03-28 Cadence Design Systems, Inc. Method and apparatus for decomposing a region of an integrated circuit layout
US7032201B1 (en) 2002-01-22 2006-04-18 Cadence Design Systems, Inc. Method and apparatus for decomposing a region of an integrated circuit layout
US7036105B1 (en) 2002-01-22 2006-04-25 Cadence Design Systems, Inc. Integrated circuits with at least one layer that has more than one preferred interconnect direction, and method for manufacturing such IC's
US6973634B1 (en) 2002-01-22 2005-12-06 Cadence Design Systems, Inc. IC layouts with at least one layer that has more than one preferred interconnect direction, and method and apparatus for generating such a layout
US7117468B1 (en) 2002-01-22 2006-10-03 Cadence Design Systems, Inc. Layouts with routes with different spacings in different directions on the same layer, and method and apparatus for generating such layouts
US7080329B1 (en) 2002-01-22 2006-07-18 Cadence Design Systems, Inc. Method and apparatus for identifying optimized via locations
US7114141B1 (en) 2002-01-22 2006-09-26 Cadence Design Systems, Inc. Method and apparatus for decomposing a design layout
US6938234B1 (en) 2002-01-22 2005-08-30 Cadence Design Systems, Inc. Method and apparatus for defining vias
US7096449B1 (en) 2002-01-22 2006-08-22 Cadence Design Systems, Inc. Layouts with routes with different widths in different directions on the same layer, and method and apparatus for generating such layouts
US6957408B1 (en) 2002-01-22 2005-10-18 Cadence Design Systems, Inc. Method and apparatus for routing nets in an integrated circuit layout
US7093221B2 (en) 2002-11-18 2006-08-15 Cadence Design Systems, Inc. Method and apparatus for identifying a group of routes for a set of nets
US6996789B2 (en) 2002-11-18 2006-02-07 Cadence Design Systems, Inc. Method and apparatus for performing an exponential path search
US7080342B2 (en) 2002-11-18 2006-07-18 Cadence Design Systems, Inc Method and apparatus for computing capacity of a region for non-Manhattan routing
US6988257B2 (en) 2002-11-18 2006-01-17 Cadence Design Systems, Inc. Method and apparatus for routing
US7010771B2 (en) 2002-11-18 2006-03-07 Cadence Design Systems, Inc. Method and apparatus for searching for a global path
US6892369B2 (en) 2002-11-18 2005-05-10 Cadence Design Systems, Inc. Method and apparatus for costing routes of nets
US7216308B2 (en) 2002-11-18 2007-05-08 Cadence Design Systems, Inc. Method and apparatus for solving an optimization problem in an integrated circuit layout
US7480885B2 (en) 2002-11-18 2009-01-20 Cadence Design Systems, Inc. Method and apparatus for routing with independent goals on different layers

Also Published As

Publication number Publication date
JPH01303170A (ja) 1989-12-07

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