JPH0467794B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Field of Industrial Application The present invention relates to a Hall element using a compound semiconductor material, and in particular to a Hall element with high output, good temperature characteristics, and improved unbalance rate. be.

(b) Conventional technology A Hall element is a magnetoelectric conversion element that converts magnetism into an electric signal, that is, a type of magnetic sensor.
It is used in a wide range of fields, such as controlling the rotation of brushless motors in VTRs, floppy disc devices, etc.

The conventional Hall element 2 is shown in pages 68 to 71 (Fig. 5) of Sensor Technology (September 1985 issue, Vo1.5.No.10).
A semi-insulating GaAs substrate 2, as detailed in
2, an N + type contact region 23 formed by ion-implanting silicon ions Si ⁺ into the GaAs substrate 2; and an N ⁺ type contact region 23 formed by implanting silicon ions Si ⁺ into the GaAs substrate 22 so as to overlap with the contact region 23;
N-type active region 24 formed by implanting
and an electrode 25 in ohmic contact with the contact region 23.

On the other hand, the Hall element with the above-mentioned structure is
It is also described in detail in Publication No. 228783.

(c) Problems to be Solved by the Invention In general, -V group compound semiconductor materials such as GaAs and InSb are used as materials for Hall elements.

Hall elements using GaAs have excellent temperature characteristics, but are inferior in output voltage. on the other hand
Hall elements using InSb have relatively high output, but have poor temperature characteristics.

Therefore, since each device has its own advantages and disadvantages, there is a problem in that there is no element that has all the elements.

Furthermore, since the masks used to form the contact region 23 and the active region 24 are not etched well,
There was a problem in that the desired contact region 23 and active region 24 could not be formed, which worsened the unbalance rate.

(d) Means for Solving the Problems The present invention has been made in view of the above-mentioned problems, and provides a Hall element using a compound semiconductor material, including at least a substrate 2 made of a compound semiconductor material, and a material inside the substrate 2. An active region 3 of one conductivity type deeply implanted with a low impurity concentration, and a contact region 4 of one conductivity type with a high impurity concentration formed at the end of the active region 3, the contact region 4 is This is solved by forming the region shallower than region 3.

(e) Effect It is generally well known that the Hall output voltage V _H can be increased by increasing the electron mobility μ.

However, as shown in FIG. 2, although the mobility μ can be controlled by the impurity concentration, if the impurity concentration is decreased in an attempt to increase the mobility μ, the sheet resistance of the active region 3 increases.

However, experiments have shown that when implanting, for example, silicon ions into a compound semiconductor, if the dose is lowered and the ion implantation depth is increased by, for example, double-charged ions, as shown in Figures 3 and 4, the sheet resistance increases. It was found that the mobility increased while suppressing the increase. Here, FIG. 3 is a schematic diagram illustrating a conventional impurity implantation state and an impurity implantation state of the present invention, and FIG. 4 is a diagram showing the relationship between ion implantation energy and carrier mobility.

Next, by adhering ferrite, which is a ferromagnetic material, we were able to increase the magnetic flux density applied to the Hall element by 1.4 to 2.2 times (at1KG: magnification varies depending on the structure).

Further, when the contact region 4 is formed shallower than the active region 3, the contact area between the active region 3 and the contact region 4 is increased by the bottom surface portion of the contact region 4. If the side surface of the contact region 4 does not form a straight line when viewed from above due to a defective mask pattern or the like, the current will be partially biased, causing an unbalanced voltage. However, in this structure, as the current flows through the bottom portion of the contact region 4, the current bias is relaxed and the unbalanced voltage is reduced.

(F) Embodiment An embodiment of the Hall element 1 of the present invention will be described below with reference to FIG. 1A and FIG. 1B.

First, there is a semi-insulating substrate 2, an N-type active region 3 formed within the substrate 2, and an N ⁺ -type contact region 4 formed at the end of the active region 3.

Here, a non-doped silicon oxide film of approximately 5000 Å is coated on the substrate 2 by the CVD method, and the implantation energy is 150 KeV and the dose is 1×10 ¹³ cm ^-2 through an opening corresponding to the ion implantation region. Contact regions 4 are formed by implanting silicon ions. At this time, the silicon oxide film and the photoresist film used when forming the opening are used as a mask during ion implantation.

Also, the active region 3 is similarly implanted with energy.
Silicon ions are implanted at 360 KeV and at a dose of 4.2×10 ¹² cm ^-2 . Furthermore, for defect recovery and carrier recovery, a non-doped silicon oxide film of about 5000 Å is coated on both sides of the substrate 2, and then lamp annealed in an infrared heating furnace.

A contact hole 6 of the contact region 4 is formed by etching the silicon oxide film 5, which is a first insulating film formed on the substrate 2, and a contact hole 6 is formed by vapor deposition through the contact hole 6. There is one electrode 7.

Here, the first electrode 7 is formed by depositing AuGe, Ni, Ti, and Au to thicknesses of about 1100 Å, 400 Å, 1000 Å, and 3000 Å, respectively. Further, a lift-off method is adopted as a method for forming the first electrode 7, and in order to alloy the first electrode 7, alloying treatment is performed at 400° C. for 1 minute in an infrared heating furnace.

Next, a second insulating film 8 is formed on the surface of the substrate 2, a contact hole 9 is formed by etching the second insulating film 8, and the first electrode 7 is formed through the contact hole 9. There is a second electrode 10 in contact with.

Here, as the second insulating film 8, for example,
Silicon nitride film is deposited on the surface of substrate 2 by CVD method.
It forms 1500Å. Further, the silicon nitride film 8
Through the contact hole 9 formed by etching the
The second electrode 10 is in ohmic contact with the first electrode 7, and is made of Ti and Au with a thickness of about 1000 Å, respectively.
3000Å deposited.

Finally, there is ferrite, which is a ferromagnetic material, bonded to the bottom surface of the substrate 2.

Here, since the substrate 2 is very thin at 100 μm and difficult to handle, it is attached to the ferrite in the form of a wafer using an adhesive. Also board 2
Ferrite may be further attached to the upper surface, and in this case, it is attached after wire bonding to the electrode 10.

Further, explanations and drawings of structures such as wire bonding and resin molding, which will be subsequent steps, will be omitted here.

The first feature of the present invention lies in the N-type active region 3, and in order to increase the Hall output voltage _VH , the conditions are such that the implantation energy is 200 KeV and the dose is 4.2×10 ¹² cm ^-2. The process involves implanting silicon ions.

In general, if the carrier concentration is reduced in an attempt to increase the electron mobility μ, the sheet resistance of the active region 3 (the sheet resistance is preferably 400Ω/□ to 600Ω/□) increases. When implanting, the impurity concentration is low and the mobility is high.Instead, the increase in sheet resistance is compensated for by increasing the acceleration voltage (implantation energy). Here, double charge ion Si ⁺⁺ was used instead of increasing the accelerating voltage. Therefore, silicon ions are implanted deeply. Alternatively, the product of the impurity concentration per unit area and the implantation depth may be made approximately constant, and the implantation depth may be increased.

Here, FIG. 4 shows the injection energy on the horizontal axis and the carrier mobility μ on the vertical axis. As can be seen from the figure, a large implantation energy means that the ion implantation depth is deep. Therefore, by deeply implanting ions, the carrier mobility μ
I was able to make it bigger.

Furthermore, an activation annealing process is performed to make the implanted silicon ions act as carriers. Here, we utilized a lamp heat annealing method using infrared heating to increase the temperature rise speed during annealing, and were able to increase the activation rate by about 10% compared to the conventional annealing method.

The second feature of the present invention resides in ferrite, which is a ferromagnetic material. Here, the substrate 2 is bonded to a wrap plate and backed up to a thickness of about 100 μm. This 100 μm thick substrate 2 is very thin and has very poor workability. For this purpose, after being wrapped, the substrate 2 with the wrap plate is glued onto the ferrite, and then the wrap plate is removed. Therefore, since the ferrite is bonded to the wafer, the strength is increased and workability is improved.

Furthermore, by using this ferrite as it is, the magnetic flux density applied to the Hall element 1 can be increased by 1.4 to 2.2 times (at1KG: the magnification varies depending on the structure).

Possible ways to increase the magnetic flux density include the shape of the ferrite, the magnetic permeability and saturation magnetic flux density of the ferrite, and the distance between the semiconductor thin film layer and the ferrite.Here, the thickness of GaAs is 100 μm, and the thickness of the lower ferrite is 200 μm. , the chip size is 350 μm.

As a result, the increase rate with only the lower ferrite is approximately
The increase rate was 1.4 times, and when a 150 μm thick and 150 μm diameter piece was installed on the upper side, an increase rate of about 2.2 times was obtained.

A third feature is that the contact region 4 is formed shallower than the active region 3.

In other words, the contact area between the active region 3 and the contact region 4 is increased by the bottom portion of the contact region 4. For example, in the past, if the side surface of the contact region 4 was not straight when viewed from above due to a defective mask pattern or the like, the current would be partially biased, causing an unbalanced voltage. However, in this structure, as the current flows through the bottom portion of the contact region 4, the current bias is relaxed and the unbalanced voltage is reduced.

(g) Effects of the invention As is clear from the above explanation, by deeply implanting silicon ions, the electron mobility μ could be increased to 4400 cm ² /V·sec while suppressing the sheet resistance.

In addition, since the ferrite is bonded while it is in the wafer state, workability is very good, and the magnetic flux density is
It was possible to increase it by 1.4 to 2.2 times.

Therefore, due to the above effects, the Hall output V _H can be reduced to 38mV.
~60mV, which is 1.5 to 2.4 times larger than conventional ones, temperature dependence is -0.06%/℃, and magnetic field linearity is 1.8 to 2.04.
We were able to form a Hall element that was unprecedented.

Furthermore, the contact region 4 is shallower than the active region 3.
By forming this, the unbalanced voltage could be reduced.

[Brief explanation of the drawing]

FIG. 1A is a plan view of the Hall element of the present invention.
Figure B is a cross-sectional view taken along line X-X' in Figure 1 A, and Figure 2 is
Figure 3 is a diagram explaining the relationship between GaAs mobility and impurity concentration. Figure 3 is a schematic diagram explaining the conventional impurity implantation state and the impurity implantation state of the present invention. Figure 4 is a diagram explaining the relationship between ion implantation energy and mobility. Figure 5
The figure is a cross-sectional view of a conventional Hall element. 1 is a Hall element, 2 is a substrate, 3 is an active region, 4
5 is a contact region, 5 is a first insulating film, 6 is a contact hole, 7 is a first electrode, 8 is a second insulating film, 9 is a contact hole, and 10 is a second electrode.

Claims (1)

[Claims] 1. A substrate made of GaAs, an active region of one conductivity type ion-implanted into the substrate, and a contact region of one conductivity type with high impurity concentration formed at the end of the active region. In the Hall element, the active region is formed such that ions are implanted into the substrate at a low impurity concentration, and an increase in resistance caused by the low impurity concentration is corrected by deep ion implantation, The Hall element is characterized in that the contact area between the active region and the contact region is formed to be wider by substantially the bottom area of the contact region.