JPH0467634A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To insulate and flatten the part between element substrates by a method wherein a semiconductor or metallic layer having opening parts as well as a spin-on glass(SOG) film covering the layer is formed on a base layer and then the SOG film, after finishing the low temperature annealing step, is etched back to be buried in the opening parts further to be high-temperature annealed. CONSTITUTION:A holding substrate 1 is oxidized to form an insulating layer 2; a polysilicon film is formed on the insulating film by CVD process; the polysilicon film is laser-annealed to form a single crystal silicon film and then selectively etched away by RIE process to form element substrates 3 having opening parts 4. Next, the whole surface is coated with inorganic base spin-on glass mainly composed of Si(OH)4 as if covering the semiconductor substrates 3 to form a film 5 and then the film 5 is low-temperature annealed to be coated with Si(OH)4, ethyl alcohol, etc., and to degas a solvent. Next, the film 5 is etched back by RIE process using fluorine base gas, etc., to be buried in the openings 4 for flattening the whole surface and then the film 5 is high- temperature annealed to dehydrate Si(OH)4. contained in the film 5.

Description

[Detailed Description of the Invention] [Summary] Regarding a method for manufacturing a semiconductor device, it is possible to insulate and planarize between element substrates with a spin-on glass film without causing cranking, hanging phenomena, or porousness in the spin-on glass film. The present invention aims to provide a method for manufacturing a semiconductor device, which includes a step of forming a layer made of semiconductor or metal having an opening on a base layer, and applying spin-on glass to cover the layer made of semiconductor or metal. forming a spin-on glass film, performing a first annealing treatment on the spin-on glass film to degas the coating solvent in the spin-on glass film, and etch-hacking the spin-on glass film to remove the inside of the opening. The method includes the steps of embedding and planarizing the spin-on glass film, and subjecting the spin-on glass film to a second annealing treatment at a temperature higher than the first annealing temperature.

[Industrial application field]

The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing an element region in a semiconductor device having a 5OI (silicon on insulator) or 5O3 (silicon on sapphire) structure in which a silicon single crystal layer is formed on an insulating layer. Regarding a flattening method.

Semiconductor devices with an SOI or SO3 structure are capable of complete isolation between elements using an insulator, and are capable of high-speed operation without a latch amplifier in, for example, a CMO3, and are expected to be a next-generation technology. In this Sol, SO3 structure semiconductor device, for example, even if an element region having a good single crystal is formed on an insulating layer, various problems arise due to unevenness formed in the element region. For example, if unevenness exists, the focal length at which the image is formed will differ in the actual process, which may make it impossible to obtain the guaranteed developing power during exposure or cause wire breakage. Particularly in the SOI and SOS structures, due to the characteristics of the element, in the case of a two-layer or three-layer structure, it is necessary to prevent the unevenness of the first layer from being carried over to the second and subsequent layers. Therefore, it is necessary to sequentially planarize the layers starting from the -th layer.

[Conventional technology]

FIGS. 3(a) to 3(C) are diagrams illustrating a conventional method of manufacturing a semiconductor device. In FIG. 3, 31 is a support substrate made of Si, etc., 32 is an insulating layer made of Sin, etc., and 33
34 is an opening formed in the element substrate 33, and 35 is a spin-on glass film.

Next, the manufacturing method will be explained.

First, as shown in FIG. 3(a), the support substrate 31 is oxidized, for example, by thermal oxidation to form an insulating layer 32, and
After depositing polysilicon (or amorphous silicon) on the insulating layer 32 by the VD method to form a polysilicon film, and performing laser annealing treatment on the polysilicon film to form a single crystal silicon film, for example, The opening 3 is formed by selectively etching the single crystal silicon film by RIE.
4 is formed. At this time, opening 3
Insulating layer 32 is exposed within 4.

Next, as shown in FIG. 3(b), spin-on glass is applied to cover the element substrate 33 having the opening 34 to form a spin-on glass film 35, and then the main component of the spin-on glass film 35 is The spin-on glass film 35 is subjected to a low-temperature annealing treatment at, for example, about 200° C. in order to degas the coating solvent such as Si(OH) 4 , ethyl alcohol, and ethyl acetate. Next, in order to dehydrogenate Si(OH)4 in the spin-on glass film 35, the temperature is set at 800°C, for example.
high temperature annealing treatment.

Then, the spin-on glass film 35 is etched back by RIE, for example, and the spin-on glass film 35 is etched back into the opening 34.
By embedding 5 and flattening the surface, the structure shown in Fig. 3 (C
) is a spin-on glass film 3 between the element substrates 33.
5, it is possible to obtain an isolated SOI structure.

[Problem to be solved by the invention]

In the conventional semiconductor device manufacturing method described above, planarization is performed by spin-on glass coating → low temperature Ayur → high temperature annealing → etchback, but several problems occur, and these will be explained below.

■When applying thick coatings It has been pointed out for some time that the first problem is that if spin-on glass is applied thickly, cracks are likely to occur. As shown in Figure 4 (a) and (b) (plan view), especially when the film thickness after spin-on glass coating varies by about 3000, it does not occur in a wide range of spaces, but in spaces of several microns or less. After high temperature annealing at 700 to 800°C, the spin-on glass film 3
It was found that a crack 41 was formed in the sample No. 5. Figure 4(a)
In FIG. 4B, a crack 41 is generated between the element substrate 33 and the spin-on glass film 35, and in FIG. 4(b), a crack 41 is generated in the spin-on glass film 35. in this way,
When the crack 41 was generated, when a wiring such as A2 was subsequently formed on the spin-on glass film 35 where the crank 41 was formed, the wiring was likely to be disconnected.

Next, the problem with thick coating is a phenomenon peculiar to the fine lump Evaturn that cuts half a micron, and does not occur in the 1.0 μm space, but after high temperature annealing at 700 to 800°C in the half micron space. , Figure 4 (
As shown in C) (cross-sectional view), a suspension phenomenon occurs in the spin-on glass film 35 and a gap 42 is created between the spin-on glass film and the insulating layer 32. This phenomenon in which the gap 42 occurs occurs even when the comb is thin enough to be combed by up to 2,500 people without any cracks. When the gap 42 is created in this way, the spin-on glass film 35
When etching back and planarizing the element substrate 3, the spin-on glass film 35 cannot be buried in the opening 34, and the element substrate 3
It was becoming difficult to insulate between the three.

(2) When performing etch pack When the spin-on glass film 35 is etch-packed after high-temperature annealing, there is a problem that the spin-on glass film 35 becomes porous as shown in FIG. 4(a). This is presumed to be due to the difference in etching rate between the portions that became gas passages and the portions that did not become passages as a result of degassing that occurs during high-temperature annealing. This phenomenon is fatal to the conventional planarization process, and when the spin-on glass film 35 becomes porous, the surface area of the spin-on glass film 35 increases, making it easier to absorb moisture and cause film quality deterioration. was.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for manufacturing a semiconductor device that can flatten the space between element substrates while insulating them with a spin-on glass film without causing cracks, suspension phenomena, or porousness in the spin-on glass film. It is said that

[Means to solve the problem]

In order to achieve the above object, the method for manufacturing a semiconductor device according to the present invention includes a step of forming a layer made of semiconductor or metal having an opening on a base layer, and a step of forming a spin-on glass to cover the layer made of semiconductor or metal. a step of coating the spin-on glass film to form a spin-on glass film; a step of first annealing the spin-on glass film to degas the coating solvent in the spin-on glass film; and a step of etch-hacking the spin-on glass film to remove the coating solvent. The method includes a step of burying the spin-on glass film in the opening and planarizing it, and a step of subjecting the spin-on glass film to a second annealing treatment at a temperature higher than the first annealing temperature.

The base layer according to the present invention includes an insulating layer such as SiO□, polyS
Semiconductor layers such as T, metal layers such as Af, etc. may be mentioned, and examples of semiconductor layers according to the present invention include single crystal silicon, polysilicon, etc., and examples of metal layers include Af and the like.

The spin-on glass film according to the present invention includes organic and inorganic spin-on glass films. For example, the inorganic spin-on glass film includes an inorganic spin-on glass film containing Si(OH)4 as a main component.

[Effect]

In the present invention, cranking and hanging phenomena occurred due to low-temperature annealing and then high-temperature annealing when spin-on glass was applied thickly as in the conventional method.
), after applying a thick layer of spin-on glass and annealing it at a low temperature, the spin-on glass film was etched back to flatten the surface and then annealed at a high temperature.

Since the spin-on glass film that has been annealed at a low temperature is annealed at a high temperature in a thin state, it is possible to prevent the spin-on glass film 5 from cracking or suspending. As shown, S
EM observation confirmed that no cranking or hanging phenomenon occurred in the spin-on glass film 5. Also,
It was also confirmed that no porous phenomenon occurred in the spin-on glass film 5.

〔Example〕

Hereinafter, the present invention will be explained based on the drawings.

1 and 2 are diagrams for explaining one embodiment of the method for manufacturing a semiconductor device according to the present invention, FIG. 1 is a diagram for explaining the method for manufacturing one embodiment, and FIG. 2 is a diagram for explaining one embodiment. It is a figure explaining the effect of. In these figures, 1 is a supporting substrate made of Si, etc., 2 is an insulating layer made of SiO□, etc., 3 is an element substrate made of Si, etc., 4 is an opening formed in the element substrate 3, and 5 is a spin-on glass film. It is.

Next, the manufacturing method will be explained.

First, as shown in FIG. 1(a), a support substrate 1 is oxidized, for example, by thermal oxidation to form an insulating layer 2 having a thickness of, for example, 1.0 μm, and then polysilicon is deposited on the insulating layer 2 by, for example, a CVD method. (Amorphous silicon may also be used) to form a polysilicon film, and after the polysilicon film is laser annealed to become single crystallized to form a single crystal silicon film, the single crystal silicon film is selectively removed by, for example, RIE. Etching is performed to form an element substrate 3 having an opening 4 and a film thickness of, for example, 4,000. At this time, the insulating layer 2 is placed inside the opening 4.
is exposed.

Next, as shown in FIG. 1(b), an inorganic spin-on glass containing 5i(OH) as a main component is coated so as to cover the element substrate 3 having the opening 4, so that the film thickness is, for example, flat. A spin-on glass film 5 of 3,000 layers is formed on the surface. The coating conditions here are that the spinner rotation speed is, for example, 3500 r.
pm, and the rotation time is, for example, 15 seconds. Next, the spin-on glass film 5 is mainly coated with S i (OH) a , ethyl alcohol, ethyl acetate, etc., and the spin-on glass film 5 is subjected to a low-temperature annealing treatment at, for example, 180° C. for 130 minutes to degas the solvent. At this time, the surface state of the spin-on glass film 5 was observed using a SEM, and it was found that the surface of the spin-on glass film 5 was not porous but smooth.

Next, the spin-on glass film 5 is etched by RIE using a fluorine-based gas or the like, and the spin-on glass film 5 is buried in the opening 4 to flatten the surface. The etching conditions here are, for example, applied energy 200 W, pressure 0.13 Torr, x crank gas CF4 gas,
Etching gas flow rate 300sec, etching time 6
0 seconds, and the spin-on glass enching speed was 620 people/min. Then, Si(OH) in the spin-on glass film 5
By performing high-temperature annealing treatment at 800°C for 230 minutes to dehydrogenate the S4, for example, the element substrates 3 are insulated by the spin-on glass film 5 as shown in FIG. 1(C).
ol structure can be obtained.

In other words, in this example, cracks and suspension phenomena occurred due to low-temperature annealing → high-temperature annealing when the spin-on glass was coated with a thick coating as in the conventional method. The spin-on glass film 5 is annealed at a high temperature in a thin state while flattening the surface by etch banking. As shown in Fig. 2, SEM observation confirmed that no cracks or hanging phenomena occurred in the spin-on glass film 5. It was also confirmed that no porous phenomenon occurred in the spin-on glass film 5.

In addition, as shown in FIG. 2, it was found that the difference in level could be reduced from 4,000 people to 2,000 people in the present example (unlike conventional methods (about 3,000 people), and the surface flattening was excellent. In the conventional method, spin-on glass coating → low-temperature ayur → high-temperature annealing was performed, making the step on the spin-on glass surface larger than that at the time of coating. Because the steps on the surface of the spin-on glass are annealed at high temperatures in approximately the same conditions as when they were applied, as in spin-on glass etchback, the steps are smaller than before.

〔Effect of the invention〕

According to the present invention, there is an effect that the spin-on glass film can be flattened while insulating the space between the element substrates with the spin-on glass film without causing cracks, hanging phenomena, or porousness in the spin-on glass film.

[Brief explanation of drawings]

1 and 2 are diagrams for explaining one embodiment of the method for manufacturing a semiconductor device according to the present invention, FIG. 1 is a diagram for explaining the method for manufacturing one embodiment, and FIG. 2 is a diagram for explaining one embodiment. FIG. 3 is a diagram explaining the manufacturing method of the conventional example, and FIG. 4 is a diagram explaining the problems of the conventional example. ...Support substrate, ...Insulating layer, ...Element substrate, ...Opening, ...Spin-on glass film. Figure 1 is a diagram explaining the manufacturing method of the first embodiment.

Claims (1)

[Claims] A step of forming a layer (3) made of semiconductor or metal having an opening (4) on a base layer (2), and a step of forming a layer (3) made of semiconductor or metal so as to cover the layer (3) made of semiconductor or metal. a step of applying spin-on glass to form a spin-on glass film (5); and a step of subjecting the spin-on glass film (5) to a first annealing treatment to degas the coating solvent in the spin-on glass film (5). a step of etching back the spin-on glass film (5) to bury the spin-on glass film (5) in the opening (4) and flattening the spin-on glass film (5); A method for manufacturing a semiconductor device, comprising the step of performing a second annealing treatment at a temperature higher than the annealing temperature.