JPH0462499B2 - - Google Patents
Info
- Publication number
- JPH0462499B2 JPH0462499B2 JP60014061A JP1406185A JPH0462499B2 JP H0462499 B2 JPH0462499 B2 JP H0462499B2 JP 60014061 A JP60014061 A JP 60014061A JP 1406185 A JP1406185 A JP 1406185A JP H0462499 B2 JPH0462499 B2 JP H0462499B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- control signal
- circuit
- transistors
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 19
- 101100508840 Daucus carota INV3 gene Proteins 0.000 claims description 8
- 101150070189 CIN3 gene Proteins 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 11
- 230000003321 amplification Effects 0.000 description 5
- 238000003199 nucleic acid amplification method Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 2
- 101150110971 CIN7 gene Proteins 0.000 description 1
- 101100286980 Daucus carota INV2 gene Proteins 0.000 description 1
- 101150110298 INV1 gene Proteins 0.000 description 1
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 description 1
- 101100397045 Xenopus laevis invs-b gene Proteins 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/09425—Multistate logic
- H03K19/09429—Multistate logic one of the states being the high impedance or floating state
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60014061A JPS61173519A (ja) | 1985-01-28 | 1985-01-28 | 出力回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60014061A JPS61173519A (ja) | 1985-01-28 | 1985-01-28 | 出力回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61173519A JPS61173519A (ja) | 1986-08-05 |
JPH0462499B2 true JPH0462499B2 (de) | 1992-10-06 |
Family
ID=11850571
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60014061A Granted JPS61173519A (ja) | 1985-01-28 | 1985-01-28 | 出力回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61173519A (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0821845B2 (ja) * | 1986-09-24 | 1996-03-04 | 日本電気アイシーマイコンシステム株式会社 | 3−ステ−ト回路 |
JPH03230618A (ja) * | 1990-02-05 | 1991-10-14 | Nec Corp | 出力バッファ回路 |
JP6745129B2 (ja) * | 2016-03-31 | 2020-08-26 | ザインエレクトロニクス株式会社 | 信号多重化装置 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5376719A (en) * | 1976-12-20 | 1978-07-07 | Fujitsu Ltd | Output buffer circuit with tri-state control |
-
1985
- 1985-01-28 JP JP60014061A patent/JPS61173519A/ja active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5376719A (en) * | 1976-12-20 | 1978-07-07 | Fujitsu Ltd | Output buffer circuit with tri-state control |
Also Published As
Publication number | Publication date |
---|---|
JPS61173519A (ja) | 1986-08-05 |
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