JPH0461365A - Ic package - Google Patents

Abstract

PURPOSE:To increase occupying ratio of the area of a chip, to suitably mount in a high density, to shorten leads and to eliminate delay of a signal transmission speed by extending leads from many sides of an IC package, and forming a structure in which adjacent leads are bent reversely in a hook state. CONSTITUTION:Leads 2 are extended from opposed upper and lower sides. However, the leads 2 may be extended from the three sides or four sides. The extended leads 2 are formed of adjacent leads 2A and 2B bent reversely in a hook state. Since they are mounted in a type in which an IC package 1 is interposed between boards, a strength is increased against a stress due to the deviation of the boards. Thus, the leads 2 are extended from many sides of the package 1 to increase the occupying ratio of the area of an IC chip 3 to the area of the package 1, and the lengths of the leads can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to the miniaturization of IC packages in the encapsulation of semiconductor devices, and particularly provides a structure for inserting lead wires.

[Conventional technology]

Conventionally, Zig-Zag In1ine P is an example of a method for mounting IC packages on a wiring board with high density.
ackge (abbreviated as ZIP).

FIG. 3 is a diagram showing a ZIP IC structure, in which a plurality of lead wires (2) are drawn out from one side of an IC package (1). The drawn out lead wires (2) have a structure in which adjacent lead wires are bent in opposite directions into a hook shape.

As a result, the ZIP allows the IC package to be mounted vertically on a wiring board (not shown), making high-density mounting possible.

However, when applying ZIP to an IC chip with many input/output terminals and a small chip size, the number of input/output terminals of the IC chip and the number of lead wires of the IC package are the same, so the number of IC chips inside the IC package is The area occupied is the shaded area (3) in Figure 4, and I
The area occupied by the IC chip with respect to the area of the C package (1) becomes smaller.

Therefore, an IC package that is not occupied by an IC chip <1)
The upper area becomes useless and unsuitable for high-density packaging.

Furthermore, the length of the lead wire (2) far from the IC chip becomes longer, and the line capacitance between the lead wire and other lead wires also increases.

During circuit operation, signals are transmitted in the form of pulses, so due to the resistance component of the five lead wires (2) and transient characteristics due to the line capacitance, the signal transmission speed becomes slower as the line capacitance increases.

[Problem to be solved by the invention]

Conventional ZIP IC packages were constructed as described above, and the lead wires were drawn out from only one side of the IC package. , the occupation ratio of the area of the IC chip to the area of the IC package becomes small, and a useless area is created on the IC package, making it unsuitable for high-density packaging, which is the purpose of ZIP.

Furthermore, the length of the lead wire becomes longer, which increases the influence of transient characteristics due to the resistance component of the lead wire and the capacitance between the wires, resulting in problems such as slowing down the signal transmission speed.

This invention was made to solve the above-mentioned problems, and by drawing out the lead wires of the IC package to multiple sides, the chip area can be reduced in an IC chip with a large number of input/output terminals and a small chip area. The purpose of the present invention is to obtain an IC package that can increase the occupation rate, allow high-density packaging, and shorten the lead wire length to eliminate delays in signal transmission speed.

[Means to solve the problem]

The IC package according to the present invention has a structure in which lead wires are drawn out from multiple sides of the IC package, and adjacent lead wires are bent in opposite directions into hook shapes.

[Effect]

In the IC package of the present invention, by drawing out the lead wires of the IC package to multiple sides, the occupation ratio of the area of the IC chip to the area of the IC package is increased and the length of the lead wires is reduced.

(Example〕 An embodiment of the present invention will be described below with reference to the drawings.

FIGS. 1(a) to (C) show an IC which is an embodiment of the present invention.
A plan view, a front view, and a side view of the package. In the figure, (1) is an IC package, (2) (2 people)
(2B) is a lead wire drawn out from the IC package (1), and the lead wire (2) is drawn out from two opposing upper and lower sides. However, the lead wire (2) is not shown in the figure.
It may be pulled out from the side or from all four sides.

The drawn-out lead wire (2) is formed of a lead wire (2A) and a toto wire (2B), which are formed by bending the lead wires that meet each other in opposite directions into a hook shape. This is an IC package (
1) is mounted between two boards, so
This is to increase strength against stress caused by misalignment between the substrates.

In this way, in this invention, the lead wire (2) is
By drawing out the leads from multiple sides of the package (1), as shown in Fig. 2, the area occupation ratio of the IC chip (3) to the area of the IC package (1) can be increased and the lead wire length can be shortened. I can do it.

〔Effect of the invention〕

As described above, according to the present invention, by drawing out the lead wires from multiple sides of the IC package, an IC chip having a large number of input/output terminals and a small chip size can be used.
This has the effect that the lead wire length can be shortened without creating any useless area on the C package.

[Brief explanation of the drawing]

FIGS. 1(a) to (C) show an IC which is an embodiment of the present invention.
A plan view, a front view, and a side view of the package; FIG. 2 is a sectional plan view showing the connection structure with the IC chip in FIG. 1;
Figures (a) to (C) are a plan view, a front view, and a side view of a conventional IC package, and FIG. 4 is a cross-sectional plan view showing a connection structure with the IC chip of FIG. 3. In the figure, l is an IC package, (2) (2^) (2
B) is the lead wire, and (3) is the IC chip. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] an IC chip, a protective film formed to cover the IC chip; A plurality of lead wires, each of which is bent in one direction A in the direction normal to the IC chip surface, and the tip of the lead wire A is bent in the direction A.
C parallel to the chip surface, and bend the lead wire B next to the lead wire A in the direction B opposite to the normal direction A to the IC chip surface, and the tip of the lead wire B is parallel to the IC chip surface. Then, bend the lead wire C next to the lead wire B in the same way as the lead wire A, bend the lead wire D next to the lead wire C in the same way as the lead wire B, and then bend the lead wires alternately. An IC package characterized by a bent structure.