JPH0348449A - Ic package - Google Patents

Abstract

PURPOSE:To make short a wiring pattern on a printed wiring board, to make possible a reduction in the propagation delay time of a signal, to reduce the propagation delay time of the signal due to a wiring in an IC package and further, to obtain the IC package capable of reducing AC noise, by a method wherein the package is formed into a hexagon. CONSTITUTION:In an IC package 1, in which a semiconductor integrated circuit chip 3 is housed and from which lead terminals 2 are led out, the external shape of the package 1 is formed into a hexagon. For example, a flat type IC package 1 having lead terminals 2 of 24 pins is constituted into such a structure that it has a hexagonal form and 4 lead terminals 2 are provided on each of the sides of the hexagonal form. Moreover, an IC chip 3, which has a quadrangular external shape and is provided with connecting pads along the sides of the quadrangular external shape, is provided in the above IC package 1 in such a way that it is connected by 4 to the lead terminals 2 in 6 directions through bonding wires 4 by the shortest distance. Thereby, the hexagonal IC package can be packaged on a printed-wiring board in a high density and the wiring between the IC packages can be made shortest.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a 50 package that houses a semiconductor integrated circuit (hereinafter referred to as IC) chip, and particularly relates to [a device configured using an IC package]. , a lead terminal direction suitable for use in high-speed operation;
The present invention relates to an IC package having a package shape.

[Prior art] As a conventional technology regarding the shape of an IC package, for example, Nikkei Electronics November 28, 1988 issue (
No. 4 6 1), pages 155 to 158, etc., are known. The QFP type LSI package shown in this prior art has a rectangular outer shape, and by pulling out lead terminals in four directions along each side of the package, it is possible to provide a large number of terminals. Furthermore, when mounted on a printed circuit board or the like, the package can be placed without any gaps, resulting in high mounting efficiency.

The conventional IC package will be explained below using drawings. FIG. 11 is an internal configuration diagram of an IC package according to the prior art, and FIGS. 12 and 13 are implementation diagrams of the IC package according to the prior art. 11 to 13, 2 is a lead terminal, 3 is a square IC chip, 4 is a bonding wire, 15 is a wiring, 16 is a QFP type square IC package, 17 is a through hole, 18 is an outer layer wiring, 19
is the inner layer wiring. The prior art shown in FIGS. 11 to 13 shows the configuration of a QFP type LSI jc package and an example of its arrangement.
The 1c package l6 has a rectangular outer shape,
A rectangular IC chip 3 is provided inside, and lead terminals 2 are provided around it for connection to other packages, etc. The lead terminals 2 and connection pads provided along each side of the rectangular IC chip 3 are connected by bonding wires 4.

The IC packages 16 configured as described above are arranged in a grid pattern on a printed wiring board or the like as shown in FIG. 12.

Now, the size of the IC package 16 is 20 mm on one side, 80 mm on the circumference, and the length of the lead terminal drawn out from each side is 2 mm. This IC package 16 is printed in a space of I + ue so that each side is parallel. It shall be placed on the wiring board.

In this case, as can be seen from FIG. 12, the center spacing between the packages in the four directions where the sides of the 1c package l6 are adjacent is 2F+am, while the center spacing between the packages in the other four directions is: It is long, about 35 penguins. Therefore, each IC package 16 can be connected to other IC packages located in four directions opposite each side of each of the 10 packages by using the outer layer wiring 18 between the lead terminals 2 at the shortest distance. I can do it. However, even when using the outer layer wiring l8, the IC
Since wiring cannot be directly parallel to the sides of the package and requires diagonal wiring, the wiring becomes long as shown in FIG. It was necessary to conduct wiring using inner layer wiring 19, which is the signal layer. Therefore, this prior art is
The wiring between the IC packages in the diagonal direction was longer than other wiring. In addition, the arrangement of IC packages according to other conventional techniques is the first.
This is shown in Figure 3. This arrangement of IC packages is such that the IC packages of the 1C packages shown in FIG. The center spacing of is set to be as close as possible. In this arrangement, as shown in FIG. 13, the mutual distance between the IC packages is 25 mm when the sides are arranged opposite each other, whereas when they are arranged offset, the distance between the IC packages is approximately 2 mm.
8 mm, which is an improvement compared to the arrangement shown in Figure 12. In the case of the arrangement shown in FIG. 13, the IC packages whose sides are parallel can be connected to each other by the shortest straight distance. However, when the sides are not parallel, a detour occurs and a long wiring is required, as shown in wiring 15. In particular, lead terminal 2
If there are a large number of IC packages, a large number of channels are required, so it is necessary to increase the distance between IC packages, or to multiplex the signal layer of the printed wiring board and perform detour wiring via through holes. , and the wiring length was longer.

[Problems to be Solved by the Invention] In the above-mentioned conventional technology, when an IC package is mounted on a printed wiring board,
When connecting IC packages using lead terminals with sides that are not parallel to each other, the wiring becomes long because the wiring has to take a detour or use another wiring layer via a through hole. The problem is that the signal propagation delay due to wiring increases, and especially when applied to high-speed ICs, the proportion of signal propagation delay due to wiring increases, making it difficult to improve the performance of the system. ．． Furthermore, in the above-mentioned conventional technology, when the chip 3 in the IC package is square, as shown in FIG. increase, induction of noise in the source line and ground line due to inductance components, crosstalk,
This had the problem of increasing AC noise, such as deterioration of signal waveforms due to impedance mismatch. SUMMARY OF THE INVENTION An object of the present invention is to solve the problems of the prior art, to shorten the wiring pattern on a printed wiring board, to reduce signal propagation delay time, and to reduce signal propagation delay time by wiring within an IC package. An object of the present invention is to provide an LC package that can reduce delay time and AC noise.

[Means for Solving the Problems] According to the present invention, the object is to make the shape of the package that houses the IC hexagonal, with lead terminals extending in six directions along the sides of the hexagonal package. When mounting multiple IC packages on a printed circuit board, the 1C packages to which signals are connected are placed adjacent to each other with their sides parallel, and the IC packages to be connected are placed adjacent to each other so that the signal terminals to be connected are adjacent to each other.
Determine the placement of the package lead terminals, and thereby
This is achieved by making it possible to connect the c-packages together over the shortest possible distance. Furthermore, the purpose is to store an IC in a 1C package.
This is achieved by making the chip hexagonal and providing lead-out pads in six directions, thereby shortening the wiring length at the corner portions within the IC package.

[Function] When the hexagonal 10 package is mounted on a printed wiring board, there is no gap, so the packaging density is not reduced, and the sides of the 6-sided IC package are adjacent to each other in parallel. , signals to ICs in six directions can be connected with the shortest wiring length, and the signal propagation time due to the wiring pattern of the printed wiring board can be reduced.

In addition, since the IC chip housed in the IC package is hexagonal, the length of the internal wiring can be made uniform and short, reducing signal delays and AC noise caused by wiring inside the package. can be achieved.

Therefore, the performance of a system configured by connecting a plurality of IC packages according to the present invention can be improved.

[Embodiments] Hereinafter, embodiments of the IC package according to the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a top view of a first embodiment of the present invention, FIG. 2 is an external view thereof, and FIG. 3 is a diagram showing its internal configuration. In FIGS. 1 to 3, l is a hexagonal iC package,
Other symbols are the same as in FIGS. 1 and 12.

The first embodiment of the present invention shown in FIGS. 1 to 3 is an application of the present invention to a flat type IC package having 24 lead terminals, and the IC package l has a hexagonal shape. It has four lead terminals 2 on each side. In this embodiment, as shown in FIG. 3, an IC chip 3 having a rectangular outer shape and connection pads provided along its sides is provided in an IC package 1 having the aforementioned shape. , the IC chip 3 is connected to six lead terminals 2 via bonding wires 4 in groups of four at the shortest distance. When a device is configured using a plurality of such hexagonal IC packages according to the embodiments of the present invention, the hexagonal IC
Packages can be mounted on a printed wiring board with high density, and the wiring between IC packages can be made the shortest distance, so the signal processing speed of the device can be increased.

FIG. 4 is a diagram showing the internal configuration of the second embodiment of the present invention. In FIG. 4, 55 is a hexagonal IC chip;
Other symbols are the same as in Figures 1 to 3. In the second embodiment of the present invention, the IC chip housed in the IC package l is a hexagonal <7) IC chip 5, and connection pads are provided along each side of the IC chip 5.
The IC package 1 is housed in the IC package 1 so that each side thereof is parallel to each side of the IC package 1, and the wiring from the IC chip 5 to the lead terminal 2 by the bonding wire 4 is uniformly arranged. It is possible to keep it short. Therefore, in addition to the effects of the first embodiment of the present invention described above, the second embodiment of the present invention can reduce the capacitance and inductance caused by the wiring inside the IC package, so that the signal generated by the internal wiring can be reduced. It is possible to reduce the delay and also to reduce the influence of AC noise.

In the first and second embodiments of the present invention described above, the number of output lead terminals is 24 in order to simplify the drawings, but the number of lead terminals is not limited to 24 and may be any number. .

FIG. 5 is a mounting diagram of the LC package according to the first and 112 embodiments of the present invention on a printed wiring board, and the reference numerals in the figure are the same as in the other figures already described. In the arrangement example in FIG. 5, the IC package 1 has a circumference of 80+a
u+, one side is approximately 13.3 mm, and the length from each side of the lead terminal 2 is 2 mI+1. This IC package 1 was mounted with a space of lam between the lead terminals 2 so that each side was parallel to each other. It is something. For this example, each i
The C packages 1 are symmetrically adjacent to other IC packages 1 in six directions, and the center distances between the iC packages 1 can be all the same and short, about 28 mm.

Furthermore, since all of the sides of adjacent IC packages face each other, the length of the side that connects adjacent IC packages can be made large, and the adjacent IC A large number of lead terminals 2 for interconnecting packages 1 can be provided. As a result, according to the mounting method using the IC package according to the embodiment of the present invention described above, it is possible to
As shown by wiring 15 in Fig. 5, it is possible to wire the packages in a straight line without detouring the wiring, so the wiring length can be shortened and the signal propagation delay time can be reduced. be able to. Furthermore, since the number of through holes provided on the printed wiring board can be reduced and the number of channels used can be reduced, the number of signal layers on the printed wiring board can be reduced and the printed wiring board can be manufactured at low cost. Next, the jc according to the eleventh second embodiment of the present invention described above.
An example of a device configured using these IC packages as shown in Fig. 5 will be explained with reference to the drawings. FIG. 6 is a block diagram showing the configuration of a third embodiment of the present invention showing an application example of the present invention, and FIG. 7 is a diagram showing the mounting state on a printed circuit board. In FIGS. 6 and 7, 6 is a shared memory, 7 is an I/O controller, 8 is a bus controller, 9 is a storage memory, 10 is a processor, and 11
is a coprocessor, l2 is a 32-bit bus, I3 is a bus and path controller, l4 is a processor with built-in cache memory, 15 is a wiring pattern, and other symbols are the first
This is the same as in the figure. A third embodiment of the present invention shown in FIGS. 6 and 7 uses a 1c package according to the present invention to integrate four 32-bit microprocessors 10, a shared memory 6, and an I/O controller 7. This is an example of a workstation with a tightly coupled multiprocessor configuration configured by connecting the following with bus l2.
By having a multiprocessor configuration with four units, processing speed can be improved. In the above-mentioned configuration, each processor 10 is equipped with a cache memory 9 to reduce the frequency of access to the bus 12, and a processor 14 with a built-in cache memory is provided with the cache memory 9.
It is configured as
1 is connected. Connection between each processor IO and the I/O controller 8, which controls connections with the shared memory 6 and various I/Os, is performed via a 32-bit wide bus 12. controller 8
is provided. In the workstation configured as described above, each functional block is created in a JC chip, housed in the above-mentioned IC package according to the present invention, and mounted on a printed wiring board as shown in FIG. It is constructed as a

The iC package 1 used for this workstation has an increased number of lead terminals 2, with a total of 93 lead terminals, including 32 data buses, 24 address lines, and 37 control signal and other lines. It is arranged on one side.

Furthermore, four sets of bus controllers 8 are configured as a bus and a bus controller 13 within one IC chip.

The workstation according to the embodiment of the present invention is
An IC package configured as the bus and bus controller 13 described above is mounted in the center of the printed wiring board, and four processors l4 with built-in cache memory, a shared memory 6 and , and I/O controller 7 are mounted adjacent to the IC package configured as the bus controller 13 so that each side faces each other.

In each IC package arranged and mounted as described above, the signal terminals on each side arranged facing each other are arranged so that the signals to be connected face each other, and the trunk 15 on the printed wiring board is arranged so that the signals to be connected face each other. It is designed to connect using the shortest straight line.

Next, we will provide an overview of the operation of the workstation configured as described above. Each processor 10 divides one data process and executes it separately, and also uses a coprocessor 11 to execute floating point operations at high speed. The data processing results are
The data is temporarily stored in the high-speed cache memory 9, and written to the shared memory 6 via the bus l2 under the control of the bus controller 8. The bus controller 8 for each processor 10 has one i
By housing it in the c-chip, it is designed to enable synchronous control with a high-speed clock cycle.
Thereby, data transfer on bus 12 can be performed at high speed.

According to the third embodiment, which is an application example of the present invention described above,
Signals between IC packages are connected using the straight and shortest wiring pattern on the printed wiring board, minimizing signal transmission delays due to pattern wiring length, capacitive load, etc. Speed can be improved. Further, according to the above embodiment, it is possible to reduce the number of detour wiring using through holes on the printed wiring board, so the number of signal layers on the printed wiring board can be reduced, and the printed wiring board can be manufactured at low cost. becomes possible.

Further, by using the IC package constituting the workstation of the above-described embodiment as the IC package according to the second embodiment of the present invention described above, the processing speed of the workstation can be further increased. FIG. 8 is a top view of the fourth embodiment of the present invention, and FIG. 9 shows the IC package according to this embodiment stored in a magazine. In FIGS. 8 and 9, 2l is a bumper, 22 is a magazine, and 23 is a stopper, and the other symbols are the same as in FIG. 1.

In this fourth embodiment, bumpers 21 are provided at a pair of opposing corners of a hexagonal IC package 1, and when the IC package 1 is stored in a magazine 22 for storage, packaging, etc., bumpers 21 are provided at adjacent corners. By arranging the bumpers 21 of the IC packages 1 stored in the magazine 1 to face each other, the lead terminals 2 of the adjacent IC packages 1 are prevented from coming into contact with each other. It is possible to prevent the lead terminals 2 of adjacent 1c packages 1 from coming into contact with the stopper 23 of the magazine 22. Thereby, it is possible to prevent problems such as bending of the lead terminals 2 during storage, transportation, etc. of the IC package 1. FIG. 10 is a diagram illustrating a fifth embodiment of the present invention.
In FIG. 10, 24 is a convex line, 25 is a groove,
Other symbols are the same as in FIGS. 7 and 8. In this fifth embodiment of the present invention, a convex line 24 is provided between a pair of bumpers 21 on the top surface of the IC package l according to the fourth embodiment of the present invention. Further, the magazine 22 that stores the IC package 1 configured as described above is provided with a groove 25 at a position corresponding to the convex line 24 of the IC package 1, as shown in FIG. IC package 1 according to the fifth embodiment of the present invention
When stored in the magazine 22, the convex line 24 and the groove 2
5, the IC package 1 is moved to the magazine 22
Since the inner surface of the magazine 22 and the lead terminals 2 on the side surfaces of the iC package l can be prevented from coming into contact with each other.

This prevents the lead terminals of the IC package from bending or deforming during storage, packaging, transportation, etc., making it easier to handle, and furthermore, making it possible to handle it with an automatic mounting device. It can be done as follows. The IC package according to the embodiment of the present invention described above is one in which the present invention is applied to a flat type IC package, but the present invention is a leadless type, T A B (Tape Automated B
onding) type IC package, 6
It can be applied by putting out lead terminals in the direction.

Furthermore, in the drawings used to explain the embodiments of the present invention, the shape of the IC package according to the present invention is a regular hexagon;
The shape of the IC package may be a hexagon that is longer in the direction of a pair of opposing vertices or longer in the direction of a pair of opposing sides.

Moreover, the embodiment of the present invention explained with FIGS. 6 and 7 is based on the present invention! Although the workstation is configured using the C package, the present invention is not limited thereto and can be configured with any other type of equipment.

[Effects of the Invention] As explained above, according to the present invention, when a system is configured by mounting a plurality of IC packages on a printed wiring board, each IC package can be connected with the shortest wiring distance in six directions. Since it is possible to reduce the signal propagation delay due to wiring, and the wiring inside the IC package can be shortened more uniformly, it is possible to reduce the signal propagation delay inside the IC package. It is possible to reduce noise.

Therefore, for example, when a workstation with a multiprocessor configuration is configured using the IC package according to the present invention, the signal propagation delay between each IC package can be reduced, so that the performance of the system can be further improved.

In addition, when mounting the C package on a printed wiring board, there are no gaps between the IC packages, so high-density mounting is possible, and connections between the IC packages can be bypassed using through holes. Since the number of signal layers on the printed wiring board can be reduced, the printed wiring board can be manufactured at low cost.

[Brief explanation of drawings]

Fig. 1 is a top view of the first embodiment of the present invention, Fig. 2 is its external view, Fig. 3 is a diagram showing its internal configuration, and Fig. 4 is the internal configuration of the second embodiment of the present invention. FIG. 5 is a mounting diagram of the IC packages according to the first and second embodiments of the present invention on a printed wiring board, and FIG. 6 is a diagram showing the third embodiment of the present invention showing an application example of the present invention. FIG. 7 is a block diagram showing the configuration of the embodiment, FIG. 7 is a diagram showing its mounting state on a printed circuit board, FIG. 8 is a top view of the fourth embodiment of the present invention, and FIG. 9 is an IC package according to this embodiment. FIG. 10 is a diagram illustrating the fifth embodiment of the present invention, FIG. 11 is an internal configuration diagram of an iC package according to the prior art, and FIGS. 12 and 13 are conventional iC packages. This is an implementation diagram of an IC package using technology. l... Hexagonal 1C package, 2... Lead terminal, 3... Square IC chip, 4... Bonding wire, 5...
...Hexagonal IC chip, 6...Shared memory, 7...I/O controller, 8...
・Bus controller, 9...Cache memory, 10...Processor, ]l...Kobrosetsa, l2...32-bit bus, 13...
group/bus and bus controller, 14...processor with built-in cache memory, 15...wiring,
16... Rectangular IC package, 17...
...Through hole, 18...Outer layer wiring, 19.
...Inner layer wiring, 21...Bumper, 22
...Magazine, 23...Stopper,
25...Groove. Figure 6 l. ．． ．． ．． Hexagonal JC package 2... Ri-F' connection Figure 2 Figure 3 Figure 1M4 Figure 5 Hexagonal IC4-Rear Figure 5 Figure 6 Figure 7 Figure 8 zl Figure 9 23

Claims (1)

[Scope of Claims] 1. An IC package in which a semiconductor integrated circuit chip is housed and lead terminals are drawn out, characterized in that the outer shape of the IC package is hexagonal. 2. The semiconductor integrated circuit chip housed in the IC package has a hexagonal outer shape, and is provided with connection pads along each side of the semiconductor integrated circuit chip, and each of these sides is parallel to each side of the IC package. 2. The IC package according to claim 1, wherein the IC package is housed in the IC package so that the IC package has the following characteristics.