JPS62260353A - Qsemiconductor device - Google Patents

Abstract

PURPOSE:To prevent the large increase of the volume of the whole even when the number of LSI chips loaded for enlarging a functional scale is increased by laminating and mounting a plurality of wiring substrates so that the main surfaces of the wiring substrates mutually run parallel. CONSTITUTION:A plurality of semiconductor chips 11 having active functions consisting of P-N junctions are disposed onto a plurality of wiring substrates 13, 14, main surfaces of which have wirings mutually connecting and compounding the active functions of these semiconductor chips 11 and external electrodes extracting the functions of the chips to the outside. A plurality of these wiring substrates 13, 14 are laminated and fitted onto an insulating substrate 16 fixing and holding electrical functions acquired by said wiring substrates 13, 14 and having external pins 17 for transmitting the electrical functions over the outside so that the main surfaces of the wiring substrates mutually run parallel. Accordingly, a large number of the LSI chips can be loaded without enlarging the volume of the whole so much, and the number of the LSI chips can easily be increased only by the number of newly laminated layers when the number fo the wiring substrates laminated are increased.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device to which so-called multi-chip packaging, in which a large number of semiconductor chips are assembled in one package, can be applied. It is something.

[Prior Art] Conventionally, in this type of semiconductor device, a semiconductor chip (hereinafter referred to as an LSI chip) is planarly mounted within a package. FIG. 6 is a perspective view of such a conventional semiconductor device, and FIG. 7 is a sectional view thereof. In the figure, 1 is 3i
A PN junction is formed on the main surface of a large number of LSI chips. These many LSI chips 1 constitute the entire function of the semiconductor device. Reference numeral 2 denotes an 'R pole (hereinafter referred to as bump) formed on the LSI chip 1 and made of a Pb-8n alloy. 3 is a wiring board that interconnects the functions of the LSI chip 1, 6 is an insulating board that houses the wiring board 3, 5 is a wire that electrically connects the P2 wire board 3 and the insulating board 6, and 7 is a semiconductor. This is an external bin for taking out the eight functions of the device.

Next, the operation will be explained.

The function of the PN junction formed on the main surface of the LSI chip 1 can be taken out from any position on the same plane as the main surface. Main surface of wiring board 3 and LS on which interconnection wiring is formed
If the main surfaces of the I-chip 1 are arranged parallel to each other and facing each other, the functions of the LSI chip 1 and the interconnection wiring of the IT board 3 can be electrically connected by the bumps 2 located in the gap.

This wiring board 3 is electrically connected to an insulating board 6 via wires 5. The external pins 7 are for taking out the functions of this semiconductor device to the outside, so in the end, the LSI chip 1, the bumps 2, and the wiring I! The functions of the semiconductor device are completed through the 1IJ1 board 3, wires 5, and external pins 7, and can be transmitted to the outside. Since these functions are maintained by a lid (not shown) attached to the insulating substrate 6, these functions are not damaged by normal handling, and the semiconductor device operates as a multi-chip packaged semiconductor device.

[Problems to be Solved by the Invention] In the conventional multi-chip package, the main surface of the LSI chip 1 and the main surface of the wiring board 3 are arranged parallel to each other, and only one wiring board 3 is insulated! Since they were mounted on the S root 6, the number of LSI chips that could be mounted within the semiconductor device was limited. This is because the total area of the main surfaces of the LSI chips 1 to be mounted must be smaller than the area of the main surfaces of the wiring board 3. Therefore, if the number of LSI chips 1 is increased in an attempt to increase the functional scale of the semiconductor device,
The area of the main surface of the wiring board 3 has to be increased, resulting in a large plane of the semiconductor device, resulting in a large device.

This invention was made in order to eliminate the above-mentioned drawbacks of the conventional technology.The purpose of this invention is to increase the number of LSI chips mounted in order to increase the standard scale, but the overall volume remains small. It doesn't increase much.

In other words, the objective is to provide a compact semiconductor device with high packaging density.

[Means for Solving the Problems] A semiconductor device according to the present invention three-dimensionally mounts an LSI chip. Specifically, the semiconductor@mushroom according to the present invention includes a plurality of semiconductor chips, a plurality of wiring boards, and an insulating substrate. The semiconductor chip is PN
It has an active function consisting of bonding. The wiring board has on its main surface wiring that connects and combines the active functions of the semiconductor chips, and external electrodes that take out the n functions to the outside 81i. It has an external pin for fixing and holding the target and transmitting its electrical function to the outside.

And 1! Several distribution &1 substrates are stacked and provided so that their main surfaces are parallel to each other.

[For Shisu 1mm] The thickness of the wiring board on which the LSI chip is planarly mounted is extremely small compared to the length of one side of its main surface. Therefore, multiple distributions I! Il! Even if 8!1 layers of s-plates are stacked so that their main surfaces are flat with each other, the thickness is still small compared to the length of one side of the main surfaces. The LSI chip mounting density of a semiconductor device is the number of Sl chips per volume of the semiconductor device. Here, the volume of the semiconductor device is the product of the total thickness, such as the thickness of the absolute substrate, the thickness of the plate substrate, and the thickness of the plate, and its plane area. Therefore, if the number of layers of the wiring board is increased, the number of LSI chips will increase by the number of layers, but the overall volume will hardly increase. In other words, according to the semiconductor device according to the present invention, the number of LSI chips mounted therein increases by the number of m times the number of stacked LSI chips, although the overall volume does not increase that much.

[Example 1] Fig. 1 is a perspective view showing one embodiment of the present invention, and Fig. 2 is a sectional view thereof. In the figure, 11 is a semiconductor chip (LSI chip) made of 3i and has a PN junction formed on its main surface. 12 is an electrode (bump). 1
Reference numeral 3 denotes a first Si distribution board made of Sl and having wiring for interconnecting the LSI chips 11 formed on its main surface. 14
are the wiring interconnecting the LSI chips 11 and the first wiring.
It is a 1g2 pin board made of Sl and has wiring connecting the functions of six TFIs 13 formed on its main surface. 15au
A wire 15b electrically connects the first green board 13 and the second wiring board 14, and a wire 15b electrically connects the second wiring board 14 and the insulating board 16. Incidentally, the insulating substrate 16 houses the first wiring board 13 and the second wiring board 14. 17 is an external pin for taking out the function of the semiconductor 5A mushroom to the outside, 18 is the first base plate 13 and the second
This is a spacer made of Si and having the same thickness and located between the wiring school temporary 14 and spatially separating them.

Next, the operation will be explained.

The functions of the LSI chip 11 are connected via the bumps 12 to the wiring of the first mm temporary 13, and are connected to each other. A subsystem, which is a part of all the functions of this semiconductor device, is completed in this first port type plate. The other LSI chip 1 is connected to the second LSI chip via the bump 12.
The semiconductor device is similarly connected to the wiring board 14 of the semiconductor device, and here also forms a subsystem that is part of the overall functionality of the semiconductor device. These two subsystems complete the functionality of the semiconductor device. The second wiring board 14 is fixed to the insulating substrate 16. 1st distribution IiI! The main surface of the S board 13 is the second wiring! !
[Spacer 18 so that it is parallel to the main surface of 14
It is laminated on the second wiring board 14 via. The first wiring board 13 and the second wiring board 14 are electrically connected via a wire 15a, and the second wiring board 14 and the insulating board 16 are electrically connected via a wire 15b. By doing this, the subsystem of the first wiring board M13 and the subsystem of the second wiring board 14 are combined, and all their functions are connected to the insulating substrate 16.

The external pin 17 has a structure that extracts the functions of the semiconductor device to the outside, so the entire a
m can be taken out to the outside by an external pin 17.

In this way, according to the embodiment shown in FIGS. 1 and 2, twice the number of LSI chips can be mounted on the same insulating substrate compared to the conventional one, and the functions can be transferred externally. It can be taken out. In this case, since the thickness of the stacked JIB boards is smaller than the length of one side of the main surface, the volume of the semiconductor V4ffi as a whole does not differ much from that of the conventional one. Note that the LSI chip 11, the bump 12, the first
Distribution aalHf213, 2nd distribution! 9th base board 14, wire 15
A, 15+1, etc. are protected by a lid (not shown) surrounding them, so that their functions will not be compromised by normal mounting. In this way, LSI
The first wiring board 13 on which the chip 11 is mounted and the second wiring board 14 are stacked and configured so that their main surfaces are parallel to each other, so that the same insulation function has twice the function as the conventional one. It operates as a full-chip packaging semiconductor device mounted within a substrate.

Note that in the embodiment shown in FIGS. 1 and 2, the number of layers of the first Pil board 13 laminated on the second I2 board 14 is only one, but the number of layers is limited to one. It is not something that will be done. For example, in another embodiment shown in FIG. i1 substrate is used. In addition, as another example, the second distribution Pil board 14
may be formed in the insulating M plate 16 and integrated with the 1!1 base 16.

FIG. 4 is a sectional view showing still another embodiment of the invention. In the embodiments shown in FIGS. 1 and 2, one first base board 13 is laminated on one second base board 14, but in this embodiment, they are almost identical. A plurality of 7G41 wiring boards 13 arranged in a plane are stacked on the second m distribution board 14.

FIG. 5 is a sectional view showing roughly another embodiment of the present invention. In this embodiment, the first wiring 1 #fi 13 and the second wiring board 14 are stacked so that their main surfaces face each other, and furthermore, the wiring boards 13 and 14 are connected via the connector 15C. It is connected.

Note that if the wires 15'a, 15b, :I connector 15C are formed on other wiring, for example, a film, t=CuPi
It may be i-line. Also, the first distribution I! Board 13 toi
2 arrangement 51M plate 14 g (7) f111', 11 arrangement 1
11slf2 [or a heat transfer medium for heat radiation may be arranged on the back surface of the LSI chip.

(Effects of the Invention) As described above, according to the present invention, a plurality of PiI boards to which LSI chips are connected are stacked and installed so that their main surfaces are parallel to each other, so that the overall volume is reduced. One LSI chip can be mounted without significantly increasing the number of layers.By increasing the number of wiring boards to be stacked, the number of LSI chips can be easily increased by twice the number of layers.

As a result, higher density and larger scale semiconductor devices can be easily realized.

[Brief explanation of drawings]

FIG. 1 is a schematic perspective view showing an embodiment of the present invention. FIG. 2 is a schematic cross-sectional view of the embodiment shown in FIG. FIG. 3 is a schematic cross-sectional view of another embodiment of the invention. FIG. 4 is a schematic sectional view of another embodiment of the invention. FIG. 5 is a schematic sectional view of another embodiment of the invention. FIG. 6 is a schematic perspective view of a conventional semiconductor device. 7th
The diagram shows the semiconductor shown in Figure 6! It is a schematic sectional view of ifj#. In the figure, 11 is a semiconductor chip (LSI chip);
3 is the first choice! The iA base, 14 is a second molar board, and 16 is an insulating board. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Agent Masu Oiwa Yuman 1 Figure 16: Kyoko Kijo Man 3 Figure 1 B Figure 4 Figure S

Claims (1)

[Scope of Claims] A plurality of semiconductor chips each having an active function consisting of a PN junction, having on its main surface wiring that connects and combines the active functions of the semiconductor chips with each other and an external electrode that extracts the function to the outside. a plurality of wiring boards, and an insulating board having external pins for fixing and holding electrical functions provided by the wiring boards and transmitting the electrical functions to the outside, the plurality of wiring boards are semiconductor devices that are stacked so that their main surfaces are parallel to each other.