JPH0459971U - - Google Patents

Info

Publication number
JPH0459971U
JPH0459971U JP10307790U JP10307790U JPH0459971U JP H0459971 U JPH0459971 U JP H0459971U JP 10307790 U JP10307790 U JP 10307790U JP 10307790 U JP10307790 U JP 10307790U JP H0459971 U JPH0459971 U JP H0459971U
Authority
JP
Japan
Prior art keywords
circuit board
hybrid integrated
integrated circuit
circuit device
edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10307790U
Other languages
English (en)
Other versions
JPH0745978Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990103077U priority Critical patent/JPH0745978Y2/ja
Publication of JPH0459971U publication Critical patent/JPH0459971U/ja
Application granted granted Critical
Publication of JPH0745978Y2 publication Critical patent/JPH0745978Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【図面の簡単な説明】
第１図と第２図は、本考案の各実施例を示す混
成集積回路装置の斜視図、第３図と第４図は、本
考案の他の各実施例を示す混成集積回路装置の縦
断側面図である。 １……回路基板、２，２′……電子部品、３…
…端子リード、３′，３′……端子電極、４……
吸着用プレート。

Claims (1)

  1. 【実用新案登録請求の範囲】 (1) 絶縁性基板に配線パターンが形成された回
    路基板１と、該回路基板１上に搭載された電子部
    品２，２′と、該回路基板１の一縁部に形成され
    た端子電極とを有する混成集積回路装置であつて
    、 前記回路基板１の端子電極が形成された縁部と
    対向する他方の縁部の端面上に、上面が平坦な吸
    着用プレート４が装着されていることを特徴とす
    る混成集積回路装置。 (2) 前記実用新案登録請求の範囲第１項におい
    て、回路基板１をほぼ垂直に立てたとき、吸着用
    プレート４の上面の中心を通る垂直線が、電子部
    品２，２′及び端子電極を含む回路基板１の重心
    を通過するよう設定されている混成集積回路装置
    。
JP1990103077U 1990-09-29 1990-09-29 混成集積回路装置 Expired - Fee Related JPH0745978Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990103077U JPH0745978Y2 (ja) 1990-09-29 1990-09-29 混成集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990103077U JPH0745978Y2 (ja) 1990-09-29 1990-09-29 混成集積回路装置

Publications (2)

Publication Number Publication Date
JPH0459971U true JPH0459971U (ja) 1992-05-22
JPH0745978Y2 JPH0745978Y2 (ja) 1995-10-18

Family

ID=31847819

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990103077U Expired - Fee Related JPH0745978Y2 (ja) 1990-09-29 1990-09-29 混成集積回路装置

Country Status (1)

Country Link
JP (1) JPH0745978Y2 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010100726A1 (ja) * 2009-03-04 2010-09-10 富士通株式会社 プリント基板モジュール

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01125571U (ja) * 1988-02-19 1989-08-28

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01125571U (ja) * 1988-02-19 1989-08-28

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010100726A1 (ja) * 2009-03-04 2010-09-10 富士通株式会社 プリント基板モジュール
JP5120492B2 (ja) * 2009-03-04 2013-01-16 富士通株式会社 プリント基板モジュール

Also Published As

Publication number Publication date
JPH0745978Y2 (ja) 1995-10-18

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees