JPH0459959U - - Google Patents
Info
- Publication number
- JPH0459959U JPH0459959U JP1990103964U JP10396490U JPH0459959U JP H0459959 U JPH0459959 U JP H0459959U JP 1990103964 U JP1990103964 U JP 1990103964U JP 10396490 U JP10396490 U JP 10396490U JP H0459959 U JPH0459959 U JP H0459959U
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- buffer circuit
- circuit
- grounding
- internal logic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990103964U JPH0459959U (US07655688-20100202-C00086.png) | 1990-10-01 | 1990-10-01 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990103964U JPH0459959U (US07655688-20100202-C00086.png) | 1990-10-01 | 1990-10-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0459959U true JPH0459959U (US07655688-20100202-C00086.png) | 1992-05-22 |
Family
ID=31849052
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990103964U Pending JPH0459959U (US07655688-20100202-C00086.png) | 1990-10-01 | 1990-10-01 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0459959U (US07655688-20100202-C00086.png) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011216592A (ja) * | 2010-03-31 | 2011-10-27 | Oki Semiconductor Co Ltd | 半導体集積回路装置 |
| JP2012109411A (ja) * | 2010-11-17 | 2012-06-07 | Canon Inc | 半導体装置及び半導体装置を搭載したプリント基板 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5552237A (en) * | 1978-10-11 | 1980-04-16 | Nec Corp | Semiconductor device |
| JPS617660A (ja) * | 1984-06-21 | 1986-01-14 | Toshiba Corp | 半導体装置 |
| JPS61264747A (ja) * | 1985-05-20 | 1986-11-22 | Matsushita Electronics Corp | 半導体装置 |
| JPH02121362A (ja) * | 1988-10-31 | 1990-05-09 | Seiko Epson Corp | 半導体装置 |
-
1990
- 1990-10-01 JP JP1990103964U patent/JPH0459959U/ja active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5552237A (en) * | 1978-10-11 | 1980-04-16 | Nec Corp | Semiconductor device |
| JPS617660A (ja) * | 1984-06-21 | 1986-01-14 | Toshiba Corp | 半導体装置 |
| JPS61264747A (ja) * | 1985-05-20 | 1986-11-22 | Matsushita Electronics Corp | 半導体装置 |
| JPH02121362A (ja) * | 1988-10-31 | 1990-05-09 | Seiko Epson Corp | 半導体装置 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011216592A (ja) * | 2010-03-31 | 2011-10-27 | Oki Semiconductor Co Ltd | 半導体集積回路装置 |
| JP2012109411A (ja) * | 2010-11-17 | 2012-06-07 | Canon Inc | 半導体装置及び半導体装置を搭載したプリント基板 |
