JPH0456313B2 - - Google Patents

Info

Publication number
JPH0456313B2
JPH0456313B2 JP57225202A JP22520282A JPH0456313B2 JP H0456313 B2 JPH0456313 B2 JP H0456313B2 JP 57225202 A JP57225202 A JP 57225202A JP 22520282 A JP22520282 A JP 22520282A JP H0456313 B2 JPH0456313 B2 JP H0456313B2
Authority
JP
Japan
Prior art keywords
plane
ram
address
memory
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57225202A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59114589A (ja
Inventor
Takatoshi Ishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP57225202A priority Critical patent/JPS59114589A/ja
Publication of JPS59114589A publication Critical patent/JPS59114589A/ja
Priority to US06/858,553 priority patent/US4823119A/en
Publication of JPH0456313B2 publication Critical patent/JPH0456313B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Digital Computer Display Output (AREA)
  • Image Generation (AREA)
  • Controls And Circuits For Display Device (AREA)
JP57225202A 1982-12-22 1982-12-22 パタ−ン書込み制御回路 Granted JPS59114589A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP57225202A JPS59114589A (ja) 1982-12-22 1982-12-22 パタ−ン書込み制御回路
US06/858,553 US4823119A (en) 1982-12-22 1986-04-24 Pattern write control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57225202A JPS59114589A (ja) 1982-12-22 1982-12-22 パタ−ン書込み制御回路

Publications (2)

Publication Number Publication Date
JPS59114589A JPS59114589A (ja) 1984-07-02
JPH0456313B2 true JPH0456313B2 (enrdf_load_html_response) 1992-09-08

Family

ID=16825572

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57225202A Granted JPS59114589A (ja) 1982-12-22 1982-12-22 パタ−ン書込み制御回路

Country Status (1)

Country Link
JP (1) JPS59114589A (enrdf_load_html_response)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3588174T2 (de) * 1984-07-23 1998-06-10 Texas Instruments Inc Videosystem
JPS6142643U (ja) * 1984-08-24 1986-03-19 日本電気株式会社 複数メモリ同時更新機構
JPH05204352A (ja) * 1992-08-10 1993-08-13 Casio Comput Co Ltd カラー表示装置
US8332598B2 (en) * 2005-06-23 2012-12-11 Intel Corporation Memory micro-tiling request reordering

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5719438B2 (enrdf_load_html_response) * 1972-07-13 1982-04-22
JPS559742B2 (enrdf_load_html_response) * 1974-06-20 1980-03-12
JPS592905B2 (ja) * 1976-08-31 1984-01-21 日本ビクター株式会社 デイスプレイ装置
JPS5916275B2 (ja) * 1980-06-02 1984-04-14 株式会社柏木研究所 図形表示装置
JPS57181589A (en) * 1981-04-30 1982-11-09 Nippon Electric Co Color graphic display unit

Also Published As

Publication number Publication date
JPS59114589A (ja) 1984-07-02

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