JPH0454964B2 - - Google Patents
Info
- Publication number
- JPH0454964B2 JPH0454964B2 JP1405483A JP1405483A JPH0454964B2 JP H0454964 B2 JPH0454964 B2 JP H0454964B2 JP 1405483 A JP1405483 A JP 1405483A JP 1405483 A JP1405483 A JP 1405483A JP H0454964 B2 JPH0454964 B2 JP H0454964B2
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- sample
- scanning
- temperature distribution
- heating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000010438 heat treatment Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 7
- 230000003247 decreasing effect Effects 0.000 claims description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 238000000137 annealing Methods 0.000 description 5
- 230000005855 radiation Effects 0.000 description 5
- 239000013078 crystal Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67115—Apparatus for thermal treatment mainly by radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1405483A JPS59139624A (ja) | 1983-01-31 | 1983-01-31 | 試料の加熱方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1405483A JPS59139624A (ja) | 1983-01-31 | 1983-01-31 | 試料の加熱方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59139624A JPS59139624A (ja) | 1984-08-10 |
| JPH0454964B2 true JPH0454964B2 (ko) | 1992-09-01 |
Family
ID=11850370
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1405483A Granted JPS59139624A (ja) | 1983-01-31 | 1983-01-31 | 試料の加熱方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59139624A (ko) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080173620A1 (en) * | 2005-09-26 | 2008-07-24 | Ultratech, Inc. | Apparatuses and methods for irradiating a substrate to avoid substrate edge damage |
| US10196678B2 (en) | 2014-10-06 | 2019-02-05 | ALVEO Technologies Inc. | System and method for detection of nucleic acids |
| WO2018057647A1 (en) | 2016-09-23 | 2018-03-29 | Alveo Technologies, Inc. | Methods and compositions for detecting analytes |
-
1983
- 1983-01-31 JP JP1405483A patent/JPS59139624A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59139624A (ja) | 1984-08-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6412088B2 (ko) | ||
| US4659422A (en) | Process for producing monocrystalline layer on insulator | |
| JPH0410216B2 (ko) | ||
| US4578143A (en) | Method for forming a single crystal silicon layer | |
| JPH0454964B2 (ko) | ||
| JPH0419698B2 (ko) | ||
| JPS6322056B2 (ko) | ||
| JPS61116820A (ja) | 半導体のアニ−ル方法 | |
| JPS5870536A (ja) | レ−ザアニ−ル方法 | |
| JPH027415A (ja) | Ｓｏｉ薄膜形成方法 | |
| JPH0420254B2 (ko) | ||
| JPS5983993A (ja) | 単結晶半導体層の成長方法 | |
| JPH0133937B2 (ko) | ||
| JPS5833822A (ja) | 半導体基体の製作方法 | |
| JPH05152304A (ja) | 半導体基板の製造方法 | |
| JPH07107894B2 (ja) | 多結晶薄膜基板のアニ−ル方法 | |
| JPS58139423A (ja) | ラテラルエピタキシヤル成長法 | |
| JPH05235321A (ja) | 接続構造形成方法 | |
| JP2692138B2 (ja) | 単結晶薄膜の製造方法 | |
| JPH025295B2 (ko) | ||
| JPS61102723A (ja) | 半導体装置の製造方法 | |
| JP2695462B2 (ja) | 結晶性半導体膜及びその形成方法 | |
| JPH0351091B2 (ko) | ||
| Sakurai | Focused lamp zone melting recrystallization of silicon on insulating substrates | |
| JP2554864B2 (ja) | 半導体薄膜の再結晶化方法 |