JPH0454319B2 - - Google Patents
Info
- Publication number
- JPH0454319B2 JPH0454319B2 JP1340737A JP34073789A JPH0454319B2 JP H0454319 B2 JPH0454319 B2 JP H0454319B2 JP 1340737 A JP1340737 A JP 1340737A JP 34073789 A JP34073789 A JP 34073789A JP H0454319 B2 JPH0454319 B2 JP H0454319B2
- Authority
- JP
- Japan
- Prior art keywords
- column
- column address
- columns
- data line
- data lines
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000015654 memory Effects 0.000 claims description 69
- 239000004065 semiconductor Substances 0.000 claims description 20
- 238000002955 isolation Methods 0.000 claims 8
- 239000011159 matrix material Substances 0.000 claims 1
- 230000002950 deficient Effects 0.000 description 27
- 230000007547 defect Effects 0.000 description 17
- 238000010586 diagram Methods 0.000 description 6
- 238000007796 conventional method Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000007667 floating Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Dram (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1340737A JPH02276098A (ja) | 1989-01-10 | 1989-12-29 | 半導体メモリ装置 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP315989 | 1989-01-10 | ||
| JP1-3159 | 1989-01-10 | ||
| JP1340737A JPH02276098A (ja) | 1989-01-10 | 1989-12-29 | 半導体メモリ装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02276098A JPH02276098A (ja) | 1990-11-09 |
| JPH0454319B2 true JPH0454319B2 (zh) | 1992-08-31 |
Family
ID=26336672
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1340737A Granted JPH02276098A (ja) | 1989-01-10 | 1989-12-29 | 半導体メモリ装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02276098A (zh) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5841500A (ja) * | 1981-08-24 | 1983-03-10 | フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン | 欠陥分離用デコ−ダ |
| JPS59135700A (ja) * | 1983-01-21 | 1984-08-03 | Hitachi Micro Comput Eng Ltd | 半導体記憶装置 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2590897B2 (ja) * | 1987-07-20 | 1997-03-12 | 日本電気株式会社 | 半導体メモリ |
-
1989
- 1989-12-29 JP JP1340737A patent/JPH02276098A/ja active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5841500A (ja) * | 1981-08-24 | 1983-03-10 | フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン | 欠陥分離用デコ−ダ |
| JPS59135700A (ja) * | 1983-01-21 | 1984-08-03 | Hitachi Micro Comput Eng Ltd | 半導体記憶装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02276098A (ja) | 1990-11-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5617365A (en) | Semiconductor device having redundancy circuit | |
| EP0142127B1 (en) | Redundancy circuit for a semiconductor memory device | |
| US4837747A (en) | Redundary circuit with a spare main decoder responsive to an address of a defective cell in a selected cell block | |
| US5265055A (en) | Semiconductor memory having redundancy circuit | |
| US5386386A (en) | Redundancy circuit having a spare memory block replacing defective memory cells in different blocks | |
| US5255228A (en) | Semiconductor memory device with redundancy circuits | |
| KR100278086B1 (ko) | 퓨즈 수를 줄인 메모리 장치 | |
| JPH07122096A (ja) | 半導体メモリ用高速冗長行及び列 | |
| JPH0320840B2 (zh) | ||
| JPH1040694A (ja) | 半導体記憶装置 | |
| US4485459A (en) | Redundant columns for byte wide memories | |
| GB2302748A (en) | Semiconductor memory cell repair | |
| KR0140350B1 (ko) | 반도체 기억 장치 | |
| JP3862220B2 (ja) | 半導体記憶装置 | |
| US5612917A (en) | Semiconductor memory device including improved redundancy circuit | |
| JPH0997498A (ja) | 読み出し専用半導体記憶装置 | |
| JPH0454319B2 (zh) | ||
| JP2695411B2 (ja) | 半導体記憶装置 | |
| US6249466B1 (en) | Row redundancy scheme | |
| JPH1027494A (ja) | 半導体メモリ | |
| EP0378332B1 (en) | Semiconductor memory device with redundancy circuits | |
| KR0130176B1 (ko) | 반도체 소자의 로오 리페어 퓨즈박스 | |
| JP2859780B2 (ja) | 半導体記憶装置 | |
| KR20020031438A (ko) | 클러스터 칼럼 디코딩 구조를 가지는 반도체 메모리 장치 | |
| JPH02210698A (ja) | 半導体メモリ装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |