JPH0451152U - - Google Patents
Info
- Publication number
- JPH0451152U JPH0451152U JP9414490U JP9414490U JPH0451152U JP H0451152 U JPH0451152 U JP H0451152U JP 9414490 U JP9414490 U JP 9414490U JP 9414490 U JP9414490 U JP 9414490U JP H0451152 U JPH0451152 U JP H0451152U
- Authority
- JP
- Japan
- Prior art keywords
- memory
- microcomputer
- pins
- utility
- scope
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Description
第１図は、この考案に係るＩＣピンレイアウト
の一実施例を示すマイクロコンピユータとメモリ
を配線パターンにより接続した基板の平面図、第
２図はこの考案の他の実施例によるマイクロコン
ピユータとメモリを搭載した基板の側面図、第３
図は従来のマイクロコンピユータとメモリを配線
パターンにより接続した基板の平面図である。
図において、１はマイクロコンピユータ、２は
メモリ、３は配線パターン、４は基板である。な
お、図中、同一符号は同一、又は相当部分を示す
。
FIG. 1 is a plan view of a board in which a microcomputer and memory are connected by a wiring pattern, showing one embodiment of the IC pin layout according to this invention, and FIG. Side view of the mounted board, 3rd
The figure is a plan view of a board on which a conventional microcomputer and memory are connected by a wiring pattern. In the figure, 1 is a microcomputer, 2 is a memory, 3 is a wiring pattern, and 4 is a board. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
れるべきピンを、平行パターン等により容易に接
続できるようにピン配置をそろえたことを特徴と
するＩＣピンレイアウト。 An IC pin layout characterized in that pins to be connected to each other between a microcomputer and a memory are arranged in a parallel pattern so that they can be easily connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9414490U JPH0451152U (en) | 1990-09-05 | 1990-09-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9414490U JPH0451152U (en) | 1990-09-05 | 1990-09-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0451152U true JPH0451152U (en) | 1992-04-30 |
Family
ID=31831859
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9414490U Pending JPH0451152U (en) | 1990-09-05 | 1990-09-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0451152U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59144155A (en) * | 1983-02-08 | 1984-08-18 | Nec Corp | Integrated circuit package |
| JPS6313603A (en) * | 1986-07-04 | 1988-01-20 | Hitachi Ltd | Rolling mill |
-
1990
- 1990-09-05 JP JP9414490U patent/JPH0451152U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59144155A (en) * | 1983-02-08 | 1984-08-18 | Nec Corp | Integrated circuit package |
| JPS6313603A (en) * | 1986-07-04 | 1988-01-20 | Hitachi Ltd | Rolling mill |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0451152U (en) | ||
| JPH0396065U (en) | ||
| JPH0224573U (en) | ||
| JPH0170357U (en) | ||
| JPS61174767U (en) | ||
| JPH03124659U (en) | ||
| JPS619870U (en) | Printed wiring connection structure | |
| JPH02137009U (en) | ||
| JPS62180959U (en) | ||
| JPH01167056U (en) | ||
| JPS59152765U (en) | printed board | |
| JPH0444174U (en) | ||
| JPH0226275U (en) | ||
| JPH0263568U (en) | ||
| JPH0399462U (en) | ||
| JPH01173958U (en) | ||
| JPS6359385U (en) | ||
| JPS62120375U (en) | ||
| JPH01146488U (en) | ||
| JPS6387840U (en) | ||
| JPH0321865U (en) | ||
| JPH0221788U (en) | ||
| JPH0343761U (en) | ||
| JPS6432164U (en) | ||
| JPH03104754U (en) |