JPS59144155A - Integrated circuit package - Google Patents

Integrated circuit package

Info

Publication number
JPS59144155A
JPS59144155A JP1815283A JP1815283A JPS59144155A JP S59144155 A JPS59144155 A JP S59144155A JP 1815283 A JP1815283 A JP 1815283A JP 1815283 A JP1815283 A JP 1815283A JP S59144155 A JPS59144155 A JP S59144155A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
packages
terminals
centers
point symmetrically
disposed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1815283A
Inventor
Kenichi Omae
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components

Abstract

PURPOSE:To enable to shorten and simplify wirings between packages by disposing point symmetrically to the center of packages terminals of two opposed sides, and using power terminals and ground terminals in such a manner that two terminals disposed point symmetrically to the centers of the packages are as a pair. CONSTITUTION:Terminals 3, 4, 5 of two opposed sides of IC packages 15, 16, 23, 24 are disposed point symmetrically to the centers O of the packages, and power terminals 3 and ground terminals 4 are respectively used in such a manner that two terminals disposed point symmetrically to the centers O of the packages are as a pair. Thus, since the IC packages can be placed on a printed circuit board in a direction turned at 180 deg., the wirings 12 between the packages can be disposed to be shortened and simplified.
JP1815283A 1983-02-08 1983-02-08 Integrated circuit package Pending JPS59144155A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1815283A JPS59144155A (en) 1983-02-08 1983-02-08 Integrated circuit package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1815283A JPS59144155A (en) 1983-02-08 1983-02-08 Integrated circuit package

Publications (1)

Publication Number Publication Date
JPS59144155A true true JPS59144155A (en) 1984-08-18

Family

ID=11963638

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1815283A Pending JPS59144155A (en) 1983-02-08 1983-02-08 Integrated circuit package

Country Status (1)

Country Link
JP (1) JPS59144155A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61244054A (en) * 1985-04-23 1986-10-30 Zerozu Kk Method for mounting ic package in input circuit
US4674007A (en) * 1985-06-07 1987-06-16 Microscience Corporation Method and apparatus for facilitating production of electronic circuit boards
JPH0451152U (en) * 1990-09-05 1992-04-30
JPH0666704U (en) * 1993-03-03 1994-09-20 泰佑 柳 圧鋒 for finger
US5420756A (en) * 1992-06-19 1995-05-30 Kabushiki Kaisha Toshiba Memory card including stacked semiconductor memory elements located on a printed circuit board having a straight wiring pattern
US5502621A (en) * 1994-03-31 1996-03-26 Hewlett-Packard Company Mirrored pin assignment for two sided multi-chip layout
USRE36077E (en) * 1991-10-15 1999-02-02 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing inversion type IC's and IC module using same
US5973951A (en) * 1992-05-19 1999-10-26 Sun Microsystems, Inc. Single in-line memory module
US6219909B1 (en) 1990-11-28 2001-04-24 Hitachi, Ltd. Method of mounting disk drive apparatus

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5360169A (en) * 1976-11-10 1978-05-30 Fujitsu Ltd Semiconductor integrated circuit device
JPS5732659A (en) * 1980-08-05 1982-02-22 Mitsubishi Electric Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5360169A (en) * 1976-11-10 1978-05-30 Fujitsu Ltd Semiconductor integrated circuit device
JPS5732659A (en) * 1980-08-05 1982-02-22 Mitsubishi Electric Corp Semiconductor device

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61244054A (en) * 1985-04-23 1986-10-30 Zerozu Kk Method for mounting ic package in input circuit
US4674007A (en) * 1985-06-07 1987-06-16 Microscience Corporation Method and apparatus for facilitating production of electronic circuit boards
JPH0451152U (en) * 1990-09-05 1992-04-30
US6856482B2 (en) 1990-11-28 2005-02-15 Hitachi, Ltd. Disk drive apparatus and method of mounting same
US7227712B2 (en) 1990-11-28 2007-06-05 Hitachi Global Storage Technologies Japan, Ltd. Disk drive apparatus and method of mounting same
US6219909B1 (en) 1990-11-28 2001-04-24 Hitachi, Ltd. Method of mounting disk drive apparatus
USRE36077E (en) * 1991-10-15 1999-02-02 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing inversion type IC's and IC module using same
US5973951A (en) * 1992-05-19 1999-10-26 Sun Microsystems, Inc. Single in-line memory module
US5420756A (en) * 1992-06-19 1995-05-30 Kabushiki Kaisha Toshiba Memory card including stacked semiconductor memory elements located on a printed circuit board having a straight wiring pattern
JPH0666704U (en) * 1993-03-03 1994-09-20 泰佑 柳 圧鋒 for finger
US5502621A (en) * 1994-03-31 1996-03-26 Hewlett-Packard Company Mirrored pin assignment for two sided multi-chip layout

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