JPS59152765U - printed board - Google Patents

printed board

Info

Publication number
JPS59152765U
JPS59152765U JP4775783U JP4775783U JPS59152765U JP S59152765 U JPS59152765 U JP S59152765U JP 4775783 U JP4775783 U JP 4775783U JP 4775783 U JP4775783 U JP 4775783U JP S59152765 U JPS59152765 U JP S59152765U
Authority
JP
Japan
Prior art keywords
printed board
monitor
pattern wiring
monitor patterns
patterns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4775783U
Other languages
Japanese (ja)
Inventor
種子田　親光
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP4775783U priority Critical patent/JPS59152765U/en
Publication of JPS59152765U publication Critical patent/JPS59152765U/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図のａは従来のプリント板の概略を示す斜視図、ｂ
は半導体素子の外観を示す斜視図、第２図は本考案によ
るプリント板の一実施例を示す説明図を示す。 図中において、１は半導体素子、１−１は接続バット、
１−２は一端、１−３は他端、１−４はモニタ用パター
ン、２はプリント板、３Ａ、　　３Ｂはモニタ端子片、
４はパターン配線を示す。Fig. 1 a is a perspective view schematically showing a conventional printed board, b
2 is a perspective view showing the external appearance of a semiconductor element, and FIG. 2 is an explanatory view showing an embodiment of a printed board according to the present invention. In the figure, 1 is a semiconductor element, 1-1 is a connection bat,
1-2 is one end, 1-3 is the other end, 1-4 is a monitor pattern, 2 is a printed board, 3A and 3B are monitor terminal pieces,
4 indicates pattern wiring.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] モニタ用パターンを有する半導体素子が複数個搭載され
たプリント板において、前記モニタ用パターンの検出が
行なえるよう該モニタ用パターンのそれぞれを直列罎こ
接続せしめるパターン配線と、該パターン配線の始端お
よび終端が接続されたモニタ端子片とを設けたことを特
徴とするプリント板。In a printed board on which a plurality of semiconductor elements having monitor patterns are mounted, a pattern wiring that connects each of the monitor patterns in series so that the monitor patterns can be detected, and a starting end and a terminal end of the pattern wiring. A printed board characterized in that it is provided with a monitor terminal piece to which is connected.
JP4775783U 1983-03-31 1983-03-31 printed board Pending JPS59152765U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4775783U JPS59152765U (en) 1983-03-31 1983-03-31 printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4775783U JPS59152765U (en) 1983-03-31 1983-03-31 printed board

Publications (1)

Publication Number Publication Date
JPS59152765U true JPS59152765U (en) 1984-10-13

Family

ID=30178304

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4775783U Pending JPS59152765U (en) 1983-03-31 1983-03-31 printed board

Country Status (1)

Country Link
JP (1) JPS59152765U (en)

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