JPS59152764U

JPS59152764U - printed board

Info

Publication number: JPS59152764U
Application number: JP4775683U
Authority: JP
Inventors: 晋岡崎
Original assignee: 富士通株式会社
Priority date: 1983-03-31
Filing date: 1983-03-31
Publication date: 1984-10-13

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図のａはプリント板の斜視図、ｂは半導体素子の外
観を示す斜視図、第２図は本考案によるプリント板の一
実施例を示すａは斜視図、ｂは接続の説明図を示す。図中において、１は半導体素子、１−１は接続バット、
１−２．１−３はスルホール、１−４゜１−５はモニタ
用パターン、２はプリント板、２−１〜２−ｎ、２−１
１〜２−１ｎ、２−２１〜２−２ｎ、２−３１〜２−３
ｎはパターンを示す。In FIG. 1, a is a perspective view of a printed board, b is a perspective view showing the external appearance of a semiconductor element, FIG. 2 is a perspective view of an embodiment of the printed board according to the present invention, and b is an explanatory diagram of connections. show. In the figure, 1 is a semiconductor element, 1-1 is a connection bat,
1-2.1-3 is a through hole, 1-4゜1-5 is a monitor pattern, 2 is a printed board, 2-1 to 2-n, 2-1
1-2-1n, 2-21-2-2n, 2-31-2-3
n indicates a pattern.

Claims

[Scope of utility model registration request]

In a printed board on which a plurality of semiconductor elements are mounted, each of which has at least two sets of monitoring patterns for detecting cracks or interlayer deviations in a substrate, each of the monitoring patterns has two sets of monitoring patterns adjacent to each other so as to be detected in a grid pattern. A printed board characterized in that one of the patterns is connected in series in the X direction, and the other pattern is connected in series in the Y direction.