JPH0451118B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit that prevents flicker that occurs when converting a field signal to an interlaced scanning frame signal, and is independent of the temperature characteristics and aging of each part of the field/frame conversion circuit. ,
Furthermore, flicker can be prevented without requiring severe adjustments.

In television scanning, so-called interlaced scanning is used in which horizontal scanning lines are skipped every few lines in order to reduce flickering to the eyes. Generally, skip every other line [2:1]
Interlaced scanning is widely used. [2:1] In the interlaced scanning method, one screen (frame) is created by overlapping two coarse screens (fields) created by one vertical scan. The field repetition rate is typically 60 times per second, the frame repetition rate is 30 times per second, and one frame is typically represented by 525 horizontal scan lines. Further, in odd-numbered fields and even-numbered fields, the starting point of horizontal scanning is shifted by 1/2 of the horizontal scanning period (H), that is, 0.5H. FIG. 1 shows a typical example of a composite video signal (frame signal) representing a frame. In the figure, 1 and 2 are composite video signals (field signals) representing fields, respectively.
where 1 is for odd fields and 2 is for even fields. 3 is the vertical blanking period;
4 is the front equalization pulse, 5 is the vertical synchronization signal, 6
7 is a cutting pulse, 7 is a back equalization pulse, 8 is a horizontal synchronizing signal, and 9 is a video signal. Section A in FIG. 1 is enlarged and shown in FIG. 2. 10 is a horizontal blanking period, 11 is a front porch, 12 is a back porch, 13 is a pedestal level, and 14 is a sync level.

By the way, when recording video signals on magnetic tape, magnetic disk, or other various recording media, 1
It is common to allocate one field of signals to each track or one frame of signals to each track. Also, in one field/one track recording, there are so-called one frame/two track recording in which an odd numbered field and an even numbered field are recorded one after another, and field recording in which only one of the even and odd fields is recorded.

In the reproduction of field recording, a so-called field/frame conversion method is often used, which takes advantage of the strong vertical correlation of video signals and scans the same track twice to create a frame signal from one type of field signal. This is mainly aimed at improving the recording density, making it possible to record for a long time in the case of movies, and increasing the number of frames in the case of stills. However, when converting a field signal into a frame signal, interlaced scanning cannot be achieved by simply repeating and reproducing the same field signal twice. The reason for this is that for interlaced scanning, the vertical synchronizing signal 5
The time relationship between the horizontal synchronizing signal 8 and the video signal 9 of each line is odd field 1 and even field 2.
This is because, while a 0.5H time difference is necessary for , simply repeating the same field signal does not result in a 0.5H time difference.

Therefore, as shown in Fig. 3, the same field signal that is repeatedly reproduced is passed through a 0.5H delay line 15, and an analog switch 16 is used to connect the through field signal 17 and the 0.5H delay field signal 18 to one vertical line. Field signals are converted into frame signals by alternately selecting them every scanning period (1V). In addition, as it is, the interval between vertical synchronization signals will be from 1V to
Since the difference is 0.5H, it is considered that, for example, the contacts c and d of the analog switch 16 are selected as shown in FIG. That is, of the period in which the through field signal 17 is selected, the 0.5H delay field signal 18 is selected only in the portion 19 from the front equalization pulse section to the back equalization pulse section. In any case, to convert the field signal into a frame signal, a circuit is used that selects between a through signal and a 0.5H delay signal, as shown in FIG.

However, since the delay line 15 not only attenuates the transmission time but also considerably attenuates the signal, and because the offset voltage of the analog switch 16 differs between contacts c and d, the signal level of the converted frame signal varies between even and odd fields. There is a difference in the pedestal level and flickering occurs on the screen. In order to prevent flicker, a circuit shown in FIG. 5 has conventionally been adopted. In Figure 5,
20 is an amplifier, 21 and 22 are clamp circuits, VR ₁
is a potentiometer for gain adjustment, and VR ₂ is a potentiometer for clamp level adjustment. In this anti-flicker circuit, the gain of the amplifier 20 is adjusted at VR ₁ so that the signal level is equal for each field in the converted frame signal, and the gain of the amplifier 20 is adjusted at VR ₂ so that the pedestal level is equal for each field. Adjust the level. However,
Since the above-mentioned adjustment is performed manually, a severe adjustment of -40 dB or more is said to be unsuitable for flicker prevention, and mass production is not possible. Also, 0.5H delay line 15, analog switch 16, amplifier 20, and clamp circuits 21, 22
has temperature characteristics and changes over time,
Even if the flicker was once suppressed by adjusting VR ₁ or VR ₂ , it was not possible to suppress the flicker caused by temperature characteristics or aging.

SUMMARY OF THE INVENTION In view of the problems of the prior art described above, an object of the present invention is to provide a circuit that can automatically prevent flicker occurring in a field signal/frame signal conversion circuit without being affected by temperature characteristics or changes over time. shall be.

The configuration of the present invention that achieves this objective repeats the same field signal, and alternately selects a field signal delayed by 1/2 horizontal scanning period and a through field signal every vertical scanning period by switching a switch. In the circuit that converts the frame signal into a frame signal, there is a circuit that detects the peak value of the through field signal of the frame signal, a circuit that detects the peak value of the delayed field signal, and a detection circuit that detects both peaks. a differential amplifier that outputs the value difference; an automatic gain controller that is inserted into the delay or through line and controlled by the peak value difference signal to keep the sync level constant;
A switch that samples the pedestal level of the frame signal every horizontal scanning period, a circuit that calculates the average value of each sample value, and a circuit that is connected to each delay and through line and is controlled by the average value signal of the sampled values and controls the pedestal level of the frame signal. It is characterized by having a feedback clamp circuit that keeps the level constant.

The present invention will be explained below with reference to the drawings. FIG. 6 shows an embodiment of the flicker prevention circuit of the present invention. FIG. 7 is an explanatory diagram of the operation of each part in FIG. 6. In Figure 6, 15 is a 0.5H delay line, 16 is an analog switch for field selection, and 23 is an AGC
Loop 30 is a feedback clamp loop. The AGC loop 23 includes an automatic gain controller 24,
It is composed of a field selection switch 16, input selection switches 25 and 26, peak detectors 27 and 28, and a differential amplifier 29. Feedback clamp loop 30 connects field selection switch 1
6. Sampling switch 31, integrating circuit 32
and feedback clamp circuits 33 and 34.

The AGC loop is at the sink level (code 1 in Figure 2).
4) is constant, and the peak value of, for example, an even field detected by one peak detector 27 and the peak value of, for example, an odd field detected by the other peak detector 28 are detected by a differential amplifier. 29 and controlling the automatic gain controller 24 with the difference signal 29a, the peak values are matched between even and odd fields. If the peak value is constant, the sync level and signal level will be constant. Regarding the time constant, a time constant is selected that responds at least in field units so that the signal level of a subsequent field matches the signal level of a previous field. In addition, Fig. 7a
indicates a frame signal, and the input selection switches 25 and 26 in FIG. 6 are turned on and off as shown in FIGS. 7c and 7d, respectively, by the switch control pulse 35 and inverter 36 in FIG. 7b. Accordingly, each of the peak detectors 27 and 28 has the values shown in FIG.
As shown in figure f, a signal is input every 1V.

On the other hand, the feedback clamp loop operates so that the pedestal level (numeral 13 in FIG. 2) is constant, and the pedestal level is sampled in each horizontal scanning period by the switch 31.
The sample values are averaged by an integrating circuit 32, and the feedback clamp circuits 33 and 34, whose outputs give the pedestal level, are controlled by the average value signal 32a, so that the pedestal level is made to match in each horizontal scanning period. There is. The time constant of this feedback clamp loop is set to be several H or less at most, and when the field is switched, it is 1 H.
The clamp becomes stable between ~2H. As a result, even if there are variations in the characteristics of the two feedback clamp circuits 33 and 34, flicker is quickly eliminated. Note that FIG. 7g shows the sampling timing of the switch 31.

As explained above, by detecting the difference between the peak values of even and odd fields and controlling the automatic gain controller with the difference signal, the signal level can be made constant between fields, and the pedestal level can be adjusted for each horizontal scanning period. The pedestal level is kept constant by sampling, calculating the average value, and controlling the clamp level with the average value signal, so even if the circuit that converts the field signal to the frame signal has temperature characteristics or changes over time, it will not be affected by these. Fritz can be suppressed without causing any problems. Also,
The signal level and pedestal level are automatically adjusted, making it highly suitable for mass production.

In the embodiment shown in FIG. 6, the automatic gain controller 24
is placed on the same line as 0.5H delay line 15, but it can also be placed on the through side line. In this case, it is preferable to reverse the inputs of the differential amplifier 29 as shown in FIG. Capacitors 37 and 38 in FIGS. 6 and 8 are for DC cut.

[Brief explanation of the drawing]

Figure 1 is an explanatory diagram of the frame signal, and Figure 2 is an explanatory diagram of the frame signal.
An enlarged explanatory diagram of part A in the figure, Fig. 3 is a principle circuit diagram of field signal/frame signal conversion, Fig. 4 is an explanatory diagram of switch operation, Fig. 5 is a circuit diagram showing a conventional flicker prevention circuit, FIG. 6 is a circuit diagram showing one embodiment of the present invention, FIG. 7 is an explanatory diagram of the operation of each part in FIG. 6, and FIG. 8 is a circuit diagram showing main parts of another embodiment. In the drawing, 15 is a 0.5H delay line, 16 is a field changeover switch, 23 is an AGC loop,
24 is an automatic gain controller, 25 and 26 are input selection switches, 27 and 28 are peak detectors, 29 is a differential amplifier, 30 is a feedback clamp loop, 31 is a sampling switch, 32 is an integrating circuit, 33 and 34 are feedback clamp circuits, and 35 is an inverter.

Claims (1)

[Claims] 1. In a circuit that repeats the same field signal and converts it into a frame signal by alternately selecting a field signal delayed by 1/2 horizontal scanning period and a through field signal every 1 vertical scanning period by switching a switch. , a circuit that detects the peak value of the through field signal of the frame signal, a circuit that detects the peak value of the delayed field signal, and a differential amplifier that outputs the difference between the detection values of both peak detection circuits. , an automatic gain controller inserted in the delay or through line and controlled by the peak value difference signal to keep the sync level constant; a switch that samples the pedestal level of the frame signal every horizontal scanning period; and a switch that samples the pedestal level of the frame signal every horizontal scanning period. Flicker in field signal/frame signal conversion which has a circuit for calculating the average value and a feedback clamp circuit connected to each delay and through line and controlled by the average value signal of the sample value to keep the pedestal level of the frame signal constant. prevention circuit.