JPH0446402A - Microwave integrated circuit device - Google Patents
Microwave integrated circuit deviceInfo
- Publication number
- JPH0446402A JPH0446402A JP2154778A JP15477890A JPH0446402A JP H0446402 A JPH0446402 A JP H0446402A JP 2154778 A JP2154778 A JP 2154778A JP 15477890 A JP15477890 A JP 15477890A JP H0446402 A JPH0446402 A JP H0446402A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- electrode
- thin film
- integrated circuit
- film capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 55
- 239000010409 thin film Substances 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims description 9
- 230000000903 blocking effect Effects 0.000 abstract description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 5
- 239000010931 gold Substances 0.000 abstract description 5
- 229910052737 gold Inorganic materials 0.000 abstract description 5
- 239000010408 film Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 241000287462 Phalacrocorax carbo Species 0.000 description 1
- 241000270295 Serpentes Species 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、高周波帯域で用いられるマイクロ波集積回路
装置に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a microwave integrated circuit device used in a high frequency band.
従来の技術
数100MHz以上の高周波帯で使用されるマイクロ波
集積回路装置には、例えば半導体を用いた増幅器回路や
発振器回路がある。この中でシリコントランジスタやG
aAsFET(砒化ガリウム電界効果トランジスタ)を
増幅素子として用いた電力増幅装置の整合回路を取り上
げる。上記半導体素子の入出力インピーダンスは、−C
に非常に小さく数Ω程度である。しかし、外部高周波回
路は通常50Ωになっている。そこで、前述の整合回路
が、増幅装置に必要になってくる。Conventional microwave integrated circuit devices used in high frequency bands of 100 MHz or more include, for example, amplifier circuits and oscillator circuits using semiconductors. Among these, silicon transistors and G
A matching circuit for a power amplifier using an aAsFET (gallium arsenide field effect transistor) as an amplifying element will be discussed. The input/output impedance of the above semiconductor element is -C
It is very small, on the order of several ohms. However, the external high frequency circuit is usually 50Ω. Therefore, the above-mentioned matching circuit becomes necessary for the amplifier device.
以下に従来のマイクロ波集積回路装置について説明する
。第3図に示すように、入力側の誘電体基板1の上に入
力側マイクロストリップの主線路2と入力側外部バイア
ス回路との接続のためのワイヤ7を備えた入力側のバイ
アス回路6と入力側直流阻止用のチップコンデンサ24
と入力インピーダンス整合用のスタブ25と入力インピ
ーダンス微調整用の島状スタブ26とを設け、ワイヤ2
7でスタブ25と島状スタブ26を接続する。A conventional microwave integrated circuit device will be explained below. As shown in FIG. 3, an input side bias circuit 6 is provided with a wire 7 for connecting the input side microstrip main line 2 and the input side external bias circuit on the input side dielectric substrate 1. Chip capacitor 24 for input side DC blocking
A stub 25 for input impedance matching and an island-like stub 26 for fine adjustment of input impedance are provided, and the wire 2
At 7, the stub 25 and the island-shaped stub 26 are connected.
また、出力側の誘電体基板13の上に出力側マイクロス
トリップの主線路14と出力側外部バイアス回路との接
続のためのワイヤ18を備えた出力側のバイアス回路1
7と出力側直流阻止用のチッブコンデンサ28と出力イ
ンピーダンス整合用のスタブ29と出力インピーダンス
微調整用の島状スタブ30とを設け、ワイヤ31でスタ
ブ29と島状スタブ30を接続する。Further, an output side bias circuit 1 is provided with a wire 18 for connecting the main line 14 of the output side microstrip and an output side external bias circuit on the output side dielectric substrate 13.
7, a chip capacitor 28 for blocking DC on the output side, a stub 29 for output impedance matching, and an island-like stub 30 for finely adjusting the output impedance are provided, and the stub 29 and the island-like stub 30 are connected with a wire 31.
さらに、入力側マイクロストリップの主線路2をトラン
ジスタ4の入力側とワイヤ3で接続し、出力側マイクロ
ストリップの主線路14をトランジスタ4の出力側とワ
イヤ15で接続する。Further, the main line 2 of the input side microstrip is connected to the input side of the transistor 4 by a wire 3, and the main line 14 of the output side microstrip is connected to the output side of the transistor 4 by a wire 15.
以上のようにマイクロストリップ主線路にスタブを付加
することによってインピーダンスの調整を行っていたが
、このような整合の仕方はスタブの長さが非常に長くな
り、また、そのスタブを立てる位置によってインピーダ
ンスが異なるので、正確な調整が困難であるという欠点
があった。この欠点を改善するために第4図に示すよう
に、入力側誘電体基板1の上にアース面11と千ノブコ
ンデンサ32を接続した先端開放スタブ33を設け、チ
ップコンデンサ32の他方の電極をアース面11と半田
付けする。As mentioned above, impedance was adjusted by adding stubs to the microstrip main line, but this method of matching requires a very long stub, and the impedance changes depending on the position of the stub. Since the values are different, accurate adjustment is difficult. In order to improve this shortcoming, as shown in FIG. Solder it to the ground plane 11.
また、出力側誘電体基板13の上にアース面22とチッ
プコンデンサ34を接続した先端開放スタブ35を設け
、チップコンデンサ34の他方の電極をアース面22と
半田付けする。Further, an open-end stub 35 connecting the ground plane 22 and the chip capacitor 34 is provided on the output side dielectric substrate 13, and the other electrode of the chip capacitor 34 is soldered to the ground plane 22.
この構成によって、スタブの長さが短くでき、また、そ
の取り付は位置の差によるインピーダンスの不整合も修
正が可能となった(例えば特開昭58−137314号
公報参照)。With this configuration, the length of the stub can be shortened, and it is also possible to correct impedance mismatch due to a difference in the mounting position (see, for example, Japanese Patent Laid-Open No. 137314/1982).
発明が解決しようとする課題
しかしながら上記の従来の構成では、先端開放スタブを
用いているので、この部分の調整が困難であるという問
題点や多くのチップコンデンサを用いているので、形状
を十分に小形化できないという問題点を有していた。Problems to be Solved by the Invention However, in the conventional configuration described above, since an open-ended stub is used, there is a problem in that it is difficult to adjust this part, and since a large number of chip capacitors are used, it is difficult to adjust the shape sufficiently. The problem was that it could not be made smaller.
本発明は上記従来の問題点を解決するもので、マイクロ
波集積回路装置の小形化が可能で、かつ必要な容量に対
応でき、また、容量の微調整に対しても容8に対応でき
るマイクロ波集積回路装置を提供することを目的とする
。The present invention solves the above-mentioned conventional problems, and makes it possible to miniaturize a microwave integrated circuit device, accommodate the required capacity, and also accommodate fine adjustment of the capacity. The purpose of the present invention is to provide a wave integrated circuit device.
課題を解決するための手段
この!I題を解決するために本発明のマイクロ波集積回
路装置は、誘電体基板上に形成したマイクロ波集積回路
に薄膜コンデンサを備え、その1に誘電体の上下両面に
電極を設け、かつその上面の電極からアースをとる構成
のチップコンデンサを備えた構成およびチップコンデン
サの上面の電極に島状電極を付加した構成を有している
。This is the means to solve the problem! In order to solve problem I, the microwave integrated circuit device of the present invention includes a microwave integrated circuit formed on a dielectric substrate and a thin film capacitor. It has a structure including a chip capacitor that is grounded from the electrode of the chip capacitor, and a structure in which an island-shaped electrode is added to the electrode on the top surface of the chip capacitor.
作用
この構成によって、千ノブコンデンサの代わりに1WA
コンデンサを用い、また必要箇所に1膜コンデンサの上
にチップコンデンサを配設して小形化と調整の簡単化を
図ることとなる。Operation This configuration allows you to use 1WA instead of a 1,000 knob capacitor.
A capacitor is used, and chip capacitors are placed on top of the single-film capacitor at necessary locations to achieve miniaturization and simplify adjustment.
実施例
以F本発明の一実施例について図面を参照しながら説明
する。Embodiment F An embodiment of the present invention will be described with reference to the drawings.
本発明の一実施例を示す第1図および第2図では、従来
例と同一部品に同一番号を付して説明は省略する。In FIGS. 1 and 2 showing an embodiment of the present invention, parts that are the same as those in the conventional example are given the same numbers and their explanations will be omitted.
第1図および第2図に示すように、入力側の誘電体基板
lの上に設けた主線路2やコンデンサ接続用線路12に
入力側直流阻止用のyi膜コンデンサ5や薄膜コンデン
サ10をそれぞれ配設し、薄膜コンデンサ10のLに誘
電体のト下両面に電極を設け、かつその上面の電極から
アースをとる構成のチップコンデンサ8を配設し、入力
側の誘電体基板1の十に設けたアース面11と、チップ
コンデンサ8の上面の電極を金ボタン9で接続した構成
である。また、チップコンデンサ8の上面の電極のパタ
ーンを島状電極を付加したパターンとする構成もある。As shown in FIGS. 1 and 2, a yi film capacitor 5 and a thin film capacitor 10 for blocking input DC current are connected to the main line 2 and capacitor connection line 12 provided on the dielectric substrate l on the input side, respectively. A chip capacitor 8 is disposed on the L of the thin film capacitor 10, with electrodes provided on both sides of the bottom of the dielectric, and grounded from the electrode on the top surface. The configuration is such that the provided ground plane 11 and the electrode on the top surface of the chip capacitor 8 are connected with a gold button 9. There is also a configuration in which the pattern of the electrodes on the top surface of the chip capacitor 8 is a pattern in which island-shaped electrodes are added.
出力側の誘電体基板13についても入力側の誘電体基板
1と同様に主線路14.コンデンサ接続用線路23.出
力側直流阻止用の薄膜コンデンサ16、薄膜コンデンサ
21.アース面22.チップコンデンサ19および金リ
ボン20で構成する。As for the dielectric substrate 13 on the output side, the main line 14. Capacitor connection line 23. Output side DC blocking thin film capacitor 16, thin film capacitor 21. Earth surface 22. It is composed of a chip capacitor 19 and a gold ribbon 20.
以上のように本実施例によりば誘電体基板上に形成した
マイクロ波集積回路に薄11Jコンデンサを備え、その
上に誘電体の上下両面に電極を設け、かつその」−面の
電極からアースをとる構成のチップコンデンサを備えた
構成およびチップコンデンサの上面の電極に島状電極を
付加した構成により、従来のようなスタブを使ったイン
ピーダンス整合や、多数の横電極型の表面実装用チップ
コンデンサの使用をなくして、マイクロ波集積回路装置
の小形化ができ、かつ薄膜コンデンサとチップコンデン
サを組み合わせることによって、トランジスタの種類が
変わって必要な容量の変化が住した際にも容易に対応が
でき、また、容量の微調整に対しても容易に対応するこ
とができる。As described above, according to this embodiment, a thin 11J capacitor is provided on a microwave integrated circuit formed on a dielectric substrate, electrodes are provided on both the upper and lower surfaces of the dielectric, and the ground is connected from the electrode on the negative side. The configuration with a chip capacitor of this type and the configuration with an island-like electrode added to the top electrode of the chip capacitor make it possible to perform impedance matching using a conventional stub, as well as with many lateral electrode type surface mount chip capacitors. By eliminating the use of capacitors, microwave integrated circuit devices can be made smaller, and by combining thin film capacitors and chip capacitors, it is possible to easily adapt to changes in the required capacitance due to changes in the type of transistor. Further, it is possible to easily handle fine adjustment of the capacity.
なお実施例ではインピーダンス整合回路について実施例
を示したが、バイアス回路のバイパス用のコンデンサ部
や直流阻止用のコンデンサ部にも本発明を適用できるこ
とはいうまでもない。In the embodiment, an impedance matching circuit has been described, but it goes without saying that the present invention can also be applied to a bypass capacitor section or a DC blocking capacitor section of a bias circuit.
発明の効果
以上の実施例の説明からも明らかなように本発明は、マ
イクロ波集積回路中に薄膜コンデンサを配し、その上に
誘電体の上下面に電極を設け、かつアースを上面の電極
からとる構成のチップコンデンサを配設する構成により
小形化ができ、必要な容量の対応および容量の微調整に
対する対応が容易にできる優れたマイクロ波集積回路装
置を実現できるものである。Effects of the Invention As is clear from the above description of the embodiments, the present invention has a thin film capacitor arranged in a microwave integrated circuit, electrodes provided on the upper and lower surfaces of a dielectric material, and a ground connected to an electrode on the upper surface. By arranging chip capacitors having the structure shown in FIG. 1, it is possible to realize an excellent microwave integrated circuit device which can be miniaturized and which can easily accommodate necessary capacitance and fine adjustment of capacitance.
第1図は本発明の一実施例のマイクロ波集積回路装置の
構成を示す平面図、第2図は同一部を示す斜視図、第3
図および第4図は従来のマイクロ波集積回路装置の構成
を示す平面図である。
1.13・・・・・・誘電体基板、2.14・旧・・主
線路、3.15・・・・・・ワイヤ、4・旧・・トラン
ジスタ、5゜10.16.21・・・・・・薄膜コンデ
ンサ、8,19・・・・・・チップコンデンサ、9,2
o・・・・・・金リボン、11.22・・・・・・アー
ス面、12.23・旧・・コンデンサ接続用線路。
代理人の氏名 弁理士 粟野重孝 ほか1名f ずj−
・−鵠tgx≧E
デ、計−主知lト
JO・w、tt−J用蛇ゴソデノ7
n、tt−m−アース面
+t、 tj−・−ココデシす11も用鵜第3図
第4図
図FIG. 1 is a plan view showing the configuration of a microwave integrated circuit device according to an embodiment of the present invention, FIG. 2 is a perspective view showing the same part, and FIG.
1 and 4 are plan views showing the configuration of a conventional microwave integrated circuit device. 1.13... Dielectric substrate, 2.14 Old... Main line, 3.15... Wire, 4 Old... Transistor, 5゜10.16.21... ... Thin film capacitor, 8,19... Chip capacitor, 9,2
o...Gold ribbon, 11.22...Earth surface, 12.23...Old...Line for connecting capacitors. Name of agent: Patent attorney Shigetaka Awano and one other person
・-Tgx≧E De, total-Chief knowledge JO・w, tt-J for snake Gosodeno 7 n, tt-m-Earth surface +t, tj-・-Kokodesisu 11 also used for cormorant 3 Figure 4 Diagram
Claims (2)
薄膜コンデンサを備え、前記薄膜コンデンサ上に誘電体
の上下両面に電極を設けかつその上面の電極からアース
をとる構成のチップコンデンサを備えたマイクロ波集積
回路装置。(1) A thin film capacitor is provided in a microwave integrated circuit formed on a dielectric substrate, and a chip capacitor is provided on the thin film capacitor with electrodes provided on both the upper and lower surfaces of the dielectric and grounded from the electrode on the upper surface of the thin film capacitor. Microwave integrated circuit device.
した請求項1記載のマイクロ波集積回路装置。(2) The microwave integrated circuit device according to claim 1, wherein an island-shaped electrode is added to the electrode on the upper surface of the chip capacitor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2154778A JPH0446402A (en) | 1990-06-13 | 1990-06-13 | Microwave integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2154778A JPH0446402A (en) | 1990-06-13 | 1990-06-13 | Microwave integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0446402A true JPH0446402A (en) | 1992-02-17 |
Family
ID=15591692
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2154778A Pending JPH0446402A (en) | 1990-06-13 | 1990-06-13 | Microwave integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0446402A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7196909B2 (en) | 2003-02-04 | 2007-03-27 | Sumitomo Electric Industries, Ltd. | AC coupling circuit having a large capacitance and a good frequency response |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0260205A (en) * | 1988-08-25 | 1990-02-28 | Matsushita Electric Ind Co Ltd | Microwave integrated circuit and its manufacture |
-
1990
- 1990-06-13 JP JP2154778A patent/JPH0446402A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0260205A (en) * | 1988-08-25 | 1990-02-28 | Matsushita Electric Ind Co Ltd | Microwave integrated circuit and its manufacture |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7196909B2 (en) | 2003-02-04 | 2007-03-27 | Sumitomo Electric Industries, Ltd. | AC coupling circuit having a large capacitance and a good frequency response |
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