JPH0442989A - Electronic component placing board and manufacture thereof - Google Patents

Electronic component placing board and manufacture thereof

Info

Publication number
JPH0442989A
JPH0442989A JP2148156A JP14815690A JPH0442989A JP H0442989 A JPH0442989 A JP H0442989A JP 2148156 A JP2148156 A JP 2148156A JP 14815690 A JP14815690 A JP 14815690A JP H0442989 A JPH0442989 A JP H0442989A
Authority
JP
Japan
Prior art keywords
layer
metal layer
metal
recess
base material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2148156A
Other languages
Japanese (ja)
Other versions
JP2753761B2 (en
Inventor
Hajime Yatsu
矢津 一
Takao Iriyama
杁山 卓男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP2148156A priority Critical patent/JP2753761B2/en
Publication of JPH0442989A publication Critical patent/JPH0442989A/en
Application granted granted Critical
Publication of JP2753761B2 publication Critical patent/JP2753761B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/05Insulated conductive substrates, e.g. insulated metal substrate

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

PURPOSE:To obtain a compact electronic component placing board having excellent heat dissipation, moisture resistance by providing heat dissipating upper and lower metal layers in an insulating base material, thermally connecting both via an inner viahole, and thermally connecting the lower metal layer to a heat dissipating metal layer provided on the rear surface side of the base material through a recess heat transfer part. CONSTITUTION:Two layers of heat dissipating upper and lower metal layers 1, 2 are isolated to be arranged in an insulating base material 3. A heat dissipating metal layer 45 is provided on the rear surface side of the material 3. The layer 1 is connected to a metal plated layer 41 of a recess 4, and the layer 1 is connected to the layer 2 via an inner viahole 5 formed with a metal plated layer 51. The layer 4 is connected to the layer 45 via a recess heat transfer part 6 formed with a metal plated layer 61.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体などの電子部品から発生ずる熱を効率
良く放散させることができる電子部品搭載用基板に関す
る。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a substrate for mounting electronic components that can efficiently dissipate heat generated from electronic components such as semiconductors.

[従来技術] 電子部品搭載用基板は、絶縁基材表面の凹所に半導体な
どの電子部品を搭載すると共に、絶縁基材の表面に導体
回路を形成しているものである。
[Prior Art] An electronic component mounting board has an electronic component such as a semiconductor mounted in a recess on the surface of an insulating base material, and a conductor circuit is formed on the surface of the insulating base material.

そして+ SN絶縁基材としては1合成樹脂を素材する
ものと、セラミックスを素材とするものとがある、前者
の合成樹脂絶縁基材は、セラミックス絶縁基材に比して
、安価、軽量かつ加工容易性等の点から優れている。
+ SN insulation base materials include those made of synthetic resin and those made of ceramics.The former synthetic resin insulation base material is cheaper, lighter, and easier to process than ceramic insulation base materials. It is excellent in terms of ease of use, etc.

しかし9合成樹脂絶縁基材はセラミックス絶縁基材に比
して熱伝導率が約100分の1程度と非常に小さい。そ
のため2合成樹脂絶縁基材は、高熱を発する半導体素子
の搭載用基板としては不向きである。
However, the thermal conductivity of the 9 synthetic resin insulating base material is about 1/100 of that of the ceramic insulating base material, which is very low. Therefore, the 2-synthetic resin insulating base material is not suitable as a substrate for mounting a semiconductor element that generates high heat.

そこで、放熱性向上のためにヒートシンクを用いた電子
部品搭載用基板が提案されている(例えば、特開昭60
−136348号公報)。このものは、第5図に示すご
とく、絶縁基材90に搭載した電子部品93の下方に、
金属製のヒートシンク81を配設したものである。電子
部品93とヒートシンク81とは接着剤94により、ま
た、絶縁1[9oとヒートシンク81とは接着剤82に
よりそれぞれ接合されている。
Therefore, electronic component mounting boards using heat sinks have been proposed to improve heat dissipation (for example, Japanese Patent Laid-Open No. 60
-136348). As shown in FIG. 5, this device has a
A metal heat sink 81 is provided. The electronic component 93 and the heat sink 81 are bonded by an adhesive 94, and the insulation 1[9o and the heat sink 81 are bonded by an adhesive 82.

なお、絶縁基材90に設けたスルーホール92及びその
周辺には銅等のめっき層91により導体回路が形成され
ている。また、スルーホール92にはめっき層91を介
してリードピン96の頭部が挿置されている。また、符
号98は、ボンディングワイヤーである。なお2図示し
ていないが。
Note that a conductor circuit is formed in the through hole 92 provided in the insulating base material 90 and its surroundings by a plating layer 91 of copper or the like. Further, the head of a lead pin 96 is inserted into the through hole 92 with the plating layer 91 interposed therebetween. Moreover, the code|symbol 98 is a bonding wire. Note that two figures are not shown.

電子部品93の外周は湿気侵入防止のために樹脂封止が
行われる。
The outer periphery of the electronic component 93 is sealed with resin to prevent moisture from entering.

また、第6図に示すごとく、絶縁基材90の下方に凹所
97を設け、該凹所97内にヒートシンク83を配置し
、該ヒートシンク83の上面に電子部品93を接着剤9
2により接合した電子部品搭載用基板も提案されている
Further, as shown in FIG. 6, a recess 97 is provided below the insulating base material 90, a heat sink 83 is placed in the recess 97, and an electronic component 93 is attached to the upper surface of the heat sink 83 using an adhesive 9.
A substrate for mounting electronic components bonded by 2 has also been proposed.

この基板の製造においては、まず絶縁基材90の下方に
凹所97を設け9その中に接着剤84を介してヒートシ
ンク83を配置して、これらをプレスして一体となす。
In manufacturing this board, first, a recess 97 is provided below the insulating base material 90, a heat sink 83 is placed therein via an adhesive 84, and the recesses 97 are pressed together.

更に、絶縁基材90における電子部品搭載部分には、上
方より切削加工を施し、ヒートシンク83の上面を露出
させる。そして、その後、スルーホール92及びヒート
シンク83の裏面にめっき層91を施す。そして、ヒー
トシンク83上に電子部品93を接合する。その他は、
上記第5図の場合と同様である。
Further, the electronic component mounting portion of the insulating base material 90 is cut from above to expose the upper surface of the heat sink 83. After that, a plating layer 91 is applied to the back surface of the through hole 92 and the heat sink 83. Then, the electronic component 93 is bonded onto the heat sink 83. Others are
This is the same as the case shown in FIG. 5 above.

〔解決しようとする課題〕[Problem to be solved]

しかしながら、前者のヒートシンク81を接合した基板
(第5図)においては、金属製ヒートシンク81の面積
が大きいので放熱性には優れているが、ヒートシンク8
1と絶縁基材90との間は接着剤82が介在しているの
で、気密性が悪(。
However, in the case of the former substrate to which the heat sink 81 is bonded (FIG. 5), the area of the metal heat sink 81 is large, so the heat dissipation is excellent, but the heat sink 81 is
Since the adhesive 82 is interposed between 1 and the insulating base material 90, the airtightness is poor (.

耐湿性に劣っている。Poor moisture resistance.

つまり、接着剤82の間から電子部品93の方向に湿気
が侵入して、電子部品9が劣化する。更に、ヒートシン
ク81と絶縁基材90とを接合している接着剤82は、
ヒートシンク81との熱膨張係数の差が大きいため、高
温と低温間の温度サイクルによってヒートシンク81が
絶縁基材90から剥離し易い。
That is, moisture enters the electronic component 93 from between the adhesives 82 and the electronic component 9 deteriorates. Furthermore, the adhesive 82 bonding the heat sink 81 and the insulating base material 90 is
Since the difference in coefficient of thermal expansion with the heat sink 81 is large, the heat sink 81 is likely to peel off from the insulating base material 90 due to temperature cycles between high and low temperatures.

一方、後者の凹所97内にヒートシンク83を配設した
基板(第6図)においては、前記のごとく、その製造に
当り、絶縁基材90に予め凹所97を設け、ヒートシン
ク83と絶縁基材90とを接合し、その後電子部品搭載
部分に切削加工を施してヒートシンク83の上面を露出
させる等という複雑かつ精密な加工を必要とする。
On the other hand, in the case of the latter substrate (FIG. 6) in which the heat sink 83 is disposed in the recess 97, the recess 97 is provided in the insulating base material 90 in advance as described above, and the heat sink 83 and the insulating base are It requires complicated and precise processing such as joining the heat sink 83 to the heat sink 90 and then cutting the electronic component mounting portion to expose the upper surface of the heat sink 83.

また、そのためにコスト高となる。更には、ヒートシン
ク83の面積を電子部品93よりも大きく設けなければ
ならない。
Moreover, this results in high costs. Furthermore, the area of the heat sink 83 must be larger than that of the electronic component 93.

本発明は、かかる従来技術の問題点に鑑み、熱放散性、
耐湿性に優れ、かつコンパクトな電子部品搭載□周基板
を提供しようとするものである。
In view of the problems of the prior art, the present invention provides heat dissipation,
The aim is to provide a circuit board equipped with electronic components that is highly moisture resistant and compact.

(課題の解決手段〕 本発明は、導体回路を設けた絶縁基材に電子部品搭載用
の凹所を設け、また該凹所の内面には金属メッキ層を施
してなる電子部品搭載用基板において、該電子部品搭載
用基板は上記絶縁基材の内部に放熱用の上部金属層と下
部金属層の2層を互いに離隔して配設していると共に絶
縁基材の裏面側には放熱金属層を有し、また上記上部金
属層は上記凹所の金属メッキ層に接続し、該上部金属層
と上記下部金属層とは金属メッキ層を施したインナーバ
イアホールにより接続し、また、下部金属層と放熱金属
層とは金属メッキ層を施した凹状伝熱部により接続され
ていることを特徴とする特許部品搭載用基板にある。
(Means for Solving the Problems) The present invention provides a substrate for mounting electronic components, in which a recess for mounting electronic components is provided in an insulating base material provided with a conductor circuit, and a metal plating layer is applied to the inner surface of the recess. The electronic component mounting board has two layers, an upper metal layer and a lower metal layer for heat dissipation, spaced apart from each other inside the insulating base material, and a heat dissipation metal layer on the back side of the insulating base material. The upper metal layer is connected to the metal plating layer in the recess, the upper metal layer and the lower metal layer are connected by an inner via hole provided with a metal plating layer, and the lower metal layer is connected to the metal plating layer in the recess. The patented component mounting board is characterized in that the heat dissipating metal layer and the heat dissipating metal layer are connected by a concave heat transfer portion provided with a metal plating layer.

本発明(、二おいて最も注目すべきことは、絶縁基材の
内部に放熱用の−L部金属層及び放熱用下部金属層を設
けると共に両者間をインナーバイアホールにより熱的に
接結12.また該下部金属層は絶縁基材のν(而(!?
11に設!Jた放熱金属層との間を凹状伝熱部により熱
的に接続した二とにある。
The most noteworthy feature of the present invention (2) is that a -L metal layer for heat dissipation and a lower metal layer for heat dissipation are provided inside the insulating base material, and the two are thermally connected by an inner via hole. .Also, the lower metal layer is the insulating base material ν(!?
Set on 11! The first and second parts are thermally connected to the heat dissipating metal layer by a concave heat transfer part.

上記1一部金属層は、絶縁基材の内部う二おいてその表
面側、つまり」−記凹所に近い側に配設する。
The first metal layer is disposed on the inner surface of the insulating base material, that is, on the side closer to the recess.

また、下部金属層は絶縁基材の内部j、こおいて、その
裏面側に近い部分M配設する。そ1〜て1上部金属層と
下部金属層とは互い(、こ離隔j7ている。
Further, the lower metal layer is disposed inside the insulating base material J, and in a portion M near the back side thereof. Part 1 to Part 1 The upper metal layer and the lower metal layer are spaced apart from each other by j7.

かかる」二部金属層及び下部金属層は1例えば銅張絶縁
基材の」1下両表面に設けた銅箔により形成する6即ち
、銅張絶縁基材の上下にプリプレグ層を設けることj、
こより、内部に上部金属層と下部金属層とを形成する(
第3C図参照)。
The two-part metal layer and the lower metal layer are formed by copper foil provided on both lower surfaces of the copper-clad insulating base material, for example, by providing prepreg layers on the top and bottom of the copper-clad insulating base material,
From this, an upper metal layer and a lower metal layer are formed inside (
(See Figure 3C).

また、上部金属層と下部金属層とば2金属メ・ンキ廣を
施1.たインナーバイアホールにより熱的に接続するa
該インナーバイアホールは9例えば円筒状とする。また
、インナーバイアホールは1例えば電子部品搭載用の凹
所の外方位置においてこれを囲むように多数設ける。
In addition, the upper metal layer and the lower metal layer are coated with two metal plates. Thermal connection via the inner via hole
The inner via hole 9 has a cylindrical shape, for example. Further, a large number of inner via holes are provided, for example, at an outer position of a recess for mounting an electronic component so as to surround the recess.

また、上記放熱金属層は、絶縁基材の裏面側に。Further, the heat dissipation metal layer is placed on the back side of the insulating base material.

例えば銅等の金属メッキ層を施すこと?、こより形成す
る。そして1M放熱金属層と−Y記下部金属層との間は
、金属メンキ層を施した凹状伝熱部ζ−より熱的に接続
する。また、上記の放熱金属層%Izび凹状伝熱部にお
りる金属メンキ層の形成は、同時に行うこともできる。
For example, applying a metal plating layer such as copper? , formed from this. The 1M heat dissipation metal layer and the lower metal layer marked -Y are thermally connected through the concave heat transfer portion ζ- provided with a metal coating layer. Further, the formation of the heat dissipating metal layer and the metal coating layer extending into the concave heat transfer portion can be performed simultaneously.

また、上記凹状伝熱部は9例えばブラインドバイアホー
ルのごとき、単一の円筒状体のものを多数設けること(
第4図)、或いは電子部品搭載用基板の凹所よりも太き
目に環状溝として形成すること(第2図)により設ける
In addition, the concave heat transfer portion 9 may be provided with a large number of single cylindrical bodies, such as blind via holes.
(FIG. 4), or by forming an annular groove that is wider than the recess of the electronic component mounting board (FIG. 2).

また、十記放熱金属層には、放熱性同士のために1通常
使用される放熱フィンを取イ」けることもできる。
Furthermore, the heat dissipation metal layer may be provided with a heat dissipation fin that is normally used for heat dissipation.

また1本発明は2合成樹脂系、セラミックス系など種々
の絶縁基材に対して適用することができまた。上記電子
部品搭載用基板の製造方法としては、内部絶縁基材の上
下両面に上部金属層と下部金属層とを有する積N板を用
い、該積層板にインナーバイアホールを穿設すると共に
該インナーバイアホール内に金属メッキ層を形成し1次
いで該積層板の上Fにブリブ1/グ層を介1−て金属箔
層を加熱接合し1次いで上方に上記−F部金属層まで達
する電子部品搭載用の凹所をザグリ加工tこより形成1
−1また下方には上記下部金属層に達する凹状伝熱部を
形成し2次いで一ト記凹所及び凹状伝熱部に金属メッキ
層を形成することを特徴とする電子部品搭載用基板の製
造方法がある。
Furthermore, the present invention can be applied to various insulating base materials such as synthetic resins and ceramics. The above-mentioned method for manufacturing the board for mounting electronic components includes using a laminated plate having an upper metal layer and a lower metal layer on both upper and lower surfaces of an internal insulating base material, forming an inner via hole in the laminated plate, and forming an inner via hole in the laminated plate. A metal plating layer is formed in the via hole, and then a metal foil layer is heat-bonded to the upper F of the laminate via a blib 1/g layer, and then the electronic component reaches upward to the above-mentioned F part metal layer. Forming a recess for mounting by counterboring 1
-1. Manufacturing a board for mounting electronic components, characterized in that: (1) a concave heat transfer portion reaching the lower metal layer is formed below, and (2) a metal plating layer is formed on the concave portion and the concave heat transfer portion. There is a way.

上記において、上部金属層、下部金属層、金属箔層は銅
箔層などの金属層を用いる。また、金属メンキ層として
は、銅メッキ、ニンケルメ・7キ金メ、ヰなどがある。
In the above, a metal layer such as a copper foil layer is used as the upper metal layer, the lower metal layer, and the metal foil layer. Further, examples of the metal coating layer include copper plating, nickel metal, 7-gold metal, and the like.

また、内部絶縁基材としてはガラスエポキシ樹脂基板、
ガラス]・リアジン樹脂基板、ガラスポリイミド樹脂基
板などがある。
In addition, the internal insulation base material is a glass epoxy resin substrate,
Glass] - There are riazine resin substrates, glass polyimide resin substrates, etc.

また、ブリブ1/グとしては、エボキシブリブI/グト
リアジンブリブレグ、ポリイミドプリプレグなどを用い
る。
Further, as Brib 1/g, epoxy Brib I/Gtriazine Brib leg, polyimide prepreg, etc. are used.

〔作用及び効果] 本発明の電子部品搭載用基板においては、搭載した電子
部品が発熱すると、この熱は電子部品搭載用の凹所内面
に形成した金属メッキ層より、放熱用の上部金属層に伝
達される。そして、核熱はインナーバイアホールの金属
メッキ層より放熱用の下部金属層に伝熱され、更にブラ
インドバイアホール等の凹状伝熱部の金属メッキ層を経
て裏面側の放熱金属層に伝達される。即ち、上記インサ
ーバイアホール及び凹状伝熱部がヒートバイブの役割を
果たす。
[Operations and Effects] In the electronic component mounting board of the present invention, when the mounted electronic component generates heat, this heat is transferred from the metal plating layer formed on the inner surface of the recess for electronic component mounting to the upper metal layer for heat dissipation. communicated. Then, the nuclear heat is transferred from the metal plating layer of the inner via hole to the lower metal layer for heat dissipation, and further transferred to the heat dissipation metal layer on the back side through the metal plating layer of the concave heat transfer part such as the blind via hole. . That is, the in-server via hole and the concave heat transfer portion serve as a heat vibrator.

次に、この放熱金属層に伝えられた熱は、 m1Ti′
i側より大気中へ放熱される。そして、この放熱金属層
は、絶縁基材の裏面側に設けであるので広い面積を有す
る。そのため、放熱金WAMからは効率良く放熱が行わ
れる。
Next, the heat transferred to this heat dissipation metal layer is m1Ti′
Heat is radiated into the atmosphere from the i side. Since this heat dissipation metal layer is provided on the back side of the insulating base material, it has a large area. Therefore, heat is efficiently radiated from the heat-radiating gold WAM.

また1、ト記凹所の内部ば金属メッキ層が被覆され、更
にインナーバイアボール、凹状伝熱部及び放熱金属層は
全て金属メッキ層等の金属層によって形成されている。
Further, 1. The inside of the recess mentioned above is coated with a metal plating layer, and furthermore, the inner via ball, the recessed heat transfer portion, and the heat dissipation metal layer are all formed of a metal layer such as a metal plating layer.

そのため、凹所内部から絶縁基材裏面側の間には、前記
従来のごとく樹脂接着剤が存在しない、それ故、絶縁基
材裏面側より凹所内へ湿気が浸入することがない。なお
、凹所側は、前記のごとく電子部品を搭載した後、湿気
浸入防止用の樹脂封止を行う。
Therefore, there is no resin adhesive between the inside of the recess and the back side of the insulating base material as in the prior art, and therefore, moisture does not infiltrate into the recess from the back side of the insulating base material. Note that, after mounting the electronic components as described above, the recess side is sealed with resin to prevent moisture from entering.

また、上記のごとく、凹所内部の金属メッキ層は、上部
金属層、インナーバイアホール、下部金属層、凹状伝熱
部、放熱金属層と接続されているため、これらの間に電
気的導通が図られている。
In addition, as mentioned above, the metal plating layer inside the recess is connected to the upper metal layer, inner via hole, lower metal layer, recessed heat transfer part, and heat dissipation metal layer, so there is no electrical continuity between them. It is planned.

そのため、これらの金属層を電源回路又は接地回路とし
て利用することも出来る。
Therefore, these metal layers can also be used as a power supply circuit or a ground circuit.

また2本発明においては、前記従来のごとくヒートシン
クを用いないので、電子部品搭載用基板全体の厚みを絶
縁基材の厚みに抑えることができ。
Further, in the second invention, unlike the conventional method, a heat sink is not used, so that the thickness of the entire electronic component mounting board can be suppressed to the thickness of the insulating base material.

厚みが薄くてコンパクトである。It is thin and compact.

したがって1本発明によれば、熱放散性、耐湿気性に優
れ、かつコンパクトな電子部品搭載用基板を提供するこ
とができる。
Therefore, according to the present invention, it is possible to provide a compact electronic component mounting board that has excellent heat dissipation properties and moisture resistance.

また、上記製造法によれば、上記のごとく優れた電子部
品搭載用基板を容易に製造することができる。
Moreover, according to the above manufacturing method, it is possible to easily manufacture the excellent electronic component mounting substrate as described above.

〔実施例〕〔Example〕

第1実施例 本発明の実施例にかかる電子部品搭載用基板につき、第
1図〜第3F図を用いて説明する。
First Embodiment An electronic component mounting board according to an embodiment of the present invention will be described with reference to FIGS. 1 to 3F.

本例の電子部品搭載用基板は、第1図及び第2図に示す
ごとく、導体回路440を設けた絶縁基材3に、電子部
品搭載用の凹所4を設け、該凹所4の内面に金属メッキ
層41を施してなる。そして、上記絶縁基材3の内部に
は、放熱用の上部金属層1と放熱用の下部金属層2との
二層を互いに離隔して配設している。
As shown in FIGS. 1 and 2, the substrate for mounting electronic components of this example has a recess 4 for mounting electronic components in an insulating base material 3 provided with a conductor circuit 440, and an inner surface of the recess 4. A metal plating layer 41 is applied to the surface. Inside the insulating base material 3, two layers, an upper metal layer 1 for heat radiation and a lower metal layer 2 for heat radiation, are arranged spaced apart from each other.

また、絶縁基材3の裏面側には放熱金属層45を有する
。また、上記上部金属層1は、上記凹所4の金属メッキ
層41に接続され、該上部金属層1と上記下部金属層2
とは金属メッキ層51を施したインナーバイアホール5
により接続されている。また、下部金属層2と上記放熱
金属層45との間は、金属メッキ層61を施した凹状伝
熱部6により接続されている。
Furthermore, a heat dissipating metal layer 45 is provided on the back side of the insulating base material 3. Further, the upper metal layer 1 is connected to the metal plating layer 41 of the recess 4, and the upper metal layer 1 and the lower metal layer 2
is an inner via hole 5 coated with a metal plating layer 51.
connected by. Further, the lower metal layer 2 and the heat dissipating metal layer 45 are connected by a concave heat transfer portion 6 provided with a metal plating layer 61.

また、該凹状伝熱部6は、第2図に示すごとく環状溝に
より形成されている。なお、第1図、第2図において、
符号92は、導体ピン挿入用のスルーホールである。
Further, the concave heat transfer portion 6 is formed by an annular groove as shown in FIG. In addition, in Figures 1 and 2,
Reference numeral 92 is a through hole for inserting a conductor pin.

次に、上記電子部品搭載用基板の製造方法につき、第3
A図〜第3F図を用いて説明する。
Next, regarding the manufacturing method of the above-mentioned electronic component mounting board, the third
This will be explained using Figures A to 3F.

まず、第3A図に示すごとく、銅張り積層板30を準備
する。該銅張り積層板30は、その上面のtp、Vi層
が本発明にかかる上部金属層1を、下面の銅箔層が下部
金属層2を形成することとなる。
First, as shown in FIG. 3A, a copper-clad laminate 30 is prepared. In the copper-clad laminate 30, the tp and Vi layers on the upper surface form the upper metal layer 1 according to the present invention, and the copper foil layer on the lower surface forms the lower metal layer 2.

そして、上部金属層lと下部金属層2との間にガラスエ
ポキシ基板からなる内部絶縁基材31を有する。
Further, an internal insulating base material 31 made of a glass epoxy substrate is provided between the upper metal layer 1 and the lower metal layer 2.

次に、第3B図に示すごとく、該銅張り積層板30にお
いて インナーバイアホール5を穿設する。そして、該
インナーバイアホール5内に金属メッキ層51を形成す
る。また、上下両面をエツチングして、後述するスルー
ホール92のランド用金属層13.23を形成する。
Next, as shown in FIG. 3B, inner via holes 5 are bored in the copper-clad laminate 30. Then, a metal plating layer 51 is formed inside the inner via hole 5. Further, the upper and lower surfaces are etched to form land metal layers 13 and 23 for through holes 92, which will be described later.

次に、第3C図に示すごとく、上記銅張り積1板30の
上下に9合成樹脂のプリプレグ層33を介して、銅箔層
44.放熱金属層45を配trる。
Next, as shown in FIG. 3C, a copper foil layer 44. A heat dissipating metal layer 45 is provided.

該放熱金属層45は銅箔よりなる。The heat dissipation metal layer 45 is made of copper foil.

そして、第3D図に示すごとく、これらを加詑下に圧着
して、積層板301とする。これによりインナーバイア
ホール5内もプリプレグ33によって充填される。また
、積層板301内の絶縁基材3は、上記内部絶縁基材3
1と上下のプリプレグ3333との三層により構成され
ることとなる。
Then, as shown in FIG. 3D, these are pressed under pressure to form a laminate 301. As a result, the inside of the inner via hole 5 is also filled with the prepreg 33. In addition, the insulating base material 3 in the laminate 301 is the internal insulating base material 3
1 and upper and lower prepregs 3333.

その後、第3E図に示すごとく、上記積層板301の上
方にザグリ加工を施し、11子部品搭載用の凹所4を設
ける。該凹所4は上部金属層1を貫通して内部絶縁基材
31まで達している。また。
Thereafter, as shown in FIG. 3E, a counterbore is formed above the laminated plate 301 to provide a recess 4 for mounting the eleventh child component. The recess 4 penetrates the upper metal layer 1 and reaches the inner insulating base 31 . Also.

該積層板301の下方には、上記インナーバイアホール
5より外方において、凹状伝熱部6をザグリ加工により
形成する。更にスルーホール92を穿設する。
Below the laminated plate 301, a concave heat transfer portion 6 is formed outwardly from the inner via hole 5 by counterboring. Furthermore, a through hole 92 is bored.

その後、第3F同に示すごとく、上記積層板301の全
表面に銅金属メッキ層を施すにれにより、凹所4内、凹
状伝熱部6内、スルーホール92内に、金属メッキ層4
1,61.921が形成される。次いで、常法により9
表面側の銅箔層44をエンチングして、導体回路440
を形成する。
Thereafter, as shown in FIG. 3F, by applying a copper metal plating layer to the entire surface of the laminate 301, the metal plating layer 4 is applied inside the recess 4, inside the concave heat transfer part 6, and inside the through hole 92.
1,61.921 is formed. Then, 9
The copper foil layer 44 on the front side is etched to form a conductor circuit 440.
form.

これムこより、前記第1図に示した電子部品搭載用基板
が得られる。
Through this process, the electronic component mounting board shown in FIG. 1 is obtained.

本例の電子部品搭載用基板においては、凹所4内に搭載
した電子部品(図示略)が発熱した熱は凹所4の金属メ
ッキ層41.」一部金属層1.インナーバイアホール5
の金属メッキ層51.下部金属!2.凹状伝熱部6の金
属メンキ層61を通して放熱金属層45乙こ放出される
。そして、この放熱金属層45は、電子部品搭載用基板
の裏面側に幅広く形成されているので、放熱性に優れて
いる。
In the electronic component mounting board of this example, the heat generated by the electronic component (not shown) mounted in the recess 4 is transferred to the metal plating layer 41 of the recess 4. ”Partial metal layer 1. Inner via hole 5
metal plating layer 51. Lower metal! 2. The heat dissipating metal layer 45 is emitted through the metal coating layer 61 of the concave heat transfer section 6. Since the heat dissipation metal layer 45 is widely formed on the back side of the electronic component mounting board, it has excellent heat dissipation properties.

また、凹所4の内部は、金属メッキ層41が被覆され、
インナーバイアホール5.凹状伝熱部6放熱金属層45
は全て金属層である。そのため絶縁基材の裏面側から凹
所4内に湿気が浸入することかない。なお、凹所4側は
、電子部品を搭載した後に樹脂封止j〜で、湿気防止を
行う。
Moreover, the inside of the recess 4 is coated with a metal plating layer 41,
Inner via hole 5. Concave heat transfer part 6 heat dissipation metal layer 45
are all metal layers. Therefore, moisture does not enter into the recess 4 from the back side of the insulating base material. Note that the recess 4 side is sealed with resin to prevent moisture after electronic components are mounted.

また、凹所の金属メッキ屡41は、L部金rjA層1 
インナーバイアホール5.下部金属層2.凹状伝熱部6
.放熱金属層45との間が全て金属(、−より連結され
、これらの間に電気的導通が得られている。それ故、こ
れらの金属層を電源回路又は接地回路として利用するこ
ともできる。
Further, the metal plating layer 41 in the recess is the L part gold rjA layer 1.
Inner via hole 5. Lower metal layer 2. Concave heat transfer part 6
.. All of the metal layers 45 and 45 are connected by metal (, -), and electrical continuity is obtained between them. Therefore, these metal layers can also be used as a power supply circuit or a ground circuit.

また、上記の製法j、こよれば、上記電子部品搭載用基
板を容易に製造することができる。
Moreover, according to the above manufacturing method j, the electronic component mounting board can be easily manufactured.

また、従来のごとく大きな面積のヒートシンクを用いる
必要かないので3電子部品搭載用基板全体がコンバクj
−になる。
In addition, there is no need to use a large-area heat sink like in the past, so the entire board for mounting electronic components can be placed in a compact space.
becomes −.

第2実施例 本例の電子部品搭載用基板は、第4図すこ示すごと(、
第1実施例におりる環状溝の凹状伝熱部6に代えて2円
筒状のブラインドバイアホールからなる凹状伝熱部65
を多数設けたものである、その他は、第1実施例と同様
である。
Second Embodiment The electronic component mounting board of this example is as shown in Figure 4 (
A concave heat transfer section 65 consisting of two cylindrical blind via holes instead of the concave heat transfer section 6 of the annular groove in the first embodiment.
The other features are the same as those in the first embodiment.

本例によれば、第1実施例と同様の効果が得られる。According to this example, effects similar to those of the first example can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図〜第3F図は第1実施例の電子部品搭載用基板を
示し7第1図はその断面図、第2回は一部切欠裏面図、
第3Aし1〜第3F図は製造工程l第4図は第2実施例
の電子部品搭載用基板の婁面図、第5回及び第6図は従
来の電子部品搭載用基板の断面図である。 第1図 I。 3゜ 31゜ 4゜ 41゜ 45゜ 5゜ 上部金属層。 下部金属層 絶縁基材 内部絶縁水利 プリプレグ。 凹所 61、、、  金属メッキ層。 、放熱金属層 、インナーバイアホール 65、、、凹状伝熱部。 第2図 第ヌ図 第工図 第4 図 第工図 第)図 第5図
Figures 1 to 3F show the electronic component mounting board of the first embodiment; Figure 1 is a sectional view thereof; Figure 2 is a partially cutaway back view;
Figures 3A and 1 to 3F are manufacturing steps. Figure 4 is a cross-sectional view of the electronic component mounting board of the second embodiment, and Figures 5 and 6 are cross-sectional views of the conventional electronic component mounting board. be. Figure 1 I. 3゜31゜4゜41゜45゜5゜Top metal layer. Bottom metal layer insulation base material internal insulation irrigation prepreg. Recess 61... Metal plating layer. , heat dissipation metal layer, inner via hole 65, , concave heat transfer section. Figure 2 Figure 2 Construction drawing Figure 4 Figure Construction drawing Figure 5

Claims (2)

【特許請求の範囲】[Claims] (1)導体回路を設けた絶縁基材に電子部品搭載用の凹
所を設け,また該凹所の内面には金属メッキ層を施して
なる電子部品搭載用基板において,該電子部品搭載用基
板は上記絶縁基材の内部に放熱用の上部金属層と下部金
属層の2層を互いに離隔して配設していると共に絶縁基
材の裏面側には放熱金属層を有し,また上記上部金属層
は上記凹所の金属メッキ層に接続し, 該上部金属層と上記下部金属層とは金属メッキ層を施し
たインナーバイアホールにより接続し,また,下部金属
層と放熱金属層とは金属メッキ層を施した凹状伝熱部に
より接続されていることを特徴とする電子部品搭載用基
板。
(1) A board for mounting an electronic component, which has a recess for mounting an electronic component on an insulating base material provided with a conductor circuit, and a metal plating layer is applied to the inner surface of the recess. has two layers, an upper metal layer and a lower metal layer for heat dissipation, spaced apart from each other inside the insulating base material, and has a heat dissipation metal layer on the back side of the insulating base material. The metal layer is connected to the metal plating layer in the recess, the upper metal layer and the lower metal layer are connected by an inner via hole provided with a metal plating layer, and the lower metal layer and the heat dissipation metal layer are connected to the metal plating layer. A board for mounting electronic components, characterized by being connected by a concave heat transfer portion coated with a plating layer.
(2)内部絶縁基材の上下両面に上部金属層と下部金属
層とを有する積層板を用い,該積層板にインナーバイア
ホールを穿設すると共に該インナーバイアホール内に金
属メッキ層を形成し,次いで該積層板の上下にプリプレ
グ層を介して金属箔層を加熱接合し,次いで上方に上記
上部金属層まで達する電子部品搭載用の凹所をザグリ加
工により形成し,また下方には上記下部金属層に達する
凹状伝熱部を形成し,次いで上記凹所及び凹状伝熱部に
金属メッキ層を形成することを特徴とする電子部品搭載
用基板の製造方法。
(2) Using a laminated plate having an upper metal layer and a lower metal layer on both upper and lower surfaces of an internal insulating base material, an inner via hole is bored in the laminated plate, and a metal plating layer is formed in the inner via hole. Next, a metal foil layer is heat-bonded to the top and bottom of the laminate via a prepreg layer, and then a recess for mounting electronic components that reaches the upper metal layer is formed by counterbore processing, and a recess for mounting an electronic component is formed in the lower part by counterboring. 1. A method of manufacturing a substrate for mounting electronic components, comprising forming a concave heat transfer portion reaching a metal layer, and then forming a metal plating layer on the concave portion and the concave heat transfer portion.
JP2148156A 1990-06-06 1990-06-06 Electronic component mounting substrate and method of manufacturing the same Expired - Fee Related JP2753761B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2148156A JP2753761B2 (en) 1990-06-06 1990-06-06 Electronic component mounting substrate and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2148156A JP2753761B2 (en) 1990-06-06 1990-06-06 Electronic component mounting substrate and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH0442989A true JPH0442989A (en) 1992-02-13
JP2753761B2 JP2753761B2 (en) 1998-05-20

Family

ID=15446513

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2148156A Expired - Fee Related JP2753761B2 (en) 1990-06-06 1990-06-06 Electronic component mounting substrate and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP2753761B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05327144A (en) * 1992-04-02 1993-12-10 Nec Corp Hybrid integrated circuit device
US5731067A (en) * 1995-06-07 1998-03-24 Denso Corporation Multi-layered substrate
JP2013093378A (en) * 2011-10-24 2013-05-16 Keihin Corp Electronic controller

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05327144A (en) * 1992-04-02 1993-12-10 Nec Corp Hybrid integrated circuit device
US5731067A (en) * 1995-06-07 1998-03-24 Denso Corporation Multi-layered substrate
JP2013093378A (en) * 2011-10-24 2013-05-16 Keihin Corp Electronic controller

Also Published As

Publication number Publication date
JP2753761B2 (en) 1998-05-20

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