JP2004336046A - Application specific heat sink element - Google Patents

Application specific heat sink element Download PDF

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JP2004336046A
JP2004336046A JP2004135315A JP2004135315A JP2004336046A JP 2004336046 A JP2004336046 A JP 2004336046A JP 2004135315 A JP2004135315 A JP 2004135315A JP 2004135315 A JP2004135315 A JP 2004135315A JP 2004336046 A JP2004336046 A JP 2004336046A
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heat
heat dissipating
heat sink
substrate
application specific
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Arthur Fong
アーサー・フォン
Marvin Glenn Wong
マーヴィン・グレン・ウォン
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Agilent Technologies Inc
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Agilent Technologies Inc
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Abstract

<P>PROBLEM TO BE SOLVED: To optimize the heat sink properties, weight, costs, machinability, and other characteristics of a heat sink element. <P>SOLUTION: An application specific heat sink element 900, which is designed to dissipate heat from electronic components 1144 and 1154, has heat sink substrates 910 and 1143 selected on the basis of at least one of size, shape, mass, costs, heat conductance, and environmental resistance, and heat sink studs 920, 930, 1145, and 1155 selected on the basis of CTE and machinability. The heat sink studs are installed to the heat sink substrates so that the electronic components can be installed on the heat sink studs. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

集積回路又はプリント回路基板などの電子部品は、様々なデバイスにおいて一般的に使用されるようになってきている。例えば、中央演算装置、インターフェース、グラフィックス及びメモリ回路は、一般に複数の集積回路を備えている。集積回路などの多くの電子部品は、通常作動中、相当な熱を発生する。これら及び他のデバイスの作動中に生じる熱を除去しない場合、電子部品及びその周囲にある他のデバイスは過熱され、部品の破損又は部品性能の劣化を生じることになる。   Electronic components, such as integrated circuits or printed circuit boards, have become commonly used in various devices. For example, central processing units, interfaces, graphics and memory circuits typically comprise a plurality of integrated circuits. Many electronic components, such as integrated circuits, generate considerable heat during normal operation. If the heat generated during operation of these and other devices is not removed, the electronic component and other devices surrounding it will overheat, resulting in component damage or component performance degradation.

このような過熱による問題を回避するために、電子部品と一緒に熱を放散させるためのヒートシンク又は他の熱放散素子を使用することが多い。ヒートシンクの熱放散条件は、他の要因とバランスが取れたものでなければならない。ヒートシンクの熱膨張係数(以下、CTEという)が電子部品のCTEと大幅に異なる場合、電子部品に取り付けられたヒートシンクは、電子部品にクラックや損傷を与えたり、又は電子部品から離間したりする可能性がある。また、多くのヒートシンク材料は相対的に重い。ヒートシンクを取り付
けた電子部品が振動や衝撃に晒された場合、電子部品に取り付けられたヒートシンクの重量によって電子部品にクラックや損傷が生じたり、ヒートシンクが取り付けられていた電子部品から離間したりする可能性がある。
To avoid such overheating problems, heat sinks or other heat dissipating elements are often used to dissipate heat with the electronic components. The heat dissipation conditions of the heat sink must be balanced with other factors. If the coefficient of thermal expansion (hereinafter referred to as CTE) of the heat sink is significantly different from the CTE of the electronic component, the heat sink attached to the electronic component may crack or damage the electronic component, or separate from the electronic component. There is. Also, many heat sink materials are relatively heavy. If the electronic component with the heat sink is exposed to vibration or shock, the weight of the heat sink attached to the electronic component can cause the electronic component to crack or be damaged, or be separated from the electronic component to which the heat sink was attached. There is.

プリント回路基板、マルチチップ・モジュール又は電子システム上の複数の電子部品では、熱の放散が必要になる場合もしばしばある。システムコストや重量、サイズ及び他の特徴を最適化する上で、複数の部品に単一の熱放散素子を用いることが出来れば有利である。しかしながら、プリント回路基板上、又はマルチチップ・モジュール中にある異なるダイは、異なる熱膨張係数、又は異なる熱放散条件を持っている場合がある。熱の放散を必要とする複数の素子の様々に異なる要求を満たすことができる熱放散素子があれば有利である。   Often, heat dissipation is required for printed circuit boards, multi-chip modules, or multiple electronic components on an electronic system. In optimizing system cost, weight, size and other features, it would be advantageous to be able to use a single heat dissipating element for multiple components. However, different dies on a printed circuit board or in a multi-chip module may have different coefficients of thermal expansion or different heat dissipation conditions. It would be advantageous if there were a heat dissipating element that could meet different requirements of a plurality of elements requiring heat dissipation.

ゆえに、当該産業では、熱放散素子の熱放散性、重量、コスト、機械加工性、及びその他の特徴を最適化することが望まれている。   Therefore, there is a need in the industry to optimize the heat dissipation, weight, cost, machinability, and other characteristics of the heat dissipation element.

熱放散素子の、熱放散性、CTE整合性、重量、コスト、機械加工性、又は他の特徴を最適化するための装置及び方法を提供する。   Apparatus and methods are provided for optimizing heat dissipation, CTE consistency, weight, cost, machinability, or other characteristics of a heat dissipation element.

この装置は、複数の電子部品から熱を放散させるための1つの特定用途向けヒートシンクを備えている。このヒートシンク素子は、サイズ、形状、質量、コスト、熱伝導性、及び環境耐性特性のうちの少なくとも1つに基づいて選択された熱放散基板と、各々がCTE及び機械加工性に基づいて選択された複数の熱放散スタッドとを備えている。この熱放散スタッドは、1つの電子部品が熱放散スタッドの各々に取り付けられるように、熱放散スタッドが熱放散基板へと取り付けられている。   The device includes one application specific heat sink for dissipating heat from a plurality of electronic components. The heat sink element is selected based on at least one of size, shape, mass, cost, thermal conductivity, and environmental resistance characteristics, and a heat dissipation substrate, each selected based on CTE and machinability. And a plurality of heat dissipating studs. The heat dissipating stud has a heat dissipating stud attached to the heat dissipating substrate such that one electronic component is attached to each of the heat dissipating studs.

複数の電子部品から熱を放散させるための特定用途向けヒートシンク素子の製造方法は、熱放散基板を選択又は形成するステップと、各々が冷却すべき1つの電子デバイスと整合する形状及びサイズとなるように、複数の熱放散スタッドを形成するステップと、そして熱放散スタッドの各々を基板に取り付けるステップとを含む。冷却すべき電子デバイスは、各熱放散スタッドに取り付けることができる。   A method of manufacturing an application specific heat sink element for dissipating heat from a plurality of electronic components includes selecting or forming a heat dissipating substrate and each having a shape and size consistent with one electronic device to be cooled. Forming a plurality of heat dissipation studs, and attaching each of the heat dissipation studs to a substrate. An electronic device to be cooled can be mounted on each heat dissipation stud.

本発明に対するより深い理解、及びこれに付随する利点の多くは、添付図を参照しつつ以下の詳細説明を読むことにより明らかとなる。添付図においては、同様の符号は同一又は同様の部品を示すものである。   A better understanding of the present invention, and many of the attendant advantages, will be apparent from the following detailed description, taken in conjunction with the accompanying drawings. In the accompanying drawings, like reference numbers indicate the same or similar parts.

説明用の図に示したように、本発明は、熱伝導性、正確な許容範囲、低質量、良好なボンディング性、コスト、機械加工性などの様々な特徴を選択的に最適化することが可能な熱放散素子を提供するための技術に関する。ヒートシンク素子の様々な特徴の最適化は、複数材料から成るヒートシンクであって、モノリシック(monolithic)なヒートシンク構造よりも容易に異なる場所、異なる条件に適合させることができる特定用途向けヒートシンクを製作することにより実現される。   As shown in the illustrative figures, the present invention can selectively optimize various features such as thermal conductivity, precise tolerances, low mass, good bonding, cost, machinability, etc. Techniques for providing a possible heat dissipation element. Optimization of the various features of the heatsink element is to create a multi-material heatsink that can be more easily adapted to different locations and different conditions than a monolithic heatsink structure. Is realized by:

図1は、本発明の第一の実施例に基づく熱放散素子を示している。熱放散基板110が設けられている。熱放散基板110は、既知のヒートシンク材料、合金、又はその組み合わせによって形成されており、例えばアルミニウムケイ素炭化物、銅、アルミニウム、炭素/金属複合物、炭素―金属合金(carbon-metal alloy)、セラミック、又は他の既知のヒートシンク材料が使用されている。一つの例としては、その熱伝導性と低重量から、AlSiCを選択することができる。熱放散スタッド120は、銅、タングステン、モリブデン、アルミニウム、銅/モリブデン/銅、又は他の既知のヒートシンク材料などが使用されており、これらの既知のヒートシンク材料、合金又はその組み合わせを、スタンピング、機械加工、エッチング、又はレーザー切断することにより形成することができる。   FIG. 1 shows a heat dissipation element according to a first embodiment of the present invention. A heat dissipation substrate 110 is provided. The heat dissipating substrate 110 is formed by known heat sink materials, alloys, or a combination thereof, such as aluminum silicon carbide, copper, aluminum, carbon / metal composite, carbon-metal alloy, ceramic, Or other known heat sink materials have been used. As one example, AlSiC can be selected because of its thermal conductivity and low weight. The heat dissipating studs 120 may be made of copper, tungsten, molybdenum, aluminum, copper / molybdenum / copper, or other known heat sink materials, and may be stamped, machined, It can be formed by processing, etching, or laser cutting.

熱放散スタッド120は、そのCTE(熱膨張係数)が、それに取り付けられるデバイス(集積回路チップ、集積回路パッケージ、集積回路モジュール、プリント回路基板など)のCTEと近似する値となるように選択されている。図4のフローチャートに示したように、熱放散スタッド120は、熱放散基板110の表面180の所定位置130に取り付けられており、この取付方法としては、ロウ付け、はんだ付け、接着剤ボンディング、圧力ばめ、ねじ締め、鋲留め、溶接、高圧下での低温拡散、拡散接合、又は熱伝導性金属接着など、いずれかの周知の取り付け方法を用いることができる。熱放散スタッド120は、機械加工、スタンピング、エッチング又はレーザー切断という手段により高い精度で成形されており、熱放散基板110の所定位置130へと取り付けられる。   The heat dissipation stud 120 is selected such that its CTE (coefficient of thermal expansion) is close to the CTE of the device (integrated circuit chip, integrated circuit package, integrated circuit module, printed circuit board, etc.) attached to it. I have. As shown in the flowchart of FIG. 4, the heat dissipating stud 120 is attached to a predetermined position 130 on the surface 180 of the heat dissipating substrate 110. The attaching method includes brazing, soldering, adhesive bonding, pressure bonding, and the like. Any of the well-known mounting methods can be used, such as fit, screwing, tacking, welding, low temperature diffusion under high pressure, diffusion bonding, or thermally conductive metal bonding. The heat dissipating stud 120 is formed with high precision by means of machining, stamping, etching or laser cutting, and is attached to a predetermined position 130 of the heat dissipating substrate 110.

本発明の特定用途向けヒートシンクのアプリケーションは用途が広いため、様々な材料及びサイズで形成された様々な熱放散基板110を使用することができる。様々な材料及びサイズで形成された様々な熱放散スタッド120を使用することができる。よって冷却すべきデバイス(図7、図8に示した実施例)の製造者は、特定の熱放散アプリケーション用に、要求される形状、コスト、低質量、良好な熱伝導性、正確な許容範囲などに基づいて基板110とスタッド120を選択することができる。この場合、図4に示したように、製造者は基板110を選択し(ステップ410)、スタッド120を選択し、そしてヒートシンクコストを抑制しつつもその特定のアプリケーション向けにヒートシンクの特徴を最適化するためにそのアプリケーションが必要とする適切な取り付け方法を選択(ステップ420)することができる。冷却すべきデバイスは、そのスタッド120に取り付けることができる(ステップ430)。留意すべきは、スタッド120は、基板110へと取り付ける前に、冷却すべきデバイスへと取り付けることも可能である点である。   The versatile application of the application specific heat sink of the present invention allows the use of various heat dissipating substrates 110 formed of various materials and sizes. Various heat dissipating studs 120 formed of various materials and sizes can be used. Thus, the manufacturer of the device to be cooled (the embodiment shown in FIGS. 7 and 8) requires the required shape, cost, low mass, good thermal conductivity, precise tolerances for the specific heat dissipation application. The substrate 110 and the stud 120 can be selected based on the above. In this case, as shown in FIG. 4, the manufacturer selects the substrate 110 (step 410), selects the stud 120, and optimizes the heat sink characteristics for that particular application while controlling heat sink costs. The appropriate mounting method required by the application to do so can be selected (step 420). The device to be cooled can be attached to its stud 120 (step 430). Note that the studs 120 can be attached to the device to be cooled before being attached to the substrate 110.

一方、製造者は、ストックとして、又は販売者からの注文に応じて、様々な材料及びサイズの様々な熱放散基板110を保有していても良い。ある特定の用途向けに熱放散基板110が選択された(ステップ410)場合、その特定用途向けにカスタマイズした熱放散スタッド120を特定のサイズ、熱伝導性条件などに合わせて製作することができる。スタッド120の製造後、これをその用途に適正な取り付け方法で取り付ける(ステップ420)ことができる。この実施例においては、基板110は良好な熱伝導性、低価格性、低質量などの他のヒートシンク特性を有してはいるが、容易には機械加工出来ない材料、合金又は複合材料であっても良く、スタッド120が冷却すべきデバイスとのCTE整合性や、冷却すべきデバイスに適合したサイズにするためにより精度の高い機械加工性を提供することができるものである。スタッドは、それぞれの対応ダイとの間に相対的なCTEの整合性を得るために使用されている。精密なCTE整合性は、一般的に要求されるものではなく、この参照により本願に含まれるPoleseなどによる米国特許第5,886,407号に開示されているように、相対的に近いCTEとすることで十分である。   On the other hand, the manufacturer may have various heat dissipating substrates 110 of various materials and sizes, either as stock or upon order from a seller. If the heat dissipating substrate 110 is selected for a particular application (step 410), a heat dissipating stud 120 customized for that particular application may be made to a particular size, thermal conductivity requirements, and the like. After the stud 120 has been manufactured, it can be mounted using the mounting method appropriate for the application (step 420). In this embodiment, the substrate 110 is a material, alloy, or composite material that has good heat conductivity, low cost, low mass, and other heat sink properties, but cannot be easily machined. The stud 120 may provide CTE compatibility with the device to be cooled and more precise machinability to make the size suitable for the device to be cooled. The studs are used to achieve relative CTE consistency with each corresponding die. Precise CTE matching is not generally required and is relatively close to CTE as disclosed in US Pat. No. 5,886,407 to Polese et al., Which is incorporated herein by reference. It is enough to do.

図2は、本発明の第二の実施例に基づく熱放散素子を示す。図2においては、熱放散スタッド220を整列させて取り付けるためのアライメント空洞230を備えた熱放散基板210が設けられている。熱放散基板210は、機械加工又はスタンピングなどのようないずれの周知の方法により形成されたものであっても良い。空洞230は、機械加工又は鋳造/スタンピングにより基板210中に形成することができる。図5のフローチャートに示したように、基板が選択されると(ステップ510)、スタッド220がとロウ付け、はんだ付け、接着剤ボンディング、拡散ボンディング、高圧下での低温拡散、熱伝導性金属接着又は他の周知の取り付け手段によりアライメント空洞230中へ取り付けられる(ステップ520)。冷却すべきデバイス(図示せず)は、エポキシ又は共晶ダイ・アタッチ法(die attach method)を含むいずれかの標準的ダイ・アタッチ法により、スタッド220へと取り付けられる(ステップ530)。本実施例は、スタッド220の基板210上におけるより正確なアライメントを提供するものである。   FIG. 2 shows a heat dissipation element according to a second embodiment of the present invention. In FIG. 2, a heat dissipation substrate 210 having an alignment cavity 230 for aligning and attaching the heat dissipation studs 220 is provided. The heat dissipating substrate 210 may be formed by any known method such as machining or stamping. Cavity 230 may be formed in substrate 210 by machining or casting / stamping. As shown in the flowchart of FIG. 5, when a substrate is selected (step 510), the stud 220 is soldered, soldered, adhesive bonded, diffusion bonded, low temperature diffusion under high pressure, thermally conductive metal bonding. Or by other known mounting means into the alignment cavity 230 (step 520). The device to be cooled (not shown) is attached to stud 220 by any standard die attach method, including epoxy or eutectic die attach methods (step 530). This embodiment provides a more accurate alignment of the stud 220 on the substrate 210.

図3は、本発明の第三の実施例に基づく熱放散素子を示す図である。図3においては、熱放散基板310が特定の熱放散アプリケーションの正確な条件に合わせて所定のサイズに、そして所定の材料、金属、合金、又は複合材料で形成されている。図6に示したように、熱放散基板310が選択された(ステップ610)後、熱放散スタッド320を形成するために選択された層390が、ロウ付け、はんだ付け、接着剤ボンディング、拡散ボンディング、減圧下での高温加圧などのような既知の取り付け手段により取り付けられる(ステップ620)。層390が取り付けられた後、冷却すべきデバイスと結合させるための所定サイズのスタッド320が、機械加工、レーザー切断、化学エッチング又は他の周知のプロセスにより、層390の上面の所定の位置330に形成される(ステップ630)。層390中に熱放散スタッド320が形成された後、冷却すべきデバイスが取り付けられる(ステップ640)。熱放散スタッドは、冷却すべきデバイスに合う形状に作られている。   FIG. 3 is a view showing a heat dissipation element according to a third embodiment of the present invention. In FIG. 3, the heat dissipating substrate 310 is formed to a predetermined size and made of a predetermined material, metal, alloy, or composite material for the exact requirements of a particular heat dissipation application. As shown in FIG. 6, after the heat dissipating substrate 310 is selected (step 610), the layers 390 selected to form the heat dissipating studs 320 are brazed, soldered, adhesive bonded, diffusion bonded. Attach by known attachment means such as hot pressing under reduced pressure, etc. (step 620). After layer 390 is applied, studs 320 of a predetermined size for bonding with the device to be cooled are provided at predetermined locations 330 on the upper surface of layer 390 by machining, laser cutting, chemical etching or other well-known processes. Formed (step 630). After the heat dissipating studs 320 have been formed in the layer 390, the devices to be cooled are attached (step 640). The heat dissipating stud is shaped to fit the device to be cooled.

上述した熱放散組み立て部品を用いて集積回路デバイスを冷却するという状況下におけるアプリケーションを、図7及び図8を参照しつつ以下に説明する。集積回路デバイス741は、ポリアミド又は他の高分子誘電体などの相対的に安価な誘電体材料、又は相対的に高いCTEを持つエポキシ材料などの1つ以上の層で構成された電気相互接続支持構造(electrical interconnect support structure)742を備えている。電気相互接続支持構造742は、基板110、210、310及び図1〜図8を参照しながら先に説明したように、特定用途向けの品質に応じて選択された熱放散基板743を支持している。   An application in the context of cooling an integrated circuit device using the heat dissipating assembly described above will be described below with reference to FIGS. The integrated circuit device 741 may be an electrical interconnect support composed of one or more layers of a relatively inexpensive dielectric material, such as a polyamide or other polymeric dielectric, or an epoxy material having a relatively high CTE. A structure (electrical interconnect support structure) 742 is provided. The electrical interconnect support structure 742 supports the heat dissipating substrate 743 selected for application-specific quality, as described above with reference to the substrates 110, 210, 310 and FIGS. I have.

熱放散基板743の上面746から隆起した熱放散スタッド745は、マイクロチップ又はダイ744を支持している。熱放散スタッド745は、熱放散基板743とは別に製作され、その後ロウ付け、抵抗溶接、超音波溶接、高圧下での低温拡散などの圧着、はんだ付け、接着剤ボンディング、圧力ばめ、ねじ締め、鋲留め、拡散ボンディング、又は熱伝導性接着材料で構成された接着層751又は熱性能条件により決定した厚さを持つ他の薄膜接着材料の利用により、熱放散基板743に取り付けられている。一連のワイヤボンディング747は、ダイ744上の接触ポイントを支持構造体742の上面749又はその中にパターニングされたメタライゼーション748へと接続している。このメタライゼーション748は、集積回路デバイス741から外に向かって延びる複数のリード750と接続している。熱放散基板743は、図示していない封入構造体の一部を形成するサイズ/形状に作られていても良い。   Heat dissipation studs 745 protruding from upper surface 746 of heat dissipation substrate 743 support microchips or dies 744. The heat dissipating stud 745 is manufactured separately from the heat dissipating substrate 743, and is then brazed, resistance welded, ultrasonic welded, crimped at low temperature under high pressure, soldered, adhesive bonded, pressure fitted, screwed It is attached to the heat dissipating substrate 743 by tacking, diffusion bonding, or using an adhesive layer 751 composed of a thermally conductive adhesive material or other thin film adhesive material having a thickness determined by thermal performance conditions. A series of wire bonds 747 connect the contact points on the die 744 to the upper surface 749 of the support structure 742 or to the metallization 748 patterned therein. The metallization 748 is connected to a plurality of leads 750 extending outward from the integrated circuit device 741. The heat dissipating substrate 743 may be made in a size / shape that forms part of a not-shown encapsulation structure.

留意すべきは、集積回路デバイスにおける熱放散費用を低減するために、熱放散基板743を様々な一般材料から、その熱放散品質、低質量、環境条件耐性、価格などに基づいて選択されたサイズ及び形状で選択することができるという点である。デバイスの様々な部品との接合部における機械的ストレスを分散及び低減させるために、支持構造体742に用いられる材料としては、熱放散基板743とメタライゼーション748の中間のCTEを持つものが選択される。熱放散スタッド745は、CTEのダイとの整合性、サイズ調整、環境耐性、値段、質量などをカスタマイズした他の所望の特定用途向けの特徴を持つと共に、熱放散基板743と集積回路ダイ744の中間のCTEを提供する様々な材料から選択されている。   It should be noted that the size of the heat dissipation substrate 743 may be selected from a variety of common materials based on its heat dissipation quality, low mass, resistance to environmental conditions, price, etc., to reduce the cost of heat dissipation in the integrated circuit device. And the shape can be selected. The material used for the support structure 742 is selected to have a CTE in between the heat dissipating substrate 743 and the metallization 748 in order to distribute and reduce the mechanical stress at the junction with the various components of the device. You. The heat dissipating stud 745 has other desired application specific features such as CTE die alignment, sizing, environmental tolerance, price, mass, etc., as well as heat dissipating substrate 743 and integrated circuit die 744. It is selected from a variety of materials that provide an intermediate CTE.

本発明により、エンドユーザーは特定の用途向けに様々なヒートシンクの特徴を正確に選択することができる。ヒートシンクの本体、即ち基板は、例えば熱伝導性、低質量、低価格材料、低価格製造プロセス、環境耐性、ボンディング性など、選択されたヒートシンクの特徴を最適化する一般的なサイズ、形状及び材料とすることができる。一方でインターフェース表面、即ちスタブについては、冷却すべきデバイスとの改善されたCTE整合性や、ボンディング性、正確な許容範囲での機械加工性といった選択特性を最適化するための材料、サイズ及び形状が選択される。すなわち、特定用途向けにカスタマイズされるのである。   The present invention allows the end user to accurately select various heat sink features for a particular application. The body, or substrate, of the heat sink is a common size, shape, and material that optimizes the selected heat sink characteristics, such as thermal conductivity, low mass, low cost materials, low cost manufacturing processes, environmental resistance, bondability, etc. It can be. On the other hand, for the interface surface, or stub, the material, size and shape to optimize selection properties such as improved CTE compatibility with the device to be cooled, bondability, and machinability with precise tolerances Is selected. That is, it is customized for a specific use.

熱放散スタッドの特定用途向けの形状は、これが熱放散基板へと取り付けられる前に形成されるものでも、取り付けられた後に形成されるものでも良い点に留意する必要がある。また、熱放散スタッドを冷却すべきデバイスに取り付ける作業は、スタッドが熱放散基板へと取り付けられる前に実施されるものでも、後に実施されるものでも良い。更に、図7及び図8においては、冷却対象を集積回路デバイス744として描いたが、本発明は、これがプリント回路基板、マルチチップ・モジュール、パッケージされたデバイスなどであっても、本発明の基本的概念から離れることなく適用することができるものである。   It should be noted that the application-specific shape of the heat-dissipating stud may be formed before it is attached to the heat-dissipating substrate, or it may be formed after it has been attached. The operation of attaching the heat dissipation stud to the device to be cooled may be performed before the stud is attached to the heat dissipation substrate, or may be performed later. Further, in FIGS. 7 and 8, the object to be cooled is depicted as an integrated circuit device 744. It can be applied without departing from the conceptual concept.

実施例1〜実施例4は、この熱放散基板を、マルチチップ・モジュール中の複数の集積回路、ダイ、プリント回路組立部品又は部品の冷却に用いるという状況下のアプリケーションにも適用することができる。基本的に、冷却すべき電子部品の各々と熱放散基板との間に複数の異なる熱放散スタッドを挿入することにより、組立部品中の複数の電子部品に対して単一の熱放散基板を使用することができる。   Embodiments 1 to 4 can also be applied to applications where the heat dissipation substrate is used for cooling a plurality of integrated circuits, dies, printed circuit assemblies or components in a multi-chip module. . Basically, a single heat dissipation board is used for multiple electronics in the assembly by inserting multiple different heat dissipation studs between each of the electronics to be cooled and the heat dissipation board can do.

図9は、本発明の第五の実施例に基づく熱放散装置を示すものであるが、これは第一の熱放散スタッド920及び第二の熱放散スタッド930が熱放散基板910に取り付けられたものである。熱放散スタッド920及び930は、図1〜図8の実施例で説明したように、それらのCTEが第一及び第二のダイ又は電子組立部品(図示せず)のCTEに整合するなどの特定の所望の特徴を持つように、同様又は異なる材料から選択又は形成されたものである。   FIG. 9 shows a heat dissipation device according to a fifth embodiment of the present invention, in which a first heat dissipation stud 920 and a second heat dissipation stud 930 are mounted on a heat dissipation substrate 910. Things. The heat dissipating studs 920 and 930 may be specified as described in the embodiment of FIGS. 1-8, such that their CTE matches the CTE of the first and second dies or electronic assemblies (not shown). Selected or formed from similar or different materials to have the desired characteristics of

図10に示すように、熱放散装置900は、様々なサイズ、形状及び材料で形成された様々な一般的基板から選択することができると共に、図1〜図8に基づいて説明したように、特定用途向けの特徴を得るために選択された様々なサイズ、形状及び材料で基板910を形成する(ステップ1010)ことにより製作することができる。熱放散スタッド920及び930は、図1〜図8に基づいて説明したように、特定用途向けに所望される特徴に基づいて選択された同様又は異なる材料から形成され、基板910に取り付けられる(ステップ1020及びステップ1040)。電子部品(図9には図示せず)は、熱放散スタッド920及び930に取り付けられる。これらのステップは、いずれの順番で実施されても良い。また、基板910又はスタッド920及び930のいずれか一方又は両方は、手持ちの一般的な部品から特定用途向けに選択されて組み立てられたものであっても、特定用途向けに特別に製作されたものであっても良い。   As shown in FIG. 10, the heat dissipation device 900 can be selected from a variety of general substrates formed of various sizes, shapes and materials, and as described with reference to FIGS. Fabrication can be made by forming the substrate 910 in various sizes, shapes and materials selected to obtain application-specific features (step 1010). Heat dissipating studs 920 and 930 are formed from similar or different materials selected based on the characteristics desired for the particular application, as described with reference to FIGS. 1020 and step 1040). Electronic components (not shown in FIG. 9) are mounted on heat dissipation studs 920 and 930. These steps may be performed in any order. In addition, one or both of the substrate 910 and the studs 920 and 930 are specially manufactured for a specific use, even if they are selected and assembled from a general part on hand for a specific use. It may be.

スタッド920及び930は、各スタッドに取り付けられる電子部品に要求される特定の特徴又は条件に応じ、同様又は異なる方法により、同様又は異なる材料で形成することができる。熱放散基板910と個々の熱を生じるデバイス(又は集積回路又はマルチチップ・モジュールの各領域)との間に取り付けられる熱放散スタッドは3つ以上あっても良い。また、熱放散スタッドは、近接性、熱放散条件、サイズ、重量、及び組立部品中の他の熱放散要求のあるデバイスのみにより制約されるものであり、熱放散基板の上面及び底面の両方に取り付けることができる。   Studs 920 and 930 can be formed of similar or different materials in similar or different ways, depending on the particular features or conditions required for the electronic components attached to each stud. There may be more than two heat dissipating studs mounted between the heat dissipating substrate 910 and the individual heat producing devices (or each area of the integrated circuit or multi-chip module). Also, heat dissipating studs are limited only by proximity, heat dissipating conditions, size, weight, and other devices in the assembly that require heat dissipating, and are located on both the top and bottom surfaces of the heat dissipating board. Can be attached.

図11は、ポリアミド、又は他の高分子誘電体又はエポキシ材料などの1つ以上の誘電体材料層から形成された電気相互接続支持構造1124を備えた電子組立部品1141を示したものである。支持構造1142は、図1〜図8に関連して説明したように特定用途向けの品質及び特徴に合わせて選択された熱放散材料で形成された熱放散基板1143に取り付けられている。   FIG. 11 illustrates an electronic assembly 1141 with an electrical interconnect support structure 1124 formed from one or more layers of dielectric material, such as a polyamide or other polymeric dielectric or epoxy material. The support structure 1142 is attached to a heat dissipating substrate 1143 formed of a heat dissipating material selected for application specific qualities and features as described in connection with FIGS.

2つ以上のマイクロチップ又はダイ1144及び1154は、熱放散基板1143の上面から隆起した熱放散スタッド1145及び1155により、それぞれ支持されている。熱放散スタッド1145及び1155は、熱放散基板1143とは別個に製造し、ロウ付け、抵抗溶接、超音波溶接、高圧下での低温拡散などの圧着、はんだ付け、接着剤ボンディング、圧力ばめ、ねじ締め、鋲留め、拡散ボンディング、又は熱伝導性接着剤の接着層(図示せず)又は熱性能条件に基づいて決定される厚さを持つ他の接着材料の薄い層により、熱放散基板1143に取り付けることができるようになっている。一連のワイヤボンディング1147は、ダイ1144及び1154上の接触ポイントを支持構造体1142の表面又はその中にパターニングされた1つ又は複数のメタライゼーション層1148へと接続している。このメタライゼーション層1148は、電子組立部品又はマルチチップ・モジュール1141から延びる複数のリード1150と接続している。熱放散基板1143は、電子組立部品の封入構造体(図示せず)の一部を形成するサイズ/形状に作られていても良い。   The two or more microchips or dies 1144 and 1154 are supported by heat dissipating studs 1145 and 1155 protruding from the upper surface of the heat dissipating substrate 1143, respectively. The heat dissipating studs 1145 and 1155 are manufactured separately from the heat dissipating substrate 1143, and include crimping such as brazing, resistance welding, ultrasonic welding, low-temperature diffusion under high pressure, soldering, adhesive bonding, pressure fitting, The heat dissipating substrate 1143 may be screwed, tacked, diffusion bonded, or a thin layer of an adhesive layer of heat conductive adhesive (not shown) or other adhesive material having a thickness determined based on thermal performance conditions. It can be attached to. A series of wire bonds 1147 connect the contact points on the dies 1144 and 1154 to the surface of the support structure 1142 or to one or more metallization layers 1148 patterned therein. This metallization layer 1148 connects to a plurality of leads 1150 extending from the electronic assembly or multi-chip module 1141. The heat dissipating substrate 1143 may be made in a size / shape that forms part of an enclosure (not shown) for the electronic assembly.

電子組立部品又はマルチチップ・モジュール1141のコストを低減するために、熱放散基板1143は、その熱伝導性、低質量性、環境耐性、価格などに基づいて様々な一般材料、サイズ及び形状から選択することができる。組立部品中の様々な部品の接合部における機械的ストレスを分散して低減させるために、支持構造1142として用いられる材料のCTEは熱放散基板1143とメタライゼーション層1148のCTEの中間に入るように選択される。熱放散スタッド1145及び1155は、ダイに整合するCTE、サイズ、環境耐性、価格、質量、機械加工性などのカスタマイズといった他の所望の特定用途向けの特徴と共に、熱放散基板1143とダイ1144及び1154の中間のCTEを提供する様々な材料から選択することができる。   In order to reduce the cost of the electronic assembly or multi-chip module 1141, the heat dissipating substrate 1143 is selected from various common materials, sizes and shapes based on its thermal conductivity, low mass, environmental resistance, price, etc. can do. To distribute and reduce the mechanical stresses at the joints of the various components in the assembly, the CTE of the material used as the support structure 1142 should be between the CTE of the heat dissipation substrate 1143 and the metallization layer 1148. Selected. The heat dissipating studs 1145 and 1155 are coupled to the heat dissipating substrate 1143 and the dies 1144 and 1154, along with other desired application specific features such as CTE matching the die, size, environmental tolerance, price, mass, machinability, etc. Can be selected from a variety of materials that provide a CTE in between.

本発明に推奨される実施例を説明目的で記載したが、本発明の範囲から離れることなく様々な変更、付加、及び代替により請求項の範囲に入る同などの実施例を得ることが可能であることは、当業者に明らかである。例えば、一般的な熱放散基板とは、羽根、又は他の一般的な熱放散性の物理的特徴を持つ熱放散基板であっても良いのである。   While the preferred embodiment of the invention has been described for purposes of illustration, it is possible to obtain equivalent embodiments falling within the scope of the claims without departing from the scope of the invention by various changes, additions and substitutions. Some will be apparent to those skilled in the art. For example, a general heat dissipating substrate may be a blade or other heat dissipating substrate with other general heat dissipating physical characteristics.

本発明に基づく熱放散素子の第一の実施例を描いたものである。1 depicts a first embodiment of a heat dissipation element according to the present invention. 本発明に基づく熱放散素子の第二の実施例を描いたものである。Fig. 4 depicts a second embodiment of the heat dissipation element according to the present invention. 本発明に基づく熱放散素子の第三の実施例を描いたものである。Fig. 7 depicts a third embodiment of a heat dissipation element according to the present invention. 本発明の第一の実施例に基づく熱放散素子の製造方法のフローチャートである。5 is a flowchart of a method for manufacturing a heat dissipation element according to the first embodiment of the present invention. 本発明の第二の実施例に基づく熱放散素子の製造方法のフローチャートである。5 is a flowchart of a method for manufacturing a heat dissipation element according to a second embodiment of the present invention. 本発明の第三の実施例に基づく熱放散素子の製造方法のフローチャートである。9 is a flowchart of a method for manufacturing a heat dissipation element according to a third embodiment of the present invention. 封入前の、本発明の第四の実施例に基づく集積回路素子パッケージの上面図である。FIG. 11 is a top view of an integrated circuit device package according to a fourth embodiment of the present invention before encapsulation. 図7に示した集積回路素子を、線8−8に沿って切断した場合の断面図である。FIG. 8 is a cross-sectional view of the integrated circuit device shown in FIG. 7 taken along a line 8-8. 本発明に基づいて複数の部品から熱を放出させるための熱放散素子の第五の実施例を描いた図である。FIG. 11 is a diagram illustrating a fifth embodiment of a heat dissipation element for releasing heat from a plurality of components according to the present invention. 本発明の第六の実施例に基づく熱放散素子の製造方法のフローチャートである。13 is a flowchart of a method for manufacturing a heat dissipation element according to a sixth embodiment of the present invention. 封止前の本発明の第六の実施例に基づく熱放散素子に複数の集積回路が取り付けられた状態を示す断面図である。FIG. 14 is a cross-sectional view showing a state in which a plurality of integrated circuits are mounted on a heat dissipation element according to a sixth embodiment of the present invention before sealing.

符号の説明Explanation of reference numerals

900 特定用途向けヒートシンク素子
910、1143 熱放散基板
920、930、1145、1155 熱放散スタッド
1144、1154 電子部品
900 Heat-sink element for specific application 910, 1143 Heat dissipation board 920, 930, 1145, 1155 Heat dissipation stud 1144, 1154 Electronic component

Claims (10)

複数の電子部品から熱を放散させるための特定用途向けヒートシンク素子であって、
サイズ、形状、質量、コスト、熱伝導性、環境耐性のうちの1つ以上に基づいて選択された熱放散基板と、
CTE及び機械加工性に基づいて選択された熱放散スタッドと
を具備し、前記電子部品が前記熱放散スタッドの各々へと取り付けられるように、前記熱放散スタッドの各々が前記熱放散基板に取り付けられたことを特徴とする、ヒートシンク素子。
An application specific heat sink element for dissipating heat from a plurality of electronic components,
A heat dissipation substrate selected based on one or more of size, shape, mass, cost, thermal conductivity, and environmental resistance;
A heat dissipating stud selected based on CTE and machinability, wherein each of said heat dissipating studs is mounted on said heat dissipating substrate such that said electronic component is mounted on each of said heat dissipating studs. A heat sink element, characterized in that:
前記熱放散基板が、アルミニウムケイ素炭化物で形成されていることを特徴とする、請求項1に記載のヒートシンク素子。   The heat sink element according to claim 1, wherein the heat dissipation substrate is formed of aluminum silicon carbide. 前記熱放散基板が、炭素−金属合金で形成されていることを特徴とする、請求項1に記載の特定用途向けヒートシンク素子。   The application specific heat sink element according to claim 1, wherein the heat dissipation substrate is formed of a carbon-metal alloy. 前記熱放散基板が、セラミックで形成されていることを特徴とする、請求項1に記載の特定用途向けヒートシンク素子。   The application specific heat sink device of claim 1, wherein the heat dissipation substrate is formed of ceramic. 前記熱放散スタッドが、これに取り付けられる前記電子部品のCTEに相対的に近似する値のCTEを有する材料でそれぞれ形成されていることを特徴とする、請求項1から請求項4のいずれかに記載の特定用途向けヒートシンク素子。   5. The heat dissipating stud according to claim 1, wherein the heat dissipating stud is formed of a material having a CTE relatively close to a CTE of the electronic component attached thereto. Application specific heat sink element as described. 前記熱放散スタッドが、これに取り付けられる前記電子部品と前記熱放散基板のCTEの相対的に中間のCTEを有する材料でそれぞれ形成されていることを特徴とする、請求項1から請求項5のいずれかに記載の特定用途向けヒートシンク素子。   6. The heat dissipating stud according to claim 1, wherein the heat dissipating stud is formed of a material having a CTE relatively intermediate between CTEs of the electronic component attached thereto and the heat dissipating substrate. An application specific heat sink element according to any one of the above. 前記熱放散スタッドが、金属、合金、又はそれらの組み合わせでそれぞれ形成されていることを特徴とする請求項1から請求項6に記載の特定用途向けヒートシンク素子。   The application specific heat sink element according to claim 1, wherein the heat dissipating stud is formed of a metal, an alloy, or a combination thereof. 前記熱放散基板が、第一の面上に1つ以上の空洞を備え、前記熱放散スタッドの少なくとも1つが前記熱放散基板の前記第一の面上の前記1つ以上の空洞中に取り付けられ、前記空洞がアライメント手段を提供するものであることを特徴とする、請求項1から請求項7のいずれかに記載の特定用途向けヒートシンク素子。   The heat dissipating substrate includes one or more cavities on a first surface, and at least one of the heat dissipating studs is mounted in the one or more cavities on the first surface of the heat dissipating substrate. An application specific heat sink element according to any of the preceding claims, wherein the cavity provides an alignment means. 前記熱放散基板の上面に特定用途向けに選択された材料の層を形成し、前記特定用途向けに選択された材料で前記熱放散スタッドのうちの1つ以上を形成していることを特徴とする、請求項1に記載の特定用途向けヒートシンク素子。   Forming a layer of a material selected for a particular application on the top surface of the heat dissipation substrate, forming one or more of the heat dissipating studs with a material selected for the particular application. The application specific heat sink element of claim 1. 前記特定用途向けに選択された材料の層を機械加工、レーザー切断、又は化学エッチングすることにより1つ以上の前記熱放散スタッドが形成されていることを特徴とする、請求項1から請求項9のいずれかに記載の特定用途向けヒートシンク素子。   10. The one or more heat dissipating studs are formed by machining, laser cutting or chemically etching a layer of the material selected for the application. An application specific heat sink element according to any one of the above.
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Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050180111A1 (en) * 2004-02-18 2005-08-18 Bamesberger Brett E. Low thermal stress composite heat sink assembly
US20060221571A1 (en) * 2005-03-30 2006-10-05 Oberlin Gary E Thermal conductor and use thereof
WO2007045112A1 (en) * 2005-10-20 2007-04-26 Creative Led Gmbh Power housing for semiconductor chips and the arrangement thereof for heat dissipation
US20100133668A1 (en) * 2008-12-02 2010-06-03 Chung Hsing Tzu Semiconductor device and manufacturing method thereof
TWI376022B (en) 2008-12-05 2012-11-01 Ind Tech Res Inst Semiconductor package structure and method of fabricating the same
CN101752328A (en) * 2008-12-18 2010-06-23 财团法人工业技术研究院 Semi-chip packaging structure and production method thereof
US8018051B2 (en) * 2009-02-02 2011-09-13 Maxim Integrated Products, Inc. Thermally enhanced semiconductor package
CN105263297B (en) * 2015-10-23 2018-06-08 惠州市杰普特电子技术有限公司 Laser heat-proof device
CN105246298B (en) * 2015-10-23 2018-05-18 惠州市杰普特电子技术有限公司 Laser heat-transfer device

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3780795A (en) * 1972-06-19 1973-12-25 Rca Corp Multilayer heat sink
US4769744A (en) * 1983-08-04 1988-09-06 General Electric Company Semiconductor chip packages having solder layers of enhanced durability
FR2629153B1 (en) * 1988-03-22 1990-05-04 Bull Sa DEVICE FOR PRESSURE FIXING OF TWO PIECES TO ONE ANOTHER
JPH0612795B2 (en) * 1989-11-07 1994-02-16 株式会社日立製作所 Multi-chip module cooling structure
FR2659163B1 (en) * 1990-03-02 1993-09-03 Roulet Paul Antoine SHOULDER SUPPORT FOR VIOLIN.
US5208731A (en) * 1992-01-17 1993-05-04 International Electronic Research Corporation Heat dissipating assembly
US5280409A (en) * 1992-10-09 1994-01-18 Sun Microsystems, Inc. Heat sink and cover for tab integrated circuits
EP0619605B1 (en) * 1993-04-05 1996-08-28 STMicroelectronics S.r.l. Combination of an electronic semiconductor device and a heat sink
US5886407A (en) * 1993-04-14 1999-03-23 Frank J. Polese Heat-dissipating package for microcircuit devices
US5972737A (en) * 1993-04-14 1999-10-26 Frank J. Polese Heat-dissipating package for microcircuit devices and process for manufacture
US5396402A (en) * 1993-05-24 1995-03-07 Burndy Corporation Appliance for attaching heat sink to pin grid array and socket
US5594624A (en) * 1994-04-05 1997-01-14 Thermalloy, Inc. Strap spring for heat sink clip assembly
US5615735A (en) * 1994-09-29 1997-04-01 Hewlett-Packard Co. Heat sink spring clamp
JPH08111481A (en) * 1994-10-12 1996-04-30 Tokyo Tungsten Co Ltd Heat sink for semiconductor
JPH08186204A (en) * 1994-11-02 1996-07-16 Nippon Tungsten Co Ltd Heat sink and its manufacture
US5570271A (en) * 1995-03-03 1996-10-29 Aavid Engineering, Inc. Heat sink assemblies
US5621615A (en) * 1995-03-31 1997-04-15 Hewlett-Packard Company Low cost, high thermal performance package for flip chips with low mechanical stress on chip
EP0746022B1 (en) * 1995-05-30 1999-08-11 Motorola, Inc. Hybrid multi-chip module and method of fabricating
US5581441A (en) * 1995-06-07 1996-12-03 At&T Global Information Solutions Company Electrically-operated heat exchanger release mechanism
US5850691A (en) * 1995-07-20 1998-12-22 Dell Usa, L. P. Method for securing an electronic component to a pin grid array socket
US5734556A (en) * 1996-06-26 1998-03-31 Sun Microsystems, Inc. Mechanical heat sink attachment having two pin headers and a spring clip
US6395991B1 (en) * 1996-07-29 2002-05-28 International Business Machines Corporation Column grid array substrate attachment with heat sink stress relief
US5932925A (en) * 1996-09-09 1999-08-03 Intricast, Inc. Adjustable-pressure mount heatsink system
US5990552A (en) * 1997-02-07 1999-11-23 Intel Corporation Apparatus for attaching a heat sink to the back side of a flip chip package
US6118659A (en) * 1998-03-09 2000-09-12 International Business Machines Corporation Heat sink clamping spring additionally holding a ZIF socket locked
TW392869U (en) * 1998-09-04 2000-06-01 Hon Hai Prec Ind Co Ltd Heat sink for chips
JP3548444B2 (en) * 1998-12-17 2004-07-28 キヤノン株式会社 Semiconductor integrated circuit
US6198630B1 (en) * 1999-01-20 2001-03-06 Hewlett-Packard Company Method and apparatus for electrical and mechanical attachment, and electromagnetic interference and thermal management of high speed, high density VLSI modules
US6219239B1 (en) * 1999-05-26 2001-04-17 Hewlett-Packard Company EMI reduction device and assembly
US6390475B1 (en) * 1999-08-31 2002-05-21 Intel Corporation Electro-mechanical heat sink gasket for shock and vibration protection and EMI suppression on an exposed die
US6208517B1 (en) * 1999-09-10 2001-03-27 Legerity, Inc. Heat sink
JP2001085580A (en) * 1999-09-14 2001-03-30 Sumitomo Metal Electronics Devices Inc Substrate for semiconductor module and production thereof
US6462951B2 (en) * 2000-04-10 2002-10-08 Alcatal Canada Inc. Securing heat sinks to electronic components
US6299460B1 (en) * 2000-04-14 2001-10-09 Hewlett Packard Company Spring-loaded backing plate assembly for use with land grid array-type devices
US6496371B2 (en) * 2001-03-30 2002-12-17 Intel Corporation Heat sink mounting method and apparatus
US6518507B1 (en) * 2001-07-20 2003-02-11 Hon Hai Precision Ind. Co., Ltd. Readily attachable heat sink assembly
TW499151U (en) * 2001-07-20 2002-08-11 Foxconn Prec Components Co Ltd Buckling divide for heat sink

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GB0406231D0 (en) 2004-04-21
GB2401480A (en) 2004-11-10
US20040226688A1 (en) 2004-11-18

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