JP2753761B2 - Electronic component mounting substrate and method of manufacturing the same - Google Patents

Electronic component mounting substrate and method of manufacturing the same

Info

Publication number
JP2753761B2
JP2753761B2 JP2148156A JP14815690A JP2753761B2 JP 2753761 B2 JP2753761 B2 JP 2753761B2 JP 2148156 A JP2148156 A JP 2148156A JP 14815690 A JP14815690 A JP 14815690A JP 2753761 B2 JP2753761 B2 JP 2753761B2
Authority
JP
Japan
Prior art keywords
metal layer
layer
electronic component
heat
insulating base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2148156A
Other languages
Japanese (ja)
Other versions
JPH0442989A (en
Inventor
一 矢津
卓男 杁山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP2148156A priority Critical patent/JP2753761B2/en
Publication of JPH0442989A publication Critical patent/JPH0442989A/en
Application granted granted Critical
Publication of JP2753761B2 publication Critical patent/JP2753761B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/05Insulated conductive substrates, e.g. insulated metal substrate

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は,半導体などの電子部品から発生する熱を効
率良く放散させることができる電子部品搭載用基板に関
する。
Description: TECHNICAL FIELD The present invention relates to an electronic component mounting substrate capable of efficiently dissipating heat generated from electronic components such as semiconductors.

〔従来技術〕 電子部品搭載用基板は,絶縁基材表面の凹所に半導体
などの電子部品を搭載すると共に,絶縁基材の表面に導
体回路を形成しているものである。
[Prior Art] An electronic component mounting board mounts an electronic component such as a semiconductor in a recess on the surface of an insulating base material and forms a conductive circuit on the surface of the insulating base material.

そして,該絶縁基材としては,合成樹脂を素材するも
のと,セラミックスを素材とするものとがある。前者の
合成樹脂絶縁基材は,セラミックス絶縁基材に比して,
安価,軽量かつ加工容易性等の点から優れている。
The insulating base material includes a material made of a synthetic resin and a material made of a ceramic. The former synthetic resin insulating base material is
They are inexpensive, lightweight and easy to process.

しかし,合成樹脂絶縁基材はセラミックス絶縁基材に
比して熱伝導率が約100分の1程度と非常に小さい。そ
のため,合成樹脂絶縁基材は,高熱を発する半導体素子
の搭載用基板としては不向きである。
However, the thermal conductivity of the synthetic resin insulating substrate is very small, about 1/100 of that of the ceramic insulating substrate. Therefore, the synthetic resin insulating base material is not suitable as a mounting substrate for a semiconductor element that generates high heat.

そこで,放熱性向上のためにヒートシンクを用いた電
子部品搭載用基板が提案されている(例えば,特開昭60
−136348号公報)。このものは,第5図に示すごとく,
絶縁基材90に搭載した電子部品93の下方に,金属製のヒ
ートシンク81を配設したものである。電子部品93とヒー
トシンク81とは接着剤94により,また,絶縁基材90とヒ
ートシンク81とは接着剤82によりそれぞれ接合されてい
る。
Therefore, electronic component mounting substrates using heat sinks have been proposed to improve heat dissipation (see, for example,
-136348). This is shown in Fig. 5,
A metal heat sink 81 is provided below an electronic component 93 mounted on an insulating base material 90. The electronic component 93 and the heat sink 81 are joined by an adhesive 94, and the insulating base material 90 and the heat sink 81 are joined by an adhesive 82, respectively.

なお,絶縁基材90に設けたスルーホール92及びその周
辺には銅等のめっき層91により導体回路が形成されてい
る。また,スルーホール92にはめっき層91を介してリー
ドピン96の頭部が挿置されている。また,符号98は,ボ
ンディングワイヤーである。なお,図示していないが,
電子部品93の外周は湿気侵入防止のために樹脂封止が行
われる。
Note that a conductor circuit is formed by a plated layer 91 of copper or the like around the through hole 92 provided in the insulating base material 90 and the periphery thereof. The head of a lead pin 96 is inserted into the through hole 92 via a plating layer 91. Reference numeral 98 denotes a bonding wire. Although not shown,
The outer periphery of the electronic component 93 is sealed with a resin to prevent moisture from entering.

また,第6図に示すごとく,絶縁基材90の下方に凹所
97を設け,該凹所97内にヒートシンク83を配置し,該ヒ
ートシンク83の上面に電子部品93を接着剤92により接合
した電子部品搭載用基板も提案されている。
In addition, as shown in FIG.
There is also proposed an electronic component mounting board in which a heat sink 83 is provided in the recess 97, and an electronic component 93 is joined to the upper surface of the heat sink 83 by an adhesive 92.

この基板の製造においては,まず絶縁基材90の下方に
凹所97を設け,その中に接着剤84を介してヒートシンク
83を配置して,これらをプレスして一体となす。更に,
絶縁基材90における電子部品搭載部分には,上方より切
削加工を施し,ヒートシンク83の上面を露出させる。そ
して,その後,スルーホール92及びヒートシンク83の裏
面にめっき層91を施す。そして,ヒートシンク83上に電
子部品93を接合する。その他は,上記第5図の場合と同
様である。
In the manufacture of this substrate, first, a recess 97 is provided below the insulating base material 90, and a heat sink is provided therein through an adhesive 84.
Place 83 and press them together. Furthermore,
The electronic component mounting portion of the insulating base material 90 is cut from above to expose the upper surface of the heat sink 83. After that, a plating layer 91 is applied to the through holes 92 and the back surface of the heat sink 83. Then, the electronic component 93 is joined onto the heat sink 83. Others are the same as those in FIG.

〔解決しようとする課題〕[Problem to be solved]

しかしながら,前者のヒートシンク81を接合した基板
(第5図)においては,金属製ヒートシンク81の面積が
大きいので放熱性には優れているが,ヒートシンク81と
絶縁基材90との間は接着剤82が介在しているので,気密
性が悪く,耐湿性に劣っている。
However, in the former board (FIG. 5) to which the heat sink 81 is joined, the heat sink 81 made of metal has a large area and therefore has excellent heat radiation. , The airtightness is poor and the moisture resistance is poor.

つまり,接着剤82の間から電子部品93の方向に湿気が
侵入して,電子部品9が劣化する。更に,ヒートシンク
81と絶縁基材90とを接合している接着剤82は,ヒートシ
ンク81との熱膨張係数の差が大きいため,高温と低温間
の温度サイクルによってヒートシンク81が絶縁基材90か
ら剥離し易い。
That is, moisture enters between the adhesives 82 in the direction of the electronic component 93, and the electronic component 9 is deteriorated. In addition, heat sink
Since the adhesive 82 bonding the 81 and the insulating base material 90 has a large difference in thermal expansion coefficient from the heat sink 81, the heat sink 81 is easily separated from the insulating base material 90 by a temperature cycle between a high temperature and a low temperature.

一方,後者の凹所97内にヒートシンク83を配設した基
板(第6図)においては,前記のごとく,その製造に当
り,絶縁基材90に予め凹所97を設け,ヒートシンク83と
絶縁基材90とを接合し,その後電子部品搭載部分に切削
加工を施してヒートシンク83の上面を露出させる等とい
う複雑かつ精密な加工を必要とする。
On the other hand, in the latter substrate (FIG. 6) in which the heat sink 83 is provided in the recess 97, as described above, the recess 97 is provided in the insulating base material 90 before the heat sink 83 is formed. It is necessary to perform complicated and precise processing such as bonding the material 90 and then cutting the electronic component mounting portion to expose the upper surface of the heat sink 83.

また,そのためにコスト高となる。更には,ヒートシ
ンク83の面積を電子部品93よりも大きく設けなければな
らない。
In addition, the cost increases. Furthermore, the area of the heat sink 83 must be larger than the electronic component 93.

本発明は,かかる従来技術の問題点に鑑み,熱放散
性,耐湿性に優れ,かつコンパクトな電子部品搭載用基
板を提供しようとするものである。
The present invention has been made in view of the problems of the related art, and has as its object to provide a compact electronic component mounting board that is excellent in heat dissipation and moisture resistance.

〔課題の解決手段〕[Solutions to solve the problem]

本発明は,導体回路を設けた絶縁基材に電子部品搭載
用の凹所を設け,また該凹所の内面には金属メッキ層を
施してなる電子部品搭載用基板において,該電子部品搭
載用基板は上記絶縁基材の内部に放熱用の上部金属層と
下部金属層の2層を互いに離隔して配設していると共に
絶縁基材の裏面側には放熱金属層を有し,また上記上部
金属層は上記凹所の金属メッキ層に接続し,該上部金属
層と上記下部金属層とは金属メッキ層を施したインナー
バイアホールにより接続し,また,下部金属層と放熱金
属層とは金属メッキ層を施した凹状伝熱部により接続さ
れていることを特徴とする電子部品搭載用基板にある。
The present invention relates to an electronic component mounting substrate provided with a recess for mounting electronic components in an insulating base material provided with a conductor circuit, and a metal plating layer provided on an inner surface of the recess. The substrate has two heat dissipating upper and lower metal layers disposed separately from each other inside the insulating base material, and has a heat dissipating metal layer on the back side of the insulating base material. The upper metal layer is connected to the metal plating layer in the recess, the upper metal layer is connected to the lower metal layer by an inner via hole provided with a metal plating layer, and the lower metal layer and the heat dissipation metal layer are connected to each other. The electronic component mounting substrate is connected by a concave heat transfer section provided with a metal plating layer.

本発明において最も注目すべきことは,絶縁基材の内
部に放熱用の上部金属層及び放熱用下部金属層を設ける
と共に両者間をインナーバイアホールにより熱的に接続
し,また該下部金属層は絶縁基材の裏面側に設けた放熱
金属層との間を凹状伝熱部により熱的に接続したことに
ある。
The most remarkable point in the present invention is that an upper metal layer for heat dissipation and a lower metal layer for heat dissipation are provided inside an insulating base material, and both are thermally connected to each other by an inner via hole. In other words, it is thermally connected to the heat-dissipating metal layer provided on the back surface side of the insulating base by the concave heat transfer portion.

上記上部金属層は,絶縁基材の内部において,その表
面側,つまり上記凹所に近い側に配設する。また,下部
金属層は絶縁基材の内部において,その裏面側に近い部
分に配設する。そして,上部金属層と下部金属層とは互
いに離隔している。
The upper metal layer is disposed inside the insulating base material on the surface side, that is, on the side near the recess. Further, the lower metal layer is disposed in a portion near the back surface inside the insulating base material. The upper metal layer and the lower metal layer are separated from each other.

かかる上部金属層及び下部金属層は,例えば銅張絶縁
基材の上下両表面に設けた銅箔により形成する。即ち,
銅張絶縁基材の上下にプリプレグ層を設けることによ
り,内部に上部金属層と下部金属層とを形成する(第3C
図参照)。
The upper metal layer and the lower metal layer are formed of, for example, copper foil provided on both upper and lower surfaces of a copper-clad insulating base material. That is,
By forming prepreg layers above and below the copper-clad insulating base material, an upper metal layer and a lower metal layer are formed inside (3C
See figure).

また,上部金属層と下部金属層とは,金属メッキ層を
施したインナーバイアホールにより熱的に接続する。該
インナーバイアホールは,例えば円筒状とする。また,
インナーバイアホールは,例えば電子部品搭載用の凹所
の外方位置において,これを囲むように多数設ける。
The upper metal layer and the lower metal layer are thermally connected by an inner via hole provided with a metal plating layer. The inner via hole has a cylindrical shape, for example. Also,
A large number of inner via holes are provided, for example, at positions outside the recess for mounting electronic components so as to surround the recess.

また,上記放熱金属層は,絶縁基材の裏面側に,例え
ば銅等の金属メッキ層を施すことにより形成する。そし
て,該放熱金属層と上記下部金属層との間は,金属メッ
キ層を施した凹状伝熱部により熱的に接続する。また,
上記の放熱金属層及び凹状伝熱部における金属メッキ層
の形成は,同時に行うこともできる。
The heat-dissipating metal layer is formed by applying a metal plating layer of, for example, copper on the back surface of the insulating base material. The heat dissipating metal layer and the lower metal layer are thermally connected by a concave heat transfer portion provided with a metal plating layer. Also,
The formation of the heat-dissipating metal layer and the metal plating layer in the concave heat transfer section can be performed simultaneously.

また,上記凹状伝熱部は,例えばブラインドバイアホ
ールのごとき,単一の円筒状体のものを多数設けること
(第4図),或いは電子部品搭載用基板の凹所よりも大
き目に環状溝として形成すること(第2図)により設け
る。
Also, the concave heat transfer section may be provided with a large number of single cylindrical bodies such as blind via holes (FIG. 4), or may be formed as an annular groove larger than the concave section of the electronic component mounting substrate. It is provided by forming (FIG. 2).

また,上記放熱金属層には,放熱性向上のために,通
常使用される放熱フィンを取付けることもできる。
Further, a radiation fin generally used can be attached to the heat radiation metal layer in order to improve heat radiation.

また,本発明は,合成樹脂系,セラミックス系など種
々の絶縁基材に対して適用することができる。
Further, the present invention can be applied to various insulating base materials such as a synthetic resin type and a ceramic type.

また,上記電子部品搭載用基板の製造方法としては,
内部絶縁基材の上下両面に上部金属層と下部金属層とを
有する積層板を用い,該積層板にインナーバイアホール
を穿設すると共に該インナーバイアホール内に金属メッ
キ層を形成し,次いで該積層板の上下にプリプレグ層を
介して金属箔層を加熱接合し,次いで上方に上記上部金
属層まで達する電子部品搭載用の凹所をザグリ加工によ
り形成し,また下方には上記下部金属層に達する凹状伝
熱部を形成し,次いで上記凹所及び凹状伝熱部に金属メ
ッキ層を形成することを特徴とする電子部品搭載用基板
の製造方法がある。
In addition, as a method of manufacturing the electronic component mounting substrate,
Using a laminated plate having an upper metal layer and a lower metal layer on both upper and lower surfaces of an inner insulating base material, forming an inner via hole in the laminated plate and forming a metal plating layer in the inner via hole, A metal foil layer is heated and bonded to the upper and lower sides of the laminate via a prepreg layer, and then a recess for mounting electronic components is formed on the upper side of the lower metal layer through the counterbore processing. There is a method for manufacturing a substrate for mounting electronic components, characterized by forming a concave heat transfer portion that reaches, and then forming a metal plating layer on the concave portion and the concave heat transfer portion.

上記において,上部金属層,下部金属層、金属箔層は
銅箔層などの金属層を用いる。また,金属メッキ層とし
ては,銅メッキ,ニッケルメッキ,金メッキなどがあ
る。また,内部絶縁基材としてはガラスエポキシ樹脂基
板,ガラストリアジン樹脂基板,ガラスポリイミド樹脂
基板などがある。また,プレプレグとしては,エポキシ
プリプレグ,トリアジンプリプレグ,ポリイミドプリプ
レグなどを用いる。
In the above, a metal layer such as a copper foil layer is used for the upper metal layer, the lower metal layer, and the metal foil layer. In addition, examples of the metal plating layer include copper plating, nickel plating, and gold plating. In addition, examples of the internal insulating base include a glass epoxy resin substrate, a glass triazine resin substrate, and a glass polyimide resin substrate. As the prepreg, an epoxy prepreg, a triazine prepreg, a polyimide prepreg, or the like is used.

〔作用及び効果〕[Action and effect]

本発明の電子部品搭載用基板においては,搭載した電
子部品が発熱すると,この熱は電子部品搭載用の凹所内
面に形成した金属メッキ層より,放熱用の上部金属層に
伝達される。そして,該熱は,インナーバイアホールの
金属メッキ層より放熱用の下部金属層に伝熱され,更に
ブラインドバイアホール等の凹状伝熱部の金属メッキ層
を経て裏面側の放熱金属層に伝達される。即ち,上記イ
ンナーバイアホール及び凹状伝熱部がヒートパイプの役
割を果たす。
In the electronic component mounting board of the present invention, when the mounted electronic component generates heat, the heat is transmitted from the metal plating layer formed on the inner surface of the electronic component mounting recess to the upper metal layer for heat dissipation. The heat is transferred from the metal plating layer of the inner via hole to the lower metal layer for heat dissipation, and further transmitted to the heat dissipating metal layer on the back side through the metal plating layer of the concave heat transfer portion such as the blind via hole. You. That is, the inner via hole and the concave heat transfer portion function as a heat pipe.

次に,この放熱金属層に伝えられた熱は、裏面側より
大気中へ放熱される。そして,この放熱金属層は,絶縁
基材の裏面側に設けてあるので広い面積を有する。その
ため,放熱金属層からは効率良く伝熱が行われる。
Next, the heat transmitted to the heat dissipating metal layer is dissipated to the atmosphere from the back side. The heat dissipating metal layer has a large area because it is provided on the back surface side of the insulating base material. Therefore, heat is efficiently transferred from the heat dissipating metal layer.

また,上記凹所の内部は金属メッキ層が被覆され,更
にインナーバイアホール,凹状伝熱部及び放熱金属層は
全て金属メッキ層等の金属層によって形成されている。
そのため,凹所内部から絶縁基材裏面側の間には,前記
従来のごとく樹脂接着剤が存在しない。それ故,絶縁基
材裏面側より凹所内へ湿気が浸入することがない。な
お,凹所側は,前述のごとく電子部品を搭載した後,湿
気浸入防止用の樹脂封止を行う。
The inside of the recess is covered with a metal plating layer, and the inner via hole, the concave heat transfer section and the heat radiation metal layer are all formed by a metal layer such as a metal plating layer.
Therefore, there is no resin adhesive between the inside of the recess and the back side of the insulating base as in the conventional case. Therefore, moisture does not enter the recess from the back side of the insulating base material. After the electronic components are mounted on the recess side as described above, resin sealing is performed to prevent moisture from entering.

また,上記のごとく,凹所内部の金属メッキ層は,上
部金属層,インナーバイアホール,下部金属層,凹状伝
熱部,放熱金属層と接続されているため,これらの間に
電気的導通が図られている。そのため,これらの金属層
を電源回路又は接地回路として利用することも出来る。
As described above, the metal plating layer inside the recess is connected to the upper metal layer, the inner via hole, the lower metal layer, the concave heat transfer section, and the heat dissipating metal layer. It is planned. Therefore, these metal layers can be used as a power supply circuit or a ground circuit.

また,本発明においては,前記従来のごとくヒートシ
ンクを用いないので,電子部品搭載用基板全体の厚みを
絶縁基材の厚みに抑えることができ,厚みが薄くてコン
パクトである。
Further, in the present invention, since a heat sink is not used unlike the conventional case, the entire thickness of the electronic component mounting substrate can be suppressed to the thickness of the insulating base material, and the thickness is small and compact.

したがって,本発明によれば,熱放散性,耐湿気性に
優れ,かつコンパクトな電子部品搭載用基板を提供する
ことができる。
Therefore, according to the present invention, it is possible to provide a compact electronic component mounting board which is excellent in heat dissipation and moisture resistance.

また,上記製造法によれば,上記のごとく優れた電子
部品搭載用基板を容易に製造することができる。
Further, according to the above-described manufacturing method, an excellent electronic component mounting substrate as described above can be easily manufactured.

〔実施例〕〔Example〕

第1実施例 本発明の実施例にかかる電子部品搭載用基板につき,
第1図〜第3F図を用いて説明する。
First Embodiment An electronic component mounting board according to an embodiment of the present invention will be described.
This will be described with reference to FIGS. 1 to 3F.

本例の電子部品搭載用基板は,第1図及び第2図に示
すごとく,導体回路440を設けた絶縁基材3に,電子部
品搭載用の凹所4を設け,該凹所4の内面に金属メッキ
層41を施してなる。そして,上記絶縁基材3の内部に
は,放熱用の上部金属層1と放熱用の下部金属層2との
二層を互いに離隔して配設している。
As shown in FIGS. 1 and 2, the electronic component mounting board of this embodiment is provided with an electronic component mounting recess 4 in an insulating base material 3 provided with a conductor circuit 440, and an inner surface of the recess 4 is provided. Is provided with a metal plating layer 41. Further, inside the insulating base material 3, two layers of a heat dissipating upper metal layer 1 and a heat dissipating lower metal layer 2 are disposed separately from each other.

また,絶縁基材3の裏面側には放熱金属層45を有す
る。また,上記上部金属層1は,上記凹所4の金属メッ
キ層41に接続され,該上部金属層1と上記下部金属層2
とは金属メッキ層51を施したインナーバイアホール5に
より接続されている。また,下部金属層2と上記放熱金
属層45との間は,金属メッキ層61を施した凹状伝熱部6
により接続されている。
Further, a heat dissipating metal layer 45 is provided on the back surface side of the insulating base material 3. The upper metal layer 1 is connected to the metal plating layer 41 of the recess 4 so that the upper metal layer 1 and the lower metal layer 2 are connected.
Are connected by the inner via hole 5 provided with the metal plating layer 51. Further, between the lower metal layer 2 and the heat-dissipating metal layer 45, a concave heat transfer portion 6 provided with a metal plating layer 61 is provided.
Connected by

また,該凹状伝熱部6は,第2図に示すごとく,環状
溝により形成されている。なお,第1図,第2図におい
て,符号92は,導体ピン挿入用のスルーホールである。
As shown in FIG. 2, the concave heat transfer section 6 is formed by an annular groove. In FIGS. 1 and 2, reference numeral 92 denotes a through hole for inserting a conductor pin.

次に,上記電子部品搭載用基板の製造方法につき,第
3A図〜第3F図を用いて説明する。
Next, the method of manufacturing the electronic component mounting board described above
This will be described with reference to FIGS. 3A to 3F.

まず,第3A図に示すごとく,銅張り積層板30を準備す
る。該銅張り積層板30は,その上面の銅箔層が本発明に
かかる上部金属層1を,下面の銅箔層が下部金属層2を
形成することとなる。そして,上部金属層1と下部金属
層2との間にガラスエポキシ基板からなる内部絶縁基材
31を有する。
First, as shown in FIG. 3A, a copper-clad laminate 30 is prepared. In the copper-clad laminate 30, the copper foil layer on the upper surface forms the upper metal layer 1 according to the present invention, and the copper foil layer on the lower surface forms the lower metal layer 2. And an inner insulating base made of a glass epoxy substrate between the upper metal layer 1 and the lower metal layer 2.
With 31.

次に,第3B図に示すごとく,該銅張り積層板30におい
て,インナーバイアホール5を穿設する。そして,該イ
ンナーバイアホール5内に金属メッキ層51を形成する。
また,上下両面をエッチングして,後述するスルーホー
ル92のランド用金属層13,23を形成する。
Next, as shown in FIG. 3B, an inner via hole 5 is formed in the copper-clad laminate 30. Then, a metal plating layer 51 is formed in the inner via hole 5.
The upper and lower surfaces are etched to form land metal layers 13 and 23 for through holes 92 described later.

次に,第3C図に示すごとく,上記銅張り積層板30の上
下に,合成樹脂のプリプレグ層33を介して,銅箔層44,
放熱金属層45を配置する。該放熱金属層45は銅箔よりな
る。
Next, as shown in FIG. 3C, the copper foil layers 44, 44 are formed above and below the copper-clad laminate 30 via a prepreg layer 33 of synthetic resin.
The heat dissipating metal layer 45 is disposed. The heat dissipating metal layer 45 is made of copper foil.

そして,第3D図に示すごとく,これらを加熱下に圧着
して,積層板301とする。これにより,インナーバイア
ホール5内もプリプレグ33によって充填される。また,
積層板301内の絶縁基材3は、上記内部絶縁基材31と上
下のプリプレグ33,33との三層により構成されることと
なる。
Then, as shown in FIG. 3D, these are pressure-bonded under heating to form a laminated plate 301. Thereby, the inside of the inner via hole 5 is also filled with the prepreg 33. Also,
The insulating base material 3 in the laminated plate 301 is constituted by three layers of the internal insulating base material 31 and the upper and lower prepregs 33,33.

その後,第3E図に示すごとく,上記積層板301の上方
にザグリ加工を施し,電子部品搭載用の凹所4を設け
る。該凹所4は上部金属層1を貫通して内部絶縁基材31
まで達している。また,該積層板301の下方には,上記
インナーバイアホール5より外方において,凹状伝熱部
6をザグリ加工により形成する。更にスルーホール92を
穿設する。
Thereafter, as shown in FIG. 3E, a counterboring process is performed above the laminated plate 301 to provide a recess 4 for mounting electronic components. The recess 4 penetrates through the upper metal layer 1 to form the inner insulating base material 31.
Has reached. Further, a concave heat transfer portion 6 is formed below the laminated plate 301 outside the inner via hole 5 by counterbore processing. Further, a through hole 92 is formed.

その後,第3F図に示すごとく,上記積層板301の全表
面に銅金属メッキ層を施す。これにより,凹所4内,凹
状伝熱部6内,スルーホール92内に,金属メッキ層41,6
1,921が形成される。次いで、常法により,表面側の銅
箔層44をエッチングして,導体回路440を形成する。こ
れにより,前記第1図に示した電子部品搭載用基板が得
られる。
Thereafter, as shown in FIG. 3F, a copper metal plating layer is applied to the entire surface of the laminated plate 301. As a result, the metal plating layers 41, 6 are formed in the recess 4, the concave heat transfer section 6, and the through hole 92.
1,921 are formed. Next, the copper foil layer 44 on the front side is etched by a conventional method to form a conductive circuit 440. Thus, the electronic component mounting board shown in FIG. 1 is obtained.

本例の電子部品搭載用基板においては,凹所4内に搭
載した電子部品(図示略)が発熱した熱は,凹所4の金
属メッキ層41,上部金属層1,インナーバイアホール5の
金属メッキ層51,下部金属層2,凹状伝熱部6の金属メッ
キ層61を通じて放熱金属層45に放出される。そして,こ
の放熱金属層45は,電子部品搭載用基板の裏面側に幅広
く形成されているので,放熱性に優れている。
In the electronic component mounting board of this example, the heat generated by the electronic component (not shown) mounted in the recess 4 is generated by the metal plating layer 41 of the recess 4, the upper metal layer 1, and the metal of the inner via hole 5. The heat is released to the heat dissipating metal layer 45 through the plating layer 51, the lower metal layer 2, and the metal plating layer 61 of the concave heat transfer section 6. Since the heat dissipating metal layer 45 is formed widely on the back surface side of the electronic component mounting board, the heat dissipating metal layer 45 is excellent in heat dissipation.

また,凹所4の内部は,金属メッキ層41が被覆され,
インナーバイアホール5,凹状伝熱部6,放熱金属層45は全
て金属層である。そのため,絶縁基材の裏面側から凹所
4内に湿気が浸入することがない。なお,凹所4側は,
電子部品を搭載した後に樹脂封止して,湿気防止を行
う。
The inside of the recess 4 is covered with a metal plating layer 41,
The inner via hole 5, the concave heat transfer section 6, and the heat dissipation metal layer 45 are all metal layers. Therefore, moisture does not enter the recess 4 from the back side of the insulating base material. The recess 4 side
After mounting electronic components, they are sealed with resin to prevent moisture.

また,凹所の金属メッキ層41は,上部金属層1,インナ
ーバイアホール5,下部金属層2,凹状伝熱部6,放熱金属層
45との間が全て金属により連結され,これらの間に電気
的導通が得られている。それ故,これらの金属層を電源
回路又は接地回路として利用することもできる。
In addition, the metal plating layer 41 of the recess is composed of the upper metal layer 1, the inner via hole 5, the lower metal layer 2, the concave heat transfer section 6, the heat radiation metal layer.
45 and all are connected by metal, and electrical continuity is obtained between them. Therefore, these metal layers can be used as a power supply circuit or a ground circuit.

また,上記の製法によれば,上記電子部品搭載用基板
を容易に製造することができる。
Further, according to the above manufacturing method, the electronic component mounting board can be easily manufactured.

また,従来のごとく大きな面積のヒートシンクを用い
る必要かないので,電子部品搭載用基板全体がコンパク
トになる。
Further, since it is not necessary to use a heat sink having a large area as in the conventional case, the entire electronic component mounting substrate can be made compact.

第2実施例 本例の電子部品搭載用基板は,第4図に示すごとく,
第1実施例における環状溝の凹状伝熱部6に代えて,円
筒状のブラインドバイアホールからなる凹状伝熱部65を
多数設けたものである。その他は,第1実施例と同様で
ある。
SECOND EXAMPLE As shown in FIG.
Instead of the concave heat transfer section 6 of the annular groove in the first embodiment, a large number of concave heat transfer sections 65 formed of cylindrical blind via holes are provided. Others are the same as the first embodiment.

本例によれば,第1実施例と同様の効果が得られる。 According to this embodiment, the same effects as in the first embodiment can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

第1図〜第3F図は第1実施例の電子部品搭載用基板を示
し,第1図はその断面図,第2図は一部切欠裏面図,第
3A図〜第3F図は製造工程図,第4図は第2実施例の電子
部品搭載用基板の裏面図,第5図及び第6図は従来の電
子部品搭載用基板の断面図である。 1……上部金属層, 2……下部金属層, 3……絶縁基材, 31……内部絶縁基材, 33……プリプレグ, 4……凹所, 41,51,61……金属メッキ層, 45……放熱金属層, 5……インナーバイアホール, 6,65……凹状伝熱部,
1 to 3F show the electronic component mounting board of the first embodiment, FIG. 1 is a cross-sectional view thereof, FIG.
3A to 3F are manufacturing process diagrams, FIG. 4 is a rear view of the electronic component mounting substrate of the second embodiment, and FIGS. 5 and 6 are cross-sectional views of a conventional electronic component mounting substrate. 1 ... upper metal layer, 2 ... lower metal layer, 3 ... insulating base material, 31 ... internal insulating base material, 33 ... prepreg, 4 ... recess, 41, 51, 61 ... metal plating layer , 45 ... heat dissipating metal layer, 5 ... inner via hole, 6, 65 ... concave heat transfer section,

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】導体回路を設けた絶縁基材に電子部品搭載
用の凹所を設け,また該凹所の内面には金属メッキ層を
施してなる電子部品搭載用基板において, 該電子部品搭載用基板は上記絶縁基材の内部に放熱用の
上部金属層と下部金属層の2層を互いに離隔して配設し
ていると共に絶縁基材の裏面側には放熱金属層を有し,
また上記上部金属層は上記凹所の金属メッキ層に接続
し, 該上部金属層と上記下部金属層とは金属メッキ層を施し
たインナーバイアホールにより接続し, また,下部金属層と放熱金属層とは金属メッキ層を施し
た凹状伝熱部により接続されていることを特徴とする電
子部品搭載用基板。
1. An electronic component mounting substrate comprising: an insulating substrate provided with a conductor circuit; and a concave portion for mounting an electronic component, wherein a metal plating layer is provided on an inner surface of the concave portion. The substrate for use has an upper metal layer and a lower metal layer for heat radiation separated from each other inside the insulating base material, and has a heat dissipating metal layer on the back side of the insulating base material.
The upper metal layer is connected to the metal plating layer in the recess, the upper metal layer is connected to the lower metal layer by an inner via hole provided with a metal plating layer, and the lower metal layer is connected to the heat dissipation metal layer. Is connected by a concave heat transfer portion provided with a metal plating layer.
【請求項2】内部絶縁基材の上下両面に上部金属層と下
部金属層とを有する積層板を用い,該積層板にインナー
バイアホールを穿設すると共に該インナーバイアホール
内に金属メッキ層を形成し,次いで該積層板の上下にプ
リプレグ層を介して金属箔層を加熱接合し,次いで上方
に上記上部金属層まで達する電子部品搭載用の凹所をザ
グリ加工により形成し,また下方には上記下部金属層に
達する凹状伝熱部を形成し,次いで上記凹所及び凹状伝
熱部に金属メッキ層を形成することを特徴とする電子部
品搭載用基板の製造方法。
2. A laminated plate having an upper metal layer and a lower metal layer on both upper and lower surfaces of an internal insulating base material, an inner via hole is formed in the laminated plate, and a metal plating layer is formed in the inner via hole. Then, a metal foil layer is heat-bonded to the upper and lower sides of the laminate via a prepreg layer, and then a recess for mounting electronic components reaching the upper metal layer upward is formed by counterbore processing. A method for manufacturing an electronic component mounting substrate, comprising: forming a concave heat transfer portion reaching the lower metal layer; and then forming a metal plating layer on the concave portion and the concave heat transfer portion.
JP2148156A 1990-06-06 1990-06-06 Electronic component mounting substrate and method of manufacturing the same Expired - Fee Related JP2753761B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2148156A JP2753761B2 (en) 1990-06-06 1990-06-06 Electronic component mounting substrate and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2148156A JP2753761B2 (en) 1990-06-06 1990-06-06 Electronic component mounting substrate and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH0442989A JPH0442989A (en) 1992-02-13
JP2753761B2 true JP2753761B2 (en) 1998-05-20

Family

ID=15446513

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2148156A Expired - Fee Related JP2753761B2 (en) 1990-06-06 1990-06-06 Electronic component mounting substrate and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP2753761B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2730388B2 (en) * 1992-04-02 1998-03-25 日本電気株式会社 Hybrid integrated circuit device
JP3671457B2 (en) * 1995-06-07 2005-07-13 株式会社デンソー Multilayer board
JP2013093378A (en) * 2011-10-24 2013-05-16 Keihin Corp Electronic controller

Also Published As

Publication number Publication date
JPH0442989A (en) 1992-02-13

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