JP3036484B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method for manufacturing the same. More specifically, suitable for high-density mounting,
The present invention relates to a semiconductor device (hereinafter, referred to as a chip-size package “CSP”) having a heat dissipation characteristic that is excellent in heat dissipation among the semiconductor devices equivalent to or slightly larger in size than the semiconductor element.

[0002]

2. Description of the Related Art A new type of semiconductor device CSP has been developed in order to meet the demands of electronic equipment for miniaturization, high speed and high performance. One example of a semiconductor CSP using a carrier film is proposed in Japanese Patent Application Laid-Open No. 8-102474. In a semiconductor CSP using a carrier film described in the conventional example, external terminals such as bump electrodes are arranged on a grid within an area of a wiring surface of the semiconductor element, so that the semiconductor device has an area equivalent to that of the semiconductor element. (Hereinafter referred to as a real chip size type CSP), and external terminals such as bump electrodes cannot be arranged in a grid within the area of the wiring surface of the semiconductor element. There are two types that extend to the outside of the wiring surface (hereinafter referred to as a flanged CSP). FIG. 6A shows a longitudinal section of a real chip size CSP, and FIG. 6B shows a longitudinal section of a flanged CSP.

On the other hand, recent trends in semiconductor devices include high power consumption. Therefore, high heat dissipation is required for the semiconductor device. However, high heat dissipation and miniaturization of a semiconductor device conflict with each other in performance. As a well-known method used as a countermeasure, as shown in FIG. 7A, a real chip size type CSP is provided on the back surface of the semiconductor element 10, and a flanged type CSP is shown in FIG. 7B. As described above, a metal heat sink 24 is connected to the back surface of the sealing resin frame portion 26 using the conductive adhesive 25 to improve heat dissipation.

[0004]

However, as a first problem of the well-known semiconductor device, when manufacturing a flanged CSP, a hole is formed in a carrier film at the time of resin sealing to form a resin sealing frame portion. In order to determine the position, the semiconductor element and the sealing resin frame portion are likely to be misaligned.

[0005] The second problem is that the material of the sealing resin frame portion must be selected from resins having good adhesion to the bottom and side surfaces of the semiconductor element and excellent heat conductivity. Is limited. A third problem is that a separate step of applying an adhesive and attaching a heat sink is required.

An object of the present invention is to provide a structure of a semiconductor device and a method of manufacturing the same, which solve the above-mentioned problems of the prior art.

[0007]

The present invention employs the following basic technical structure to achieve the above object. That is, a first aspect of the present invention for solving the above-mentioned problem is a semiconductor device in which a film having a metal wiring pattern formed on one main surface of an insulating film is bonded to a circuit wiring surface of a semiconductor element. A semiconductor device characterized in that a frame body made of a material having a high heat dissipation effect is fixed to a peripheral portion of the element without using an adhesive means.

According to a second aspect of the present invention, there is provided a semiconductor device comprising: a step of bonding a semiconductor element to a film having a metal wiring pattern formed on one main surface of an insulating film; A step of heating a frame having a smaller inner peripheral length than the outer peripheral length of the semiconductor element by heating the frame, a step of fitting the frame into the semiconductor element, Cooling the semiconductor element in which the part is fitted.

[0009]

According to the unique technical structure of the present invention, preferably, a metal having a larger coefficient of thermal expansion than a semiconductor element attached to a carrier film is used as a frame, After the metal frame is heated and expanded, it is fitted into the semiconductor element, and then cooled to room temperature, so that the metal frame tends to shrink smaller than the semiconductor element. The semiconductor element comes into contact with the element and is held by the contraction force.

[0010]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. FIG. 1 is a longitudinal sectional view of a flanged CSP according to the present invention. Reference numeral 10 denotes a semiconductor element, and reference numeral 20 denotes a metal frame surrounding the semiconductor element. The semiconductor device of the present invention
In a semiconductor device in which a film in which a metal wiring pattern 12 is formed on one main surface of an insulating film 11 is bonded to a circuit wiring surface of a semiconductor element 10, a peripheral portion of the semiconductor element 10 is made of a material having a high heat radiation effect. The frame 20 is
It is characterized in that it is fixed without using an adhesive means.

More specifically, in the above configuration, an adhesive layer 13 is provided at a portion where a part of the frame portion 20 is joined to a part of one main surface of the insulating film 11. And a main surface opposite to the one main surface of the insulating film 11 that is in contact with the frame portion 20, and a portion supported by the frame portion 20 is provided with an external connection terminal. It is characterized in that a certain bump electrode 19 is provided. Further, it is desirable that the material forming the frame body portion 20 be made of a metal whose thermal expansion coefficient is larger than that of the material forming the semiconductor element 10.

Next, a method of manufacturing a semiconductor device according to a second aspect of the present invention will be described. 2 and 3 show a first embodiment, and are longitudinal sectional flow charts of the manufacturing process of the flanged CSP of FIG. The carrier film shown in FIG. 2A has a wiring layer 12 formed by pattern etching of a copper foil laminated on a main surface of an organic insulating film 11 as proposed in Japanese Patent Application Laid-Open No. 8-102474.
After that, an adhesive layer 13 is provided on a surface opposite to the wiring layer 12,
A through hole is formed in the carrier film and the adhesive layer by Ar laser processing or chemical etching, and a metal bump 14 is formed in the through hole by plating. The adhesive layer 13 can be omitted in some cases.

The metal bump 14 may be any metal as long as it can be bonded to the semiconductor element by heating with an electrode material, but Au is preferable. An organic insulating resist material layer 15 is formed on the wiring layer 12. This carrier film has a ribbon shape in units of several tens to several hundreds, and between the individual carrier films, for example, as shown in FIG. There is a part 21.

FIG. 2A is a longitudinal sectional view of such a carrier film. First, in the first embodiment of the present invention, the metal bumps 14 of the carrier film and the semiconductor element electrodes 16 are joined by applying heat and ultrasonic waves using a bonding tool 17 as shown in FIG. 2B. Next, FIG.
As shown in (1), the semiconductor element circuit surface and the carrier film adhesive layer 13 are heated and pressed by a crimping tool 18 of a size to be bonded and fixed, and fixed.

Although an adhesive layer 13 is necessary for this step, an unused adhesive is applied to the non-wiring portion 21 (FIG. 3 (f)) of the carrier film which is not used for adhesive fixing to the semiconductor element circuit surface. Layer 13 will remain. When sufficient adhesion between the carrier film and the semiconductor element is obtained in the first step, the use of the adhesive layer 13 can be omitted. Next, as shown in FIG. 2D, the separately prepared inner peripheral edge length of the frame portion is slightly smaller than the outer peripheral edge length of the element at room temperature and has a larger thermal expansion coefficient than that of the semiconductor element 10. The frame 20 using the material is heated so that the inner peripheral length of the frame 20 is larger than the outer peripheral length of the semiconductor element, so that the frame 20 is fitted into the semiconductor element attached to the carrier film.

When the semiconductor device 10 is then cooled to room temperature, the frame portion 20 tends to shrink smaller than the semiconductor device 10, so that the semiconductor device 10 is held by the shrinking force. Here, the size of the frame body portion 20 will be described using an example in which the material is copper. Normally, since the semiconductor element 10 is a silicon Si compound, the thermal expansion coefficient is 4.2 × 10 ⁻⁶ /
° C. When the material of the frame portion 20 is made of copper, its thermal expansion coefficient is 1.8 × 10 ⁻⁵ / ° C.
0 and 300 mm when the size of the inner diameter of the frame 20 is 10 mm.
When heated to ° C., an expansion difference of about 0.0385 mm occurs between the semiconductor element 10 and the frame 20.
Therefore, the inner peripheral edge length of the frame body portion 20 is 9.98 to 9.99 mm.
If the frame 20 is formed to a suitable degree and the frame 20 is inserted using the above process, the inner peripheral length of the frame 20 becomes larger than the outer peripheral length of the semiconductor element 10 during heating, and the frame 20 at room temperature. Contracts to hold the semiconductor element 10 with a contracting force.

The material of the frame portion 20 may be any material having a larger coefficient of thermal expansion than the element 10. However, if the coefficient of thermal expansion is too small, an excessively high temperature is required at the time of heating.
Preferably, a material having a thermal conductivity of at least 1.0 × 10 ⁻⁵ / ° C. and good thermal conductivity should be selected. When the unused adhesive layer 13 remains in the non-wiring portion 21 of the carrier film, if the pressure is applied when the frame portion 20 is fitted, the frame portion 20 is pressed.
The contact surface between the carrier film and the carrier film is also easily bonded.

FIG. 3E shows a state where the device is cooled to room temperature and the frame holds the element. Next, as shown in FIG.
The bump electrode 19 is formed on a pattern portion provided for forming an external connection terminal. Although solder is generally used as the material of the bump electrode 19, any material may be used as long as the metal has good bonding properties with the mounting wiring board. Finally, FIG. 3 (g)
As shown in (1), a required portion is cut off from the ribbon-shaped carrier film to obtain a semiconductor device.

In the case of the first embodiment, since a solid metal-based material can be selected as the material of the frame body portion 20, the range of selecting a material having excellent thermal conductivity as described above is increased.
There is an advantage that the heat dissipation can be improved and the function of the heat sink can be substituted. Further, since the element 10 is held by the contraction force, it is advantageous in that it is not necessary to consider the adhesion to the element 10.

Further, the metal bumps 14 formed on the carrier film and the semiconductor element electrodes 16 are bonded with very high positional accuracy, and the frame 20 contracts in accordance with the elements 10. It is also advantageous that the entire carrier film and the frame 20 can be easily joined with high positional accuracy. Next, a second embodiment of the present invention will be described with reference to FIG.

In the second embodiment, not only the frame portion 20 'is joined to the outer peripheral portion of the semiconductor
Having a cover member that covers the entire surface including the back surface of the device. That is, the shape of the frame portion 20 'is formed so as to cover the semiconductor element 10, and the heat radiation effect is further improved as compared with the first embodiment. Each processing step for the carrier film is the same as in the first embodiment.

In the case of the second embodiment, it is possible to obtain a large area with better heat dissipation without increasing the number of manufacturing steps as compared with the first embodiment. In the case where the external connection terminals are unavoidably arranged outside the semiconductor element 10, the external terminals are conventionally placed in an unstable state without a sufficient support. Since the peripheral frame used as a heat dissipating member (heat sink) also serves as the support for the film,
External terminals of the flanged CSP can be formed in a stable state.

[0023]

According to the present invention, the following effects can be obtained. The first effect is that, in a CSP using a carrier film, a frame portion slightly smaller than a semiconductor element is heated and expanded to be larger than the element and fitted into the semiconductor element, and then the semiconductor element is fitted. Since the frame portion is cooled and contracted and fixed, a real size type and a flanged type CSP can be manufactured with high positional accuracy.

The second effect is that the frame portion, preferably a metal frame portion manufactured by the above method can be used as a heat radiating member, so that a semiconductor device excellent in heat dissipation can be manufactured. Third
The effect of (1) is that it is not necessary to use a sealing resin for fixing each semiconductor element when manufacturing a semiconductor device.

[Brief description of the drawings]

FIG. 1 is a longitudinal sectional view of a flanged CSP of the present invention. .

FIG. 2 is a longitudinal sectional view flow chart of the manufacturing method of the present invention.

FIG. 3 is a flowchart continued from FIG. 2;

FIG. 4 is a longitudinal sectional view flow chart of a second embodiment of the method of the present invention.

FIG. 5 is a flowchart continued from FIG. 4;

FIG. 6 is a longitudinal sectional view of a CSP using a carrier film according to a conventional technique.

FIG. 7 is a longitudinal sectional view of a CSP using a carrier film according to the prior art and having a heat sink.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Semiconductor element 11 ... Organic insulating film 12 ... Wiring layer 13 ... Adhesive layer 14 ... Metal bump 15 ... Resist material layer 16 ... Semiconductor element electrode 17 ... Bonding Tool 18 ... Crimping tool 19 ... Bump electrode 20 ... Metal frame part 21 ... Carrier film non-wiring part 22 ... Wiring board for mounting 23 ... Semiconductor device 24 ... Heat sink 25 ... Conductive adhesive 26 ... Resin frame

Claims (9)

(57) [Claims] 1. A semiconductor device in which a film in which a metal wiring pattern is formed on one main surface of an insulating film is joined to a circuit wiring surface of a semiconductor element, wherein a peripheral portion of the semiconductor element is formed of a material having a high heat radiation effect. A semiconductor device, wherein the frame portion is fixed without using an adhesive means. 2. The semiconductor device according to claim 1, wherein an adhesive layer is provided at a portion where a part of the frame portion is joined to a part of one main surface of the insulating film. 3. An external connection terminal is provided on a main surface opposite to one main surface of the insulating film abutting on the frame portion and supported by the frame portion. The semiconductor device according to claim 1, wherein: 4. The semiconductor device according to claim 1, wherein the material forming the frame body has a larger coefficient of thermal expansion than the material forming the semiconductor element.
4. The semiconductor device according to any one of claims 3 to 3. 5. The semiconductor device according to claim 1, wherein the frame portion further includes a lid member that covers a surface of the semiconductor element. 6. A step of joining a semiconductor element to a film having a metal wiring pattern formed on one main surface of an insulating film, and heating a frame portion having an inner peripheral edge length smaller than an outer peripheral edge length of the semiconductor element. A step of making the inner peripheral edge length larger than an outer peripheral edge length of the semiconductor element, a step of fitting the frame part to the semiconductor element, and a step of cooling the semiconductor element fitted with the frame part. A method for manufacturing a semiconductor device, comprising: 7. The method according to claim 6, further comprising the step of providing external terminals on a film wiring surface supported by the frame portion on the film wiring surface. 8. The manufacturing method according to claim 6, wherein the material of the frame portion is a metal having a thermal expansion coefficient larger than that of the semiconductor element and having a large heat radiation effect. Method. 9. The method according to claim 6, wherein the frame further includes a lid member that covers a surface of the semiconductor element.