JPH0440870B2 - - Google Patents
Info
- Publication number
- JPH0440870B2 JPH0440870B2 JP61277305A JP27730586A JPH0440870B2 JP H0440870 B2 JPH0440870 B2 JP H0440870B2 JP 61277305 A JP61277305 A JP 61277305A JP 27730586 A JP27730586 A JP 27730586A JP H0440870 B2 JPH0440870 B2 JP H0440870B2
- Authority
- JP
- Japan
- Prior art keywords
- resin
- mold
- metal frame
- tip
- cavity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/852—Encapsulations
Landscapes
- Injection Moulding Of Plastics Or The Like (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Led Device Packages (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61277305A JPS63129680A (ja) | 1986-11-20 | 1986-11-20 | 発光ダイオ−ドの樹脂封止方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61277305A JPS63129680A (ja) | 1986-11-20 | 1986-11-20 | 発光ダイオ−ドの樹脂封止方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS63129680A JPS63129680A (ja) | 1988-06-02 |
JPH0440870B2 true JPH0440870B2 (enrdf_load_stackoverflow) | 1992-07-06 |
Family
ID=17581685
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61277305A Granted JPS63129680A (ja) | 1986-11-20 | 1986-11-20 | 発光ダイオ−ドの樹脂封止方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63129680A (enrdf_load_stackoverflow) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5140384A (en) * | 1990-06-14 | 1992-08-18 | Rohm Co., Ltd. | Semiconductor laser device mounted on a stem |
US6677614B1 (en) * | 1992-12-17 | 2004-01-13 | Kabushiki Kaisha Toshiba | Semiconductor light-emitting device and method for manufacturing the device |
US6808950B2 (en) | 1992-12-17 | 2004-10-26 | Kabushiki Kaisha Toshiba | Semiconductor light-emitting device and method for manufacturing the device |
JP3541709B2 (ja) * | 1998-02-17 | 2004-07-14 | 日亜化学工業株式会社 | 発光ダイオードの形成方法 |
JP3900144B2 (ja) * | 1998-02-17 | 2007-04-04 | 日亜化学工業株式会社 | 発光ダイオードの形成方法 |
DE10163116B4 (de) * | 2001-12-24 | 2008-04-10 | G.L.I. Global Light Industries Gmbh | Verfahren zum Herstellen von lichtleitenden LED-Körpern in zwei räumlich und zeitlich getrennten Stufen |
CN112092281A (zh) * | 2019-07-19 | 2020-12-18 | 江苏和睿半导体科技有限公司 | 一种塑封注塑工艺 |
-
1986
- 1986-11-20 JP JP61277305A patent/JPS63129680A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS63129680A (ja) | 1988-06-02 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
EXPY | Cancellation because of completion of term |