JPH0438061U - - Google Patents
Info
- Publication number
- JPH0438061U JPH0438061U JP1990080081U JP8008190U JPH0438061U JP H0438061 U JPH0438061 U JP H0438061U JP 1990080081 U JP1990080081 U JP 1990080081U JP 8008190 U JP8008190 U JP 8008190U JP H0438061 U JPH0438061 U JP H0438061U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- tab
- wire
- peripheral edge
- assembly structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990080081U JPH0438061U (enExample) | 1990-07-27 | 1990-07-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990080081U JPH0438061U (enExample) | 1990-07-27 | 1990-07-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0438061U true JPH0438061U (enExample) | 1992-03-31 |
Family
ID=31624821
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990080081U Pending JPH0438061U (enExample) | 1990-07-27 | 1990-07-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0438061U (enExample) |
-
1990
- 1990-07-27 JP JP1990080081U patent/JPH0438061U/ja active Pending