JPH04366776A - Ic testing device - Google Patents

Ic testing device

Info

Publication number
JPH04366776A
JPH04366776A JP3140527A JP14052791A JPH04366776A JP H04366776 A JPH04366776 A JP H04366776A JP 3140527 A JP3140527 A JP 3140527A JP 14052791 A JP14052791 A JP 14052791A JP H04366776 A JPH04366776 A JP H04366776A
Authority
JP
Japan
Prior art keywords
line
circuit
judgement
input
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3140527A
Other languages
Japanese (ja)
Inventor
Tomohiro Yamaguchi
山口 智博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP3140527A priority Critical patent/JPH04366776A/en
Publication of JPH04366776A publication Critical patent/JPH04366776A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To make efficient the self-diagnostic function of an IC testing device. CONSTITUTION:Input signals are input from a CPU 5 to a measuring portion 8 via line A to line A1 and signals output from the measuring portion 8 are returned to the CPU 5 via the line A1 to the line A and ICs to be tested by the measuring portion 8 are judged as to whether they are conforming or nonconforming articles and the result of the judgement is output to an external automatic selecting device or the like by the route of line B to line B1. A predetermined time or a predetermined number of times of tests are preset by a setting circuit 6 and as the time elapses or each time a test is completed a switching signal is output from the setting circuit 6 and input to a switching circuit 2 and the line A is switched from the line A1 side to the line A2 side. Also at a judgement output circuit 4 the line B is switched from the line B1 side to the line B2 side in response to the switching signal. Under these conditions samples 7 to be checked are tested and the result of the judgement on the samples 7 is input to an alarm generating circuit 3 via line B to line B, and when the result of the judgement conforms with the conformity or nonconformity of the samples 7 to be checked the function of the testing device is judged to be normal.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明はIC試験装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC testing device.

【0002】0002

【従来の技術】従来のIC試験装置は、装置自体の自己
診断機能としてチェック用のプログラムが備えられてお
り、このプログラムの実行により当該試験装置が正常で
あるか否かの判断が為されている。
[Prior Art] Conventional IC testing equipment is equipped with a check program as a self-diagnosis function of the equipment itself, and by executing this program, it is determined whether or not the testing equipment is normal. There is.

【0003】また、試験対象のICが、実際に、製品と
して他の付属部品とともに回路に組込まれている状態に
おいて、所定の機能通りに動作するか否かを模擬回路に
セットした状態で試験を行う装置(以下、IC実装試験
装置と云う)においては、自己診断用プログラムを備え
ていない装置が多く、これらの装置においては、良品/
不良品のサンプルを用いて試験を実行し、装置のチェッ
クを行う必要がある。
[0003]Also, tests are conducted on a simulated circuit to check whether the IC to be tested operates according to a predetermined function when it is actually incorporated into a circuit together with other accessory parts as a product. Many of the equipment that performs this test (hereinafter referred to as IC packaging testing equipment) are not equipped with a self-diagnosis program, and these equipment
It is necessary to perform tests on samples of defective products and check the equipment.

【0004】0004

【発明が解決しようとする課題】上述した従来のIC試
験装置またはIC実装試験装置においては、通常、試験
対象のICを、当該試験装置に対し自動供給・選別する
装置を用いて試験を行うために、装置自身のチェックの
ために良品または不良品サンプルにて試験を行う場合に
は、これらの装置を分離して、手作業による測定に対応
して部品を交換する必要がある。このために、試験の段
取りおよびにチェック後における装置の再接続等の作業
のために、余分の時間および作業工数を必要とするとい
う欠点がある。
[Problem to be Solved by the Invention] In the above-mentioned conventional IC testing equipment or IC mounting testing equipment, the test is usually performed using a device that automatically supplies and selects the IC to be tested to the testing equipment. Furthermore, when testing samples of good or defective products to check the devices themselves, it is necessary to separate these devices and replace parts in response to manual measurements. Therefore, there is a disadvantage that extra time and man-hours are required for the preparation of the test and the reconnection of the device after checking.

【0005】[0005]

【課題を解決するための手段】本発明のIC試験装置は
、ICの電気的特性を測定し、当該ICの良否を判定す
るIC試験装置において、前記IC試験装置自体の自己
診断用として、内部に良品または不良品を含むチェック
用サンプルを備えて構成される。
[Means for Solving the Problems] The IC testing device of the present invention measures the electrical characteristics of an IC and determines the quality of the IC. The system is equipped with samples for checking, including non-defective or defective products.

【0006】[0006]

【実施例】次に、本発明について図面を参照して説明す
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings.

【0007】図1は本発明の一実施例を示すブロック図
である。図1に示されるように、本実施例のIC試験装
置1は、測定部8に対応して、切替回路2と、アラーム
発生回路3と、判定出力回路4と、CPU5と、設定回
路6と、チェック用サンプル7とを備えて構成される。
FIG. 1 is a block diagram showing one embodiment of the present invention. As shown in FIG. 1, the IC testing apparatus 1 of this embodiment includes a switching circuit 2, an alarm generation circuit 3, a determination output circuit 4, a CPU 5, and a setting circuit 6, corresponding to the measurement section 8. , and a check sample 7.

【0008】図1において、通常の試験時においては、
試験用の入力信号は、CPU5から、ラインA→ライン
A1 を経由して測定部8に入力され、測定部8からの
出力信号は、ラインA1 →ラインAを経由してCPU
5に返される。これにより、CPU5においては、測定
部8による試験対象ICの良品/不良品が判別され、そ
の判定結果はラインB→ラインB1 の経路にて、外部
の自動選別装置等(図示されない)に出力される。
In FIG. 1, during normal testing,
The input signal for the test is inputted from the CPU 5 to the measuring unit 8 via line A → line A1, and the output signal from the measuring unit 8 is inputted to the CPU via line A1 → line A.
Returned to 5. As a result, in the CPU 5, the measurement unit 8 determines whether the IC to be tested is good or defective, and the determination result is output to an external automatic sorting device, etc. (not shown) along the route from line B to line B1. Ru.

【0009】一方において、設定回路6には、所定の時
間または試験回数を予め設定しておくことにより、それ
ぞれ時間の経過または試験の完了ごとに、設定回路6よ
り切替信号がラインCに出力される。この切替信号はマ
ルチプレクサ等を利用して構成される切替回路2に入力
されて、ラインAはラインA1 側からラインA2 の
側に切替えられ、同様に、判定出力回路4においても、
ラインCを介して入力される切替信号を受けて、ライン
Bは、ラインB1 側からラインB2 の側に切替えら
れる。 この状態において、CPU5により、チェック用サンプ
ル7に対する試験が行われる。これにより、チェック用
サンプル7に対する判定結果は、ラインB→ラインB2
 を経由してアラーム発生回路3に入力される。この場
合、この判定結果がチェック用サンプル7の良品/不良
品の良否と一致する場合には、試験装置の機能は正常で
あるものと判断され、通常の測定が再開される。また、
良品に対して不良品の判定が出る場合、または不良品に
対して良品の判定が為される場合には、アラーム発生回
路3よりアラームが発生され、試験装置が異常であるこ
とが判定される。
On the other hand, by setting a predetermined time or the number of tests in advance in the setting circuit 6, a switching signal is output from the setting circuit 6 to the line C each time the time elapses or each test is completed. Ru. This switching signal is input to a switching circuit 2 configured using a multiplexer or the like, and the line A is switched from the line A1 side to the line A2 side. Similarly, in the judgment output circuit 4,
In response to a switching signal input via line C, line B is switched from the line B1 side to the line B2 side. In this state, the CPU 5 performs a test on the check sample 7. As a result, the judgment result for check sample 7 is line B → line B2.
The signal is input to the alarm generation circuit 3 via. In this case, if this determination result matches the conformity/defectiveness of the check sample 7, it is determined that the function of the test device is normal, and normal measurement is resumed. Also,
When a non-defective product is determined to be defective, or when a defective product is determined to be non-defective, an alarm is generated from the alarm generation circuit 3, and it is determined that the test device is abnormal. .

【0010】0010

【発明の効果】以上説明したように、本発明は、、内部
に良品または不良品を含むチェック用サンプルを備え、
このチェック用サンプルを用いて良品/不良品の判定を
行うことにより、自動的に、効率良く試験装置の異常の
有無を診断することができるという効果がある。
[Effects of the Invention] As explained above, the present invention includes a check sample containing a non-defective product or a defective product,
By determining whether a product is good or defective using this check sample, it is possible to automatically and efficiently diagnose whether there is an abnormality in the test device.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1    IC試験装置 2    切替回路 3    アラーム発生回路 4    判定出力回路 5    CPU 6    設定回路 7    チェック用サンプル 8    測定部 1 IC test equipment 2 Switching circuit 3 Alarm generation circuit 4 Judgment output circuit 5 CPU 6 Setting circuit 7. Sample for checking 8 Measurement part

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  ICの電気的特性を測定し、当該IC
の良否を判定するIC試験装置において、前記IC試験
装置自体の自己診断用として、内部に良品または不良品
を含むチェック用サンプルを備えることを特徴とするI
C試験装置。
[Claim 1] Measuring the electrical characteristics of an IC,
An IC testing device for determining the quality of an IC, characterized in that the IC testing device is equipped with a check sample containing a non-defective product or a defective product for self-diagnosis of the IC testing device itself.
C test equipment.
JP3140527A 1991-06-13 1991-06-13 Ic testing device Pending JPH04366776A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3140527A JPH04366776A (en) 1991-06-13 1991-06-13 Ic testing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3140527A JPH04366776A (en) 1991-06-13 1991-06-13 Ic testing device

Publications (1)

Publication Number Publication Date
JPH04366776A true JPH04366776A (en) 1992-12-18

Family

ID=15270744

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3140527A Pending JPH04366776A (en) 1991-06-13 1991-06-13 Ic testing device

Country Status (1)

Country Link
JP (1) JPH04366776A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08129053A (en) * 1994-10-31 1996-05-21 Nec Corp Apparatus for testing integrated circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08129053A (en) * 1994-10-31 1996-05-21 Nec Corp Apparatus for testing integrated circuit

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