JPH04364783A - Manufacture of liquid crystal drive element - Google Patents

Abstract

PURPOSE:To realize a method in which surfaces in contact with a gate insulating film and an element forming layer are not exposed without using a film forming method to form the insulating film so as to prevent deterioration of boundary characteristics of the gate insulting film/element forming layer due to introduction of particles generated from a manufacturing apparatus in the method for manufacturing a TFT as a liquid crystal drive element. CONSTITUTION:Oxygen or nitrogen ions are implanted to an amorphous Si layer formed on a transparent insulting board 1 thereby to form an insulating film layer 3 so as to retain Si layers 4, 5 in the Si layer 2, and the layer 3 is used as a gate insulating film. And, the layer 4 or 5 is used as an element forming layer. After the layer 3 is formed, it is heat treated to improve boundary characteristics of the gate insulating film/element forming layer.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an active type liquid crystal driving element. The above ACTIVE type liquid crystal drive elements are mainly thin film transistors (TFTs), and are used in TFT matrix drive liquid crystal display devices and have been put to practical use in small televisions, etc., and demand is also expected for use in personal computer displays. .

[0002] In the production thereof, it is important to ensure yield and stability of properties.

0003

[Prior Art] In a TFT as a liquid crystal driving element, in the layer structure of gate/gate insulating film/semiconductor layer (element forming layer) formed on a transparent insulating substrate, the gate is located below the gate insulating film. There are two types: a bottom gate stagger type in which the gate is located on the transparent insulating substrate side, and a top gate stagger type in which the gate is located above the gate insulating film.

In conventional manufacturing of any structure, the gate insulating film is formed using the P-CVD method (plasma CVD method).
SiN, SiO2, SiON films by APCVD method (
SiO2 films are grown using the normal pressure CVD method (atmospheric pressure CVD method) or the LPCVD method (low pressure CVD method), and if the same film formation method is used for the element formation layer, a multi-chamber device is used to avoid breaking the vacuum. In the case of continuous formation and different types of film formation methods, a method is adopted in which the previous film is formed and then set in the next device.

However, in either method, as long as a film forming method is used, the problem of particles generated from the chamber and entering the interface between the films cannot be avoided. Therefore, in order to prevent the intervening particles from deteriorating the interface characteristics of the gate insulating film/element formation layer and resulting in a decline in TFT yield and characteristic stability, equipment maintenance such as equipment cleaning has become a major issue. It has become.

[0006]

SUMMARY OF THE INVENTION In order to solve the above problem, it is sufficient to prevent the mutually contacting surfaces of the gate insulating film and the element forming layer from being exposed during manufacturing.

Accordingly, the present invention relates to a method for manufacturing a TFT as a liquid crystal driving element, and in order to prevent deterioration of the interface characteristics of the gate insulating film/device forming layer due to the intervention of particles generated from the manufacturing equipment, It is an object of the present invention to provide a method that does not use a film formation method for formation and does not expose surfaces of a gate insulating film and an element formation layer that are in contact with each other.

[0008]

[Means for Solving the Problems] FIG. 1 is a diagram illustrating the principle of the present invention. Referring to the figure, in order to achieve the above object, in the manufacturing method of the present invention, oxygen is added to the amorphous Si layer 2 formed on the transparent insulating substrate 1 as shown in FIG. Or by ion-implanting nitrogen, as shown in Figure 1(b).
Or, as shown in (c), the insulating film layer 3 is formed so as to leave the Si layers 4 and 5 in the amorphous Si layer 2, and the insulating film layer 3 is used as a gate insulating film.

Furthermore, by performing heat treatment after forming the insulating film layer 3, the insulating film layer 3 and the remaining Si layers 4, 5
It is characterized by improving the interfacial properties between. In the case of FIG. 1(b), a metal gate (not shown) is provided between the transparent insulating substrate 1 and the amorphous Si layer 2, and the insulating film layer 3 is formed only on the upper side of the amorphous Si layer 2. Alternatively, in the case of FIG. It is characterized in that the Si layers 4 and 5 are left on the sides, and the upper Si layer 4 is used for gate formation, and the lower Si layer 5 is used as an element formation layer. , although not shown, the upper Si
It is desirable to form the gate and the source/drain simultaneously by patterning the layer 4 and the insulating film layer 3, and then ion-implanting conductive impurities.

0010

[Operation] According to this method, the gate insulating film is formed as the insulating film layer 3 in which part of the thickness of the amorphous Si layer 2 is changed to oxide or nitride without using a film forming method. There is. Therefore, if the Si layer 4 or 5 left in the amorphous Si layer 2 is used as an element formation layer, the surfaces of the gate insulating film and the element formation layer that are in contact with each other will not be exposed. As a result, deterioration of the interface characteristics of the gate insulating film/element forming layer due to the intervention of particles described above is prevented.

Further, the heat treatment after forming the insulating film layer 3 recrystallizes the Si layers 4 and 5 to improve the interface characteristics. In the case of FIG. 1(b) above, a bottom gate stagger type TFT can be manufactured, and in the case of FIG.
In case c), a top gate stagger type TFT can be manufactured.

The amorphous nature of the amorphous Si layer 2 is important in preventing channeling of ion implantation for forming the insulating film layer 3. As a result, if this method is adopted for manufacturing the above-mentioned TFT, maintenance of the manufacturing equipment does not have to be as strict as in the past, and yield can be ensured and stability of characteristics can be obtained.

[0013]

Embodiments Examples of the present invention will be described below with reference to FIGS. 2 to 4. 2 to 4 are process-order sectional views for explaining the first to third embodiments, respectively, and the same reference numerals indicate the same objects throughout the figures.

In FIG. 2, the first embodiment is an application of the present invention to the manufacture of a bottom gate stagger type TFT. First, referring to FIG. 2(a), the transparent insulating substrate 1
A metal gate 6 of Ti and Mo is formed in a predetermined pattern thereon, and an amorphous Si layer 2 having a thickness of about 3000 Å is formed thereon as the amorphous Si layer mentioned above. The amorphous Si layer 2 is made of Si2H6 by LPCVD method.
It was formed using gas at 450°C.

Next, referring to FIG. 2(b), oxygen ion implantation (100KeV, 1×1018cm-2
), O+ is implanted into the lower side of the amorphous Si layer 2 to form an insulating film layer 3 with a thickness of about 1000 Å. On the upper side of the insulating film layer 3, a Si layer 4 with a thickness of about 2000 Å remains as amorphous Si, and the amorphous Si layer 2 remains.
changes to a two-layer structure of both.

This corresponds to the case of FIG. 1B described above, and in the TFT to be manufactured, the insulating film layer 3 is used as a gate insulating film, and the Si layer 4 is used as an element forming layer. Next, referring to FIG. 2(c), heat treatment is performed at 630° C. for 2 hours. As a result, the Si layer 4 recrystallizes to become poly-Si, and at the same time, the recrystallization causes the insulating layer 3 (
The interface characteristics of gate insulating film)/Si layer 4 (element forming layer) are improved.

Next, referring to FIG. 2(d), the Si layer 4
Source/drain electrodes 7 made of n+ poly-Si 7a and metal 7b are formed thereon in a predetermined pattern to complete the TFT. According to the inventor's confirmation, the TFT manufactured in this manner has a gate breakdown voltage of 30 V or more, although no film formation method is used to form the insulating film layer 3, which becomes the gate insulating film. The defect rate was reduced to about 1/2 compared to the case where the gate insulating film was formed using the film forming method.

Next, referring to FIG. 3, in this second embodiment, the present invention is applied to the manufacture of a top gate stagger type TFT. First, referring to FIG. 3(a), an amorphous S layer is formed as the amorphous Si layer mentioned above on a transparent insulating substrate 1.
The i-layer 2 is formed to a thickness of about 6000 Å. This amorphous Si layer 2 is formed by the same method as in the first embodiment, with the only difference being the thickness.

Next, referring to FIG. 3(b), oxygen ion implantation (100KeV, 1×1018cm-2
) by implanting O+ into the lower side of the amorphous Si layer 2 to a thickness of about 200 mm inside the amorphous Si layer 2.
An insulating film layer 3 having a thickness of 0 Å is formed. Si layers 4 and 5 with a thickness of about 2000 Å remain on the upper and lower sides of the insulating film layer 3, respectively, and remain amorphous Si.
Layer 2 changes to a three-layer structure.

This corresponds to the case of FIG. 1(c) described above, and in the manufactured TFT, the insulating film layer 3 is used as a gate insulating film, the upper Si layer 4 is used for gate formation, and the lower Si layer 4 is used as a gate insulating film. The Si layer 5 on the side is used as an element forming layer.

Next, referring to FIG. 3(c), the Si layer 4
Then, the insulating film layer 3 is patterned into a gate pattern. Next, referring to FIG. 3(d), phosphorus was ion-implanted (30 KeV, 1
x 1016 cm-2), then heat treatment is performed at 630°C for 2 hours. As a result, the Si layer 4 becomes a gate 8, and the Si layer 5 serving as an element formation layer has a source/drain 9.
is formed. At that time, the Si layers 4 and 5 are recrystallized to poly-Si due to the above heat treatment, and at the same time, the interfacial characteristics of the insulating layer 3 (gate insulating film)/Si layer 5 (device forming layer) are changed due to the recrystallization. Improved.

Next, referring to FIG. 3(e), after forming an interlayer insulating film 10, a metal gate electrode 11 and source/drain electrodes 12 are formed to complete the TFT. The TFT of the second example manufactured in this manner also produced similar results to those of the first example.

Next, in FIG. 4, this third embodiment
The doped Si gate 8 of the embodiment is replaced with a metal gate 13. First, referring to FIG. 4(a), the above-mentioned Si layer 5, insulating film layer 3, Si
A three-layer structure including the layer 4 is formed in the same manner as in the second embodiment, and then the Si layer 4 is etched away to form a two-layer structure.

Next, referring to FIG. 4(b), the above-mentioned heat treatment is performed to convert Si layer 5 into polysilicon and to form insulating layer 3.
After improving the interface characteristics of the (gate insulating film)/Si layer 5 (element formation layer), a metal gate 13 is formed in a predetermined pattern on the insulating film layer 3, and the insulating film layer 3 is patterned into the gate pattern.

Next, referring to FIG. 4(c), phosphorus ions are implanted to form source/drain 9 in Si layer 5. Next, referring to FIG. 4(d), FIG. 3(e) of the second embodiment is shown.
) Similarly, the interlayer insulating film 10, the metal gate electrode 1
1. Form the source/drain electrodes 12 to complete the TFT. This TFT also obtained similar results to those of the first embodiment.

In the above embodiment, oxygen ion implantation was used to form the insulating film layer 3, but nitrogen ion implantation may be used instead.

[0027]

As explained above, according to the present invention, regarding the method of manufacturing a TFT as a liquid crystal driving element, it is possible to form a gate insulating film and an element forming layer without using a film forming method for forming a gate insulating film. A method is provided that does not expose surfaces in contact with each other, preventing deterioration of the interface characteristics of the gate insulating film/device forming layer due to the intervention of particles generated from the manufacturing equipment, and making maintenance of the manufacturing equipment less demanding than before. This eliminates the need to do so, and has the effect of ensuring yield and ensuring stability of characteristics.

[Brief explanation of drawings]

[Figure 1] Diagram explaining the principle of the present invention

[Fig. 2] Process-order cross-sectional diagram for explaining the first embodiment

[Fig. 3] Cross-sectional views in order of steps for explaining the second embodiment

[Fig. 4] Process order cross-sectional diagram for explaining the third embodiment

[Explanation of symbols]

1 Transparent insulating substrate 2 Amorphous Si layer (amorphous Si layer) 3 Insulating film layers 4, 5 Si layer 6 Metal gate 7 Source/drain electrode 7a n+ PolySi 7b Metal 8 Gate 9 Source/drain 10 Interlayer insulating film 11 Gate electrode 12 Source/drain electrode 13 Metal gate

Claims (5)

[Claims] 1. A silicon layer (4) is formed in the amorphous silicon layer (2) by ion-implanting oxygen or nitrogen into the amorphous silicon layer (2) formed on the transparent insulating substrate (1). , 5) Insulating film layer (3) so as to leave
A method for manufacturing a liquid crystal driving element, characterized in that the insulating film layer (3) is used as a gate insulating film. 2. By performing heat treatment after forming the insulating film layer (3), the interface characteristics between the insulating film layer (3) and the remaining silicon layers (4, 5) are improved. 2. The method of manufacturing a liquid crystal driving element according to claim 1. 3. A metal gate (6) is provided between the transparent insulating substrate (1) and the amorphous silicon layer (2).
The insulating film layer (3) is formed so that the silicon layer (4) remains only on the upper side of the amorphous silicon layer (2), and the upper silicon layer (4) is formed as an element forming layer. 3. The method of manufacturing a liquid crystal driving element according to claim 1, wherein the method is used as a liquid crystal driving element. 4. The insulating film layer (3) includes silicon layers (4, 5) above and below the amorphous silicon layer (2).
) to leave the upper silicon layer (4)
for gate formation, and the lower silicon layer (
5) The method for manufacturing a liquid crystal driving element according to claim 1 or 2, wherein: is used as an element forming layer. 5. A gate (8) comprising a step of patterning the upper silicon layer (4) and the insulating film layer (3) and a step of ion-implanting conductive impurities.
5. The method of manufacturing a liquid crystal driving element according to claim 4, wherein the source/drain (9) and the source/drain (9) are formed at the same time.