JPH0436427B2 - - Google Patents

Info

Publication number
JPH0436427B2
JPH0436427B2 JP59096656A JP9665684A JPH0436427B2 JP H0436427 B2 JPH0436427 B2 JP H0436427B2 JP 59096656 A JP59096656 A JP 59096656A JP 9665684 A JP9665684 A JP 9665684A JP H0436427 B2 JPH0436427 B2 JP H0436427B2
Authority
JP
Japan
Prior art keywords
processing
flag
input
data
input data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59096656A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60241155A (ja
Inventor
Junichi Takahashi
Sanshiro Hatsutori
Takashi Kimura
Atsushi Iwata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP59096656A priority Critical patent/JPS60241155A/ja
Priority to NL8500537A priority patent/NL192637C/nl
Priority to DE19853506749 priority patent/DE3506749A1/de
Publication of JPS60241155A publication Critical patent/JPS60241155A/ja
Priority to US07/220,970 priority patent/US4905143A/en
Publication of JPH0436427B2 publication Critical patent/JPH0436427B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
JP59096656A 1984-02-27 1984-05-16 アレイプロセツサの制御方法 Granted JPS60241155A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP59096656A JPS60241155A (ja) 1984-05-16 1984-05-16 アレイプロセツサの制御方法
NL8500537A NL192637C (nl) 1984-02-27 1985-02-26 Stelselprocessor.
DE19853506749 DE3506749A1 (de) 1984-02-27 1985-02-26 Matrixprozessor und steuerverfahren hierfuer
US07/220,970 US4905143A (en) 1984-02-27 1988-06-14 Array processor and control method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59096656A JPS60241155A (ja) 1984-05-16 1984-05-16 アレイプロセツサの制御方法

Publications (2)

Publication Number Publication Date
JPS60241155A JPS60241155A (ja) 1985-11-30
JPH0436427B2 true JPH0436427B2 (enExample) 1992-06-16

Family

ID=14170874

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59096656A Granted JPS60241155A (ja) 1984-02-27 1984-05-16 アレイプロセツサの制御方法

Country Status (1)

Country Link
JP (1) JPS60241155A (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2828972B2 (ja) * 1986-10-17 1998-11-25 株式会社日立製作所 並列プロセツサ

Also Published As

Publication number Publication date
JPS60241155A (ja) 1985-11-30

Similar Documents

Publication Publication Date Title
US10768894B2 (en) Processor, information processing apparatus and operation method for processor
WO2017161275A1 (en) Tuple encoding aware direct memory access engine for scratchpad enabled multicore processors
JPS6131502B2 (enExample)
JP2015529363A5 (enExample)
JPS59128670A (ja) ベクトル処理装置
JP3971535B2 (ja) Ｓｉｍｄ型プロセッサ
EP0295646A2 (en) Arithmetic operation processing apparatus of the parallel processing type and compiler which is used in this apparatus
WO2019077933A1 (ja) 演算回路および演算方法
US20050160253A1 (en) Method for managing data in an array processor and array processor carrying out this method
JPH06131181A (ja) 階層並列処理型中央処理装置
JPH09106389A (ja) 信号処理装置
US11853235B2 (en) Communicating between data processing engines using shared memory
JPH0436427B2 (enExample)
US7124280B2 (en) Execution control apparatus of data driven information processor for instruction inputs
JP3821198B2 (ja) 信号処理装置
JP7136343B2 (ja) データ処理システム、方法、およびプログラム
JP2001202351A (ja) Ｓｉｍｄ型プロセッサ
KR20010072505A (ko) 다수의 처리 및 메모리 회로를 포함하는 데이터 처리장치, 그 구성 방법 및 컴퓨터 프로그램 제품
JP4413905B2 (ja) Ｓｉｍｄ型プロセッサ
JP2003115048A (ja) 信号処理用並列処理論理回路
JPH01177672A (ja) ディジタル信号処理装置
JPH0421900B2 (enExample)
JP3694946B2 (ja) 並列処理システム
JP2002108833A (ja) 並列プロセッサ及びそれを用いた画像処理装置
JPH0443298B2 (enExample)