JPH04356941A - Semiconductor integrated device - Google Patents

Abstract

PURPOSE:To enhance the integration density of a semiconductor integrated circuit using a high breakdown-strength transistor by a method wherein the high breakdown-strength transistor and a transistor formed near it are element- isolated by using a transistor which is always set to an OFF state. CONSTITUTION:A gate electrode 6 whose potential is set to the same as the substrate potential of a first high breakdown-strength transistor and a second high breakdown-strength transistor is formed between the first high breakdown- strength transistor which is composed of a gate 5, a source 1 and a drain 2 and the second high breakdown-strength transistor which is formed near it and which is composed of a gate 7, a drain 3 and a source 4. When the transistor are element-isolated, a transistor always in an OFF state is used.

Description

[Detailed description of the invention]

0001

[Field of Industrial Application] The present invention relates to a semiconductor integrated device,
In particular, it relates to element isolation of semiconductor integrated devices using high voltage transistors.

0002

2. Description of the Related Art FIGS. 3 and 4 show a plan view and a sectional view of a semiconductor integrated device using a conventional N-channel high voltage transistor. 14 and 15 are the sources and drains of the first high voltage transistors, 16 and 17 are the drains and sources of the second high voltage transistors, 18 is the gate electrode of the first high voltage transistors, and 19 is the second high voltage transistor. The gate electrode 26 is a gate oxide film. Furthermore, P-type regions 20, 21, and 22 with higher impurity concentration than the P-type substrate 27 are provided under the field oxide films 23, 24, and 25 as element isolation to prevent the formation of parasitic transistors between the drains 16 and 17. It has a structure with

0003

However, in the prior art described above, the P-type regions 20, 21, and 22 are separated from the sources 14 and 22.
17 and the drains 15 and 16, the breakdown voltage of the transistor would drop, so they are formed apart by a predetermined dimension L1. Also, P-type regions 20 and 21
- 22 requires only the minimum dimension L2 determined by manufacturing technology. That is, since the drain 15 of the first high voltage transistor and the drain 16 of the second high voltage transistor must be spaced apart by 2L1+L2, it is necessary to form a semiconductor integrated device using high voltage transistors with a high degree of integration. The problem is that it is difficult to

SUMMARY OF THE INVENTION The present invention is intended to solve these problems, and its purpose is to enable higher integration of semiconductor integrated devices using high voltage transistors.

[0005]

[Means for Solving the Problems] A semiconductor integrated device of the present invention is a semiconductor integrated device using at least one high voltage transistor. between the first high voltage transistor and a second region that is a source or drain of a second transistor other than the first high voltage transistor formed near the first region; A feature of the device is that a gate electrode is provided at the same potential as the substrate potential of the transistor.

[0006]

[Operation] According to the above structure of the present invention, a semiconductor integrated circuit using a high voltage transistor can be realized by using a transistor that is always in an OFF state for element isolation between a high voltage transistor and a transistor formed in the vicinity thereof. High integration becomes possible.

[0007]

Embodiment An embodiment of the present invention is shown in FIGS. 1 and 2. FIG. 1 is a plan view of a semiconductor integrated device using an N-channel high voltage transistor according to the present invention, and FIG. 2 is a cross-sectional view of FIG. 1 is the source of the first high voltage transistor, 2
are the drain of the first high voltage transistor and the source of the third transistor, 3 is the drain of the second high voltage transistor and the drain of the third transistor, 4 is the source of the third transistor, and 5 is the first high voltage transistor. The gate electrode 6 of the voltage-resistant transistor is a third electrode made at the same potential as the P-type substrate 13.
7 is a gate electrode of a second high-voltage transistor, 8 and 9 are P-type regions having a higher impurity concentration than the substrate 13, 10 and 11 are field oxide films, and 12 is a gate oxide film.

The first high-voltage transistor and the second high-voltage transistor are electrically isolated by the third transistor, which is always in an off state and has its gate electrode 6 at the same potential as the substrate 13. Therefore, by using transistors that are always in an off state for element isolation, there is no need to form a field oxide film as in the conventional case, and the only dimension required for element isolation is the width L3 of the gate electrode 6. Normally, the gate electrode width L3 can be formed smaller than L1 and L2, so
The size required for element isolation is 2L1+ compared to conventional technology.
It is reduced by L2-L3.

Furthermore, what has been described here is only an example of element isolation between high voltage transistors, and the same effect can also be obtained with element isolation between high voltage transistors and other diffusion regions.

0010

[Effects of the Invention] As described above, according to the present invention, a transistor that is always turned off is used to separate a high voltage transistor from a transistor formed in its vicinity, thereby making it possible to use a high voltage transistor. High integration of semiconductor integrated circuits has become possible.

[Brief explanation of the drawing]

FIG. 1 A plan view showing an embodiment of a semiconductor device of the present invention.

[Figure 2] Cross-sectional view of Figure 1

[Figure 3] Plan view showing a conventional semiconductor device

[Figure 4]
Plan view of Figure 3

[Explanation of symbols]

1, 14 Source of first high voltage transistor 2, 1
5 Drain of the first high voltage transistor and source 3, 16 of the third transistor Drain of the second high voltage transistor and drain 4, 17 of the third transistor 5, 17 Source of the second high voltage transistor 5, 1
8 Gate electrode 6 of first high voltage transistor
Gate electrode 7 of the third high voltage transistor,
19 Gate electrodes 8, 9 of second high voltage transistor
, 20, 21, 22 P with higher impurity concentration than the substrate
Mold regions 10, 11, 23, 24, 25 Field oxide film 1
2, 26 Gate oxide film 13, 27 P type substrate

Claims (2)

[Claims] 1. A semiconductor integrated device using at least one high-voltage transistor, comprising: a first region that is a source or drain of a first high-voltage transistor;
between the first high voltage transistor and a second region that is a source or drain of a second transistor other than the first high voltage transistor formed near the region; 1. A semiconductor integrated device characterized in that a gate electrode is provided at the same potential as a substrate potential. 2. The semiconductor integrated device according to claim 1, wherein the second transistor is a high voltage transistor.