JPH0435518A - Filter circuit - Google Patents
Filter circuitInfo
- Publication number
- JPH0435518A JPH0435518A JP14231190A JP14231190A JPH0435518A JP H0435518 A JPH0435518 A JP H0435518A JP 14231190 A JP14231190 A JP 14231190A JP 14231190 A JP14231190 A JP 14231190A JP H0435518 A JPH0435518 A JP H0435518A
- Authority
- JP
- Japan
- Prior art keywords
- low
- pass filter
- filter
- circuit
- output signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 1
Landscapes
- Networks Using Active Elements (AREA)
Abstract
Description
【発明の詳細な説明】
（イ）産業上の利用分野
本発明は、ＩＣ化に好適なフィルタ回路に関するもので
、特にフィルタ通過後の信号の位相変動が少ないローパ
ス特性のフィルタ回路に関する。DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to a filter circuit suitable for IC implementation, and particularly to a filter circuit with low-pass characteristics in which the phase fluctuation of a signal after passing through a filter is small.
（ロ）従来の技術
カットオフ周波数の異なる２つのローパスフィルタを組
み合わせて、位相変動の少ないラグリードフィルタを構
成することが出来る。第２図の実線の如きフィルタ特性
が得られるならば、その位相特性は、第２図の点線の如
くなり、位相変動を比較的抑えることが出来る。第２図
の如きフィルタ特性を得るには、第３図の如き構成のフ
ィルタ回路が考えられる。第３図において、第１のロー
パスフィルタ（１）は第４図（イ）の如きフィルタ特性
ヲ有し、第２のローパスフィルタ（２）は第４図（ロ）
の如きフィルタ特性を有する。第ルベル調整回路（３）
は第１のローパスフィルタ（１）の出力信号レベルを低
下させるもので、第ルベル調整回路（３）通過後のフィ
ルタ特性は第４図（ハ）となる、第２レベル調整回路（
４）はレベル調整量が１となっており、出力フィルタ特
性は第４図（ニ）となる。(b) Conventional technology A lag lead filter with little phase fluctuation can be constructed by combining two low-pass filters with different cutoff frequencies. If filter characteristics as shown by the solid line in FIG. 2 can be obtained, the phase characteristics will become as shown by the dotted line in FIG. 2, and phase fluctuations can be relatively suppressed. In order to obtain the filter characteristics as shown in FIG. 2, a filter circuit having a configuration as shown in FIG. 3 can be considered. In Fig. 3, the first low-pass filter (1) has filter characteristics as shown in Fig. 4 (a), and the second low-pass filter (2) has the filter characteristics as shown in Fig. 4 (b).
It has the following filter characteristics. 1st level adjustment circuit (3)
is for reducing the output signal level of the first low-pass filter (1), and the filter characteristics after passing through the second level adjustment circuit (3) are as shown in FIG. 4 (c).
In case 4), the level adjustment amount is 1, and the output filter characteristic is as shown in FIG. 4(d).
その結果、加算回路（５）の出力端には第４図（本）の
如き総合フィルタ特性が得られる。As a result, the overall filter characteristic as shown in FIG. 4 (main) is obtained at the output end of the adder circuit (5).
従って、第２図の回路に依れば通過後の信号の位相変動
が少ないフィルタ特性を得ることが出来る。Therefore, according to the circuit shown in FIG. 2, it is possible to obtain filter characteristics in which the phase fluctuation of the signal after passing through is small.
（八）発明が解決しようとする課題
しかしながら、第２図の回路においてはレベル調整回路
が２個と加算回路が１個必要となり素子数が多いという
問題があった。(8) Problems to be Solved by the Invention However, the circuit shown in FIG. 2 requires two level adjustment circuits and one adder circuit, resulting in a large number of elements.
又、第１及び第２のローパスフィルタ（１）及び（２）
は、ＩＣ化に適したフィルタで構成きれるが、一般にＩ
Ｃ化フィルタは存置及び抵抗の値を大きくすることが困
難であり、カットオフ周波数の低いフィルタ特性が得ら
れないという問題があった。Also, first and second low-pass filters (1) and (2)
can be configured with filters suitable for IC implementation, but generally I
It is difficult to install C filters and to increase the resistance value, and there is a problem that filter characteristics with a low cutoff frequency cannot be obtained.
（ニ）課題を解決するための手段
本発明は、上述の点に鑑み成されたもので、第１のカッ
トオフ周波数を有する第１ローパスフィルタと、エミッ
タが共通接続きれた第１及び第２トランジスタよりなる
差動増幅器と該差動増幅器の出力端に接続されたコンデ
ンサとから成り、前記第１のカットオフ周波数より低い
第２のカットオフ周波数を有する第２ローパスフィルタ
と、前記第１及び第２トランジスタのベース間を介して
設けられ、一端に前記第１ローパスフィルタの出力信号
が、他端に前記第２ローパスフィルタの出力信号が印加
される分圧回路とを設け、前記分圧回路よりフィルタ出
力を得るようにしたことを特徴とする。(d) Means for Solving the Problems The present invention has been made in view of the above points, and includes a first low-pass filter having a first cutoff frequency, and first and second filters whose emitters are commonly connected. a second low-pass filter comprising a differential amplifier made of a transistor and a capacitor connected to the output terminal of the differential amplifier, and having a second cutoff frequency lower than the first cutoff frequency; a voltage dividing circuit provided between the bases of the second transistor, to which the output signal of the first low-pass filter is applied to one end and the output signal of the second low-pass filter being applied to the other end, the voltage dividing circuit The feature is that the filter output can be obtained more easily.
（＊）作用
本発明に依れば、第２ローパスフィルタを構成する差動
増幅器の第１及び第２トランジスタのベース間を介して
分圧回路を配置し、該分圧回路ノ一端に第１ローパスフ
ィルタの出力信号を印加し、他端に第２ローパスフィル
タの出力信号を印加している。そして、前記分圧回路よ
りフィルタ出力を得ている。(*) Effect According to the present invention, a voltage dividing circuit is disposed between the bases of the first and second transistors of the differential amplifier constituting the second low-pass filter, and the first voltage dividing circuit is connected to one end of the voltage dividing circuit. The output signal of the low-pass filter is applied to the other end, and the output signal of the second low-pass filter is applied to the other end. A filter output is obtained from the voltage dividing circuit.
（へ）実施例
第１図は、本発明の一実施例を示す回路図で、（６）は
第１のカットオフ周波数を有する第１ローパスフィルタ
、（７）はエミッタが共通接続された第１及び第２トラ
ンジスタ（８）及び（９）よりなる第１差動増幅器（１
０）、第２差動増幅器（１１）、及び該第２差動増幅器
（１１）の出力信号に応じて充電されるコンデンサ（１
２）からなり、第２のカットオフ周波数を有する第２ロ
ーパスフィルタ、（１３）は前記第１及び第２トランジ
スタ（８）及び（９〉のベース間を介して設けられ、一
端Ａに前記第１ローパスフィルタ（６）の出力信号が、
他端Ｂに前記第２ローパスフィルタ（７）の出力信号が
印加される分圧回路である。(F) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention, in which (6) is a first low-pass filter having a first cutoff frequency, and (7) is a first low-pass filter whose emitters are commonly connected. A first differential amplifier (1
0), a second differential amplifier (11), and a capacitor (1) that is charged according to the output signal of the second differential amplifier (11).
2), a second low-pass filter (13) having a second cutoff frequency is provided between the bases of the first and second transistors (8) and (9), and has one end A connected to the second low-pass filter. The output signal of the 1 low-pass filter (6) is
This is a voltage dividing circuit to which the output signal of the second low-pass filter (7) is applied to the other end B.
第１図において、第１ローパスフィルタ（６）の第１の
カットオフ周波数は、前記第２のカットオフ周波数に比
べ高い値に設定されている。そこで、入力端子（１４）
からの入力信号は、第１０−パスフイル９（６）ｌｉ通
過後第２ローパスフィルタ（７）に印加きれる。第２ロ
ーパスフィルタ（７）（７）ｍく２段の差動増幅器を利
用したフィルタのカットオフ周波数ｆＣ゛は、分圧回路
（１３）が存在しないと仮定すると、
となる、これについては例えば特公平１−５４８８４号
公報に記載されている。第（１）式から明らかな様にカ
ットオフ周波数を低下させるには前記Ｃ，Ｒ，Ｉの値を
出来るだけ大きく設定し、■。In FIG. 1, the first cutoff frequency of the first low-pass filter (6) is set to a higher value than the second cutoff frequency. Therefore, the input terminal (14)
The input signal is applied to the second low-pass filter (7) after passing through the tenth-pass filter 9 (6) li. Assuming that the voltage dividing circuit (13) does not exist, the cutoff frequency fC of the second low-pass filter (7) (7) and the filter using two stages of differential amplifiers is as follows. It is described in Japanese Patent Publication No. 1-54884. As is clear from equation (1), in order to lower the cutoff frequency, set the values of C, R, and I as large as possible.
の値を小さくする。ところが、前記Ｒの値を大きくしす
ぎると、第２０〜バスフイルタ（７）の入出力間のＤＣ
オフセットが大きくなってしまうという欠点がある。第
（１）式の電流■の変化分Δ■はとなる。第（２）式か
ら電圧ΔＶを低下きせれば、前記変化分Δ■が低下し、
カットオフ周波数ｔｃの低下が計れることが明らかであ
る。そこで、本発明においては、前記Ｒの値をあまり大
きくするのをやめて、その分、前記電圧ΔＶを低下きせ
た。具体的には、第１図の分圧回路（１３）で行なわれ
る。前記分圧回路（１３）で入力信号は、だけ分圧され
る。その為、第２ローパスフィルタ（７）の実際のカッ
トオフ周波数ｆｃはとなる。又、抵抗（１５）の抵抗値
ＲはＲｂ／ （２Ｒａ＋Ｒｂ）倍に小きくすることが出
来る。Decrease the value of However, if the value of R is made too large, the DC between the input and output of the 20th bus filter (7)
The disadvantage is that the offset becomes large. The amount of change Δ■ in the current ■ in equation (1) is as follows. From equation (2), if the voltage ΔV is decreased, the change Δ■ decreases,
It is clear that a decrease in the cutoff frequency tc can be measured. Therefore, in the present invention, the value of R is not increased too much, and the voltage ΔV is reduced accordingly. Specifically, this is performed by the voltage dividing circuit (13) shown in FIG. The input signal is voltage-divided by the voltage dividing circuit (13). Therefore, the actual cutoff frequency fc of the second low-pass filter (7) is as follows. Further, the resistance value R of the resistor (15) can be made smaller by a factor of Rb/(2Ra+Rb).
さて、第２ローパスフィルタ（７）の出力端、即ち、他
端Ｂには前述の如く低いカットオフ周波数ｆ’ｃのフィ
ルタ出力が得られるが、この信号は分ＥＥ回路（１３）
で第１ローパスフィルタ（６）のフィルタ出力と所定の
混合比で混合されて出力端子（２２）に得られる。Now, at the output end of the second low-pass filter (7), that is, at the other end B, a filter output with a low cutoff frequency f'c is obtained as described above, but this signal is transmitted to the EE circuit (13).
It is mixed with the filter output of the first low-pass filter (6) at a predetermined mixing ratio and obtained at the output terminal (22).
即ち、分圧回路（１３）は、第２ローパスフィルタ（７
）のカットオフ周波数の低下、オフセットの藺止及び加
算器としての働きを同時に行なっている。That is, the voltage dividing circuit (13) includes a second low-pass filter (7).
), it simultaneously lowers the cutoff frequency, prevents offset, and functions as an adder.
従って、第１図の回路に依れば、分圧回路（１３）の分
圧比（混合比）を調整することで、所望のフィルタ特性
（ラグリード特性）を得ることが出来る。Therefore, according to the circuit shown in FIG. 1, desired filter characteristics (lag lead characteristics) can be obtained by adjusting the voltage division ratio (mixing ratio) of the voltage division circuit (13).
（ト）発明の効果
以上述べた如く、本発明に依れば位相変動が少ないとと
もに低いカットオフ周波数特性のフィルタ回路を提供す
ることが出来る。又、本発明に依れば分圧回路を加算用
及び混合用として兼用することが出来、素子数の削減を
計ることが出来る。(g) Effects of the Invention As described above, according to the present invention, it is possible to provide a filter circuit with little phase fluctuation and low cutoff frequency characteristics. Further, according to the present invention, the voltage dividing circuit can be used for both addition and mixing, and the number of elements can be reduced.
第１図は、本発明の一実施例を示す回路図、第２図の所
望のフィルタ特性図、第３図は従来のフィルタ回路及び
第４図（イ）乃至（＊）は第３図の説明に供する為の特
性図である。
（６）・・・第１ローパスフィルタ、（７）・・・第２
ローパスフィルタ、 （１０）・・・第１差動増幅器、
（１３＞・・・分圧回路。FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a desired filter characteristic diagram, FIG. 3 is a conventional filter circuit, and FIGS. It is a characteristic diagram for providing explanation. (6)...first low-pass filter, (7)...second
Low-pass filter, (10)...first differential amplifier,
(13>...Voltage dividing circuit.
Claims (1)
ィルタと、 エミッタが共通接続された第１及び第２トランジスタよ
りなる差動増幅器と該差動増幅器の出力端に接続された
コンデンサとから成り、前記第１のカットオフ周波数よ
り低い第２のカットオフ周波数を有する第２ローパスフ
ィルタと、 前記第１及び第２トランジスタのベース間を介して設け
られ、一端に前記第１ローパスフィルタの出力信号が、
他端に前記第２ローパスフィルタの出力信号が印加され
る分圧回路と、 を設け、前記分圧回路よりフィルタ出力を得るようにし
たことを特徴とするフィルタ回路。(1) Consists of a first low-pass filter having a first cutoff frequency, a differential amplifier consisting of first and second transistors whose emitters are commonly connected, and a capacitor connected to the output terminal of the differential amplifier. , a second low-pass filter having a second cutoff frequency lower than the first cutoff frequency; and an output signal of the first low-pass filter provided at one end between the bases of the first and second transistors. but,
A voltage dividing circuit to which an output signal of the second low-pass filter is applied to the other end thereof, and a filter output is obtained from the voltage dividing circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14231190A JPH0435518A (en) | 1990-05-31 | 1990-05-31 | Filter circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14231190A JPH0435518A (en) | 1990-05-31 | 1990-05-31 | Filter circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0435518A true JPH0435518A (en) | 1992-02-06 |
Family
ID=15312409
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14231190A Pending JPH0435518A (en) | 1990-05-31 | 1990-05-31 | Filter circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0435518A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63193710A (en) * | 1987-02-06 | 1988-08-11 | Hitachi Ltd | Integration circuit |
| JPS6467015A (en) * | 1987-09-07 | 1989-03-13 | Toshiba Corp | Filter circuit |
| JPH02124620A (en) * | 1988-07-28 | 1990-05-11 | Toshiba Corp | Active filter |
-
1990
- 1990-05-31 JP JP14231190A patent/JPH0435518A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63193710A (en) * | 1987-02-06 | 1988-08-11 | Hitachi Ltd | Integration circuit |
| JPS6467015A (en) * | 1987-09-07 | 1989-03-13 | Toshiba Corp | Filter circuit |
| JPH02124620A (en) * | 1988-07-28 | 1990-05-11 | Toshiba Corp | Active filter |
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