JPH07183746A - Emphasis/deemphasis circuit - Google Patents

Abstract

PURPOSE:To constitute an emphasis/deemphasis circuit without a coupling capacitor. CONSTITUTION:The switch of a switch circuit 2 is operated to feed back the output of an operational amplifier 1 to the inverted input terminal through an emphasis circuit 3. A signal to be deemphasized is inputted to the non- inverted input terminal of the operational amplifier 1 in this mode to obtain the deemphasized signal in the output of the operational amplifier 1. A signal to be emphasized is inputted to the emphasis circuit 3 by the switch circuit 2 to obtain the emphasized signal in the output of the emphasis circuit 3. Since the switch circuit 2 whose input and output have the same potential is used, any coupling capacitors are unnecessary.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an emphasis / de-emphasis circuit for performing emphasis or de-emphasis by switching a switch.

[0002]

2. Description of the Related Art Conventionally, an emphasis / de-emphasis circuit for enhancing or weakening a signal in a predetermined frequency band has been known. For example, in the color signal processing of a video of the SECAM system (one of the currently adopted television systems), emphasis processing of a signal is performed at the time of recording and de-emphasis processing is performed at the time of reproduction.

A circuit shown in FIG. 6 is known as a circuit for performing such emphasis and de-emphasis. In this circuit, one end of a capacitor 110 is connected to a signal input terminal, and the other end of the capacitor 110 is connected to an intermediate point between voltage dividing resistors 112 and 113 for determining a bias voltage. The other end of the capacitor 110 is connected to the base of the transistor 114,
The emitter of 4 is a capacitor 115 and a coil 116.
Is connected to the ground through the resistor 118, and is also connected to the ground through the resistor 118. Since the capacitor 115, the coil 116, and the resistor 118 resonate at a predetermined frequency, they operate as an emphasis characteristic circuit. The collector of the transistor 114 is connected to the de-emphasis output terminal via the coupling capacitor 120, and the emitter of the transistor 114 is connected to the emphasis output terminal via the coupling capacitor 122.

Therefore, the AC component (signal component) of the input signal
Is applied to the base of the transistor 114, and a current corresponding to the signal flows there. On the other hand, the emphasis characteristic circuit including the capacitor 115, the coil 116, and the resistor 118 causes the circuit to resonate in a predetermined frequency band.
The change in the emitter current of 14 becomes large, and the voltage fluctuation on the collector side becomes large. Therefore, a predetermined de-emphasis signal is obtained at the de-emphasis output terminal, and an emphasis signal is obtained at the emphasis output terminal.

Then, either the emphasis signal or the de-emphasis signal obtained at the two output terminals is selected. Here, the coupling capacitors 120 and 122 are for cutting the DC component. That is, the two output terminals are connected to the collector side and the emitter side of the transistor 114, the DC voltages are different, and cannot be directly connected to the circuit in the subsequent stage. The DC potentials at the input end and the two output ends are also different. Therefore, a coupling capacitor is needed.

[0006]

Here, there is always a demand for the circuit to be composed of a semiconductor integrated circuit, and an emphasis / de-emphasis circuit is also to be built in the semiconductor integrated circuit. In this case, the circuit should not include capacitors. Therefore, the above circuit including the coupling capacitor is not suitable for the internal block of the semiconductor integrated circuit. Furthermore, depending on the frequency band used, the capacitance of the coupling capacitor becomes large, and it may not be possible to use it in a semiconductor integrated circuit.

Further, although the above circuit is provided with an emphasis characteristic circuit including a capacitor 15, a coil 16 and a resistor 18, such a circuit is not suitable for a semiconductor integrated circuit. That is, it is difficult to incorporate not only the capacitor but also the coil in the semiconductor integrated circuit. Therefore, the emphasis characteristic circuit is a transistor,
This is achieved by a circuit that uses a resistor or the like, and a circuit that obtains an emphasis characteristic output is also known. However, such a circuit generally has a voltage follower circuit configuration in terms of DC, and cannot be used by directly replacing it with the above-mentioned emphasis characteristic circuit.

The present invention has been made to solve the above problems, and an object of the present invention is to provide an emphasis / de-emphasis circuit which does not use a coupling capacitor, a coil or the like.

[0009]

An emphasis / de-emphasis circuit according to the present invention comprises an operational amplifier to which a de-emphasis signal input terminal is input to a non-inverting input terminal, and one input side is connected to an output terminal of the operational amplifier. One input side of is connected to the emphasis input terminal, and the output side is connected to the de-emphasis signal output terminal, and the input side is the same potential and the switch circuit that selects and outputs one of the inputs, and the input side is the switch An output circuit is connected to the output side of the circuit, the output side is connected to the inverting input terminal and the emphasis signal output terminal of the operational amplifier, and an emphasis circuit for performing an emphasis process on the signal input from the input side to output the switch is provided. It is characterized in that emphasis or de-emphasis is carried out by switching between.

[0010]

When performing the emphasis processing, the signal to be emphasized is selected by the switch circuit. This allows
The signal to be emphasised is emphasized in the emphasis circuit, and this is output from the emphasis signal output terminal.

On the other hand, when performing de-emphasis processing, the output of the operational amplifier is selected by the switch circuit.
When a de-emphasis signal is input from the de-emphasis input terminal, this signal is input to the non-inverting input terminal of the operational amplifier. The output of this operational amplifier is emphasized by the emphasis circuit and fed back to the inverting input terminal of the operational amplifier. Therefore, the emphasized signal is input to the inverting input terminal, the output of the operational amplifier 1 becomes de-emphasized, and the de-emphasized signal output terminal can obtain the de-emphasized signal.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a schematic configuration of the embodiment, in which an input end a of a signal to be de-emphasized is connected to a non-inverting input terminal of an operational amplifier 1. A switch circuit 2 is connected to the output of the operational amplifier 1. The switch circuit 2 has two input terminals A and B and one output terminal, and one of the two input terminals A and B is connected to the output terminal. Then, the input terminal B of the switch circuit 2
Is connected to the output of the operational amplifier 1, and the input end A is connected to the input end b of the signal to be emphasized. Therefore, the switch circuit 2 selects and outputs either the output of the operational amplifier 1 or the signal to be emphasized.

The output end of the switch circuit 2 is connected to the output end c of the de-emphasized signal and the input end of the emphasis circuit 3. And this emphasis circuit 3
Is connected to the inverting input terminal of the operational amplifier 1 and the output terminal d of the emphasized signal.

When the emphasis process is performed, the switch circuit 2 is set to the input terminal A side and the emphasis signal is selected from the input terminal b. When the signal to be emphasised is input from the input end b, this signal is emphasized in the emphasis circuit 3, and the signal in the specific frequency band is emphasized as shown in FIG.
Is output from.

On the other hand, when performing the de-emphasis process, the switch circuit 2 is set to the input terminal B side and the output of the operational amplifier is selected. When the de-emphasis signal is input from the input terminal a, this signal is input to the non-inverting input terminal of the operational amplifier 1. The output of the operational amplifier 1 is emphasized by the emphasis circuit 3 to obtain the operational amplifier 1
It is fed back to the inverting input terminal of. In this way, since the emphasized signal is input to the inverting input terminal, the output of the operational amplifier 1 becomes de-emphasized. That is, the input signal to the operational amplifier 1 is Vin, the output signal is Vout, and the emphasis characteristic of the emphasis circuit is T.
(S), the input signal to the inverting input terminal of the operational amplifier 1 becomes Vout · T (s), and the two inputs of the operational amplifier 1 become equal due to the imaginary short circuit. Therefore, Vin = Vout · T (s ).

Therefore, Vout which is the output of the operational amplifier 1
Vout = Vin / T (s), and a characteristic opposite to the emphasis characteristic of the emphasis circuit 3, that is, a signal in which a signal in a specific frequency band as shown in FIG. 3 is de-emphasized is obtained.

Since only one of the input signals is input, as shown by the broken line in the figure, the input terminal a,
It is also possible to connect b and have only one signal input terminal.

Next, FIG. 4 shows a configuration example of the emphasis circuit 3. This circuit is provided with a current output type differential amplifier (transconductance amplifier) 10 whose non-inverting input terminal is connected to a signal input terminal, and one end of a capacitor 12 is connected to its output. In addition, this output has a transistor 14 forming an emitter follower circuit.
Of the transistor 14 is connected to the power source, and the emitter of the transistor 14 is connected to the constant current circuit 16.

The emitter of the transistor 14 is the output of the emitter follower circuit, which is connected to the non-inverting input terminal of the transconductance amplifier 18. The output of the transconductance amplifier 18 is connected to one end of a capacitor 20 and the base of a transistor 22 forming an emitter follower circuit. The collector of the transistor 22 is connected to the power supply, and the emitter is connected to the constant current circuit 23. The emitter of the transistor 22 is connected to the output terminal b and fed back to the inverting input terminals of the two transconductance amplifiers 10 and 18.

Here, since the transistors 14 and 22 form an emitter follower circuit, here,
A low impedance output is obtained for a high impedance input. And in this circuit, the capacitor 12
Is connected to the power supply, and the capacitor 20 is connected to the input end. Therefore, the high frequency component (for example, f1 or more) escapes from the capacitor 12 to the power source, and the capacitor 20 causes
Low frequency components (for example, f2 or less) are cut. Therefore, as f1 <f2, the emphasis processing is performed by cutting the signals of the frequencies f1 to f2.

FIG. 5 shows a configuration example of the switch circuit 2 which selects and outputs one of the two inputs. In this circuit, the input (1) is connected to the base of the transistor 30. The collector of the transistor 30 is connected to the power supply, and the emitter of the transistor 30 is connected to the emitter of the transistor 32. The collector of this transistor 32 has I
A constant current source 34 that supplies a current of / 2 is connected, and a base of a transistor 36 is connected. The collector of the transistor 36 is connected to the power supply, and the emitter is connected to the ground via the constant current source 38. The emitter of the transistor 36 is connected to the base of the transistor 32 and the output terminal. Also,
The emitters of the transistors 30 and 32 are the transistor 4
It is connected to the ground via a constant current source 42 that allows currents of 0 and I to flow.

The input (2) is connected to the base of the transistor 44, the collector of the transistor 44 is connected to the power supply, and the emitter is connected to the emitter of the transistor 46. The constant current source 34 and the base of the transistor 36 are connected to the collector of the transistor 46. The emitter of the transistor 36 is connected to the base of the transistor 46. The emitters of the transistors 44 and 46 are
It is connected to the constant current source 42 via the transistor 48.

Therefore, when the transistor 40 is on and the transistor 48 is off, a current corresponding to the input signal to the input (1) flows through the transistor 30, and the constant current source 42 defines the current amount I. , A current complementary to the transistor 30 flows through the transistor 32. Since the current of the transistor 32 is the current from the constant current source 34,
A current corresponding to the input signal flows through the transistor 36,
The same signal as the input signal is obtained at the output. Further, a base current corresponding to the current flowing through the transistor 32 is supplied to the base of the transistor 32.

On the other hand, when the transistor 48 is on and the transistor 40 is off, the transistors 44 and 48 operate in the same manner in place of the above transistors 30 and 32, so that the input signal of the input (2) is input. Obtained at the output end.

In this way, the switching transistor 4
By turning on either 0 or 48, the signal of the input (1) or the input (2) can be selected and output. Since this circuit has the structure of a voltage follower (all feedback amplifier), the output is exactly the same potential as the input (1) and the input (2). Therefore, in FIG.
Function as the switch circuit 2.

The emphasis / de-emphasis circuit as described above is also used for a bell filter, an anti-bell filter and the like.

[0027]

As described above, according to the present invention,
Since the input and output have the same potential, a large-capacity capacitor is not required for DC blocking (cutting), and an emphasis / de-emphasis circuit can be configured using an emphasis circuit composed of transistors, resistors, and the like. In addition, the control signal can switch between emphasis and de-emphasis characteristics. Therefore, it becomes very suitable as an internal block of a semiconductor integrated circuit.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of an example.

FIG. 2 is an explanatory diagram of emphasis characteristics.

FIG. 3 is an explanatory diagram of de-emphasis characteristics.

FIG. 4 is a circuit diagram showing a configuration example of an emphasis circuit 3.

FIG. 5 is a circuit diagram showing a configuration example of a switch circuit 2.

FIG. 6 is a circuit diagram showing a configuration of a conventional example.

[Explanation of symbols]

 1 operational amplifier 2 switch circuit 3 emphasis circuit

Claims (1)

[Claims] 1. An operational amplifier in which a de-emphasis signal input end is input to a non-inverting input terminal, and one input side is connected to an output end of the operational amplifier and another
While one input side is connected to the emphasis input terminal,
The output side is connected to the de-emphasis signal output end, the input and output are connected to the output side of the switch circuit, and the output side of the operational amplifier An emphasis circuit, which is connected to the inverting input terminal and the emphasis signal output terminal and which processes the signal input from the input side and outputs it, and is characterized by performing emphasis or de-emphasis by switching the switch. Emphasis / de-emphasis circuit.