JPH01126816A - Broad band variable gain amplifier circuit - Google Patents

Abstract

PURPOSE:To prevent adverse effect onto the frequency characteristic even when the gain is changed by varying the branch ratio of a differential signal current to an output resistor by a 1st differential pair in response to a common control voltage and connecting a 2nd differential pair to the 1st differential pair while collectors are used in common. CONSTITUTION:Two sets of 1st differential pairs comprising transistors(TRs) 14, 15, 18, 1 branch respectively a differential signal current obtained from a collector of TRs 7, 8 into output resistors 22, 23 and a power supply Vcc respectively. The branching ratio in this case is controlled by a control voltage Vc applied to control terminals 3, 4. Then two sets of 2nd differential pairs comprising TRs 16, 17, 20, 21 are connected and the current is set to be equal by the combination of the 1st constant current sources 10, 11 and the 2nd constant current sources 12, 13 to keep the DC component of the current flowing to the output resistors 22, 23 to be constant. Thus, even when the gain is varied largely, the frequency characteristic and the operating point of the output voltage are kept stably.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a variable gain amplifier circuit, and more particularly to a wideband variable gain amplifier circuit suitable for IC implementation.

[Conventional technology]

Generally, the two transistors that make up a differential pair must have the same characteristics, but this can be easily achieved by using an IC. It can be said that this is a suitable circuit. In this sense, the circuit shown in FIG. 2 is known as a variable gain amplifier circuit that uses a differential pair and is suitable for IC implementation.

In the circuit shown in FIG. 2, an input signal voltage VIN applied to input terminal 1 is converted into a signal current by a differential circuit comprising transistors 7 and 8.

Then, this signal current is connected to the transistor 14 and 15°18
The gain is varied by dividing the currents by a differential pair consisting of 19 and 19, and combining the currents by varying the dividing ratio. In the circuit shown in FIG. 2, all the currents generated by the constant current sources 10 and 12 are passed through the output resistors 22 and 23, so the gain control voltage is . The advantage is that even if the voltage is changed (as long as transistors 7 and 8, 14 and 15, and 18 and 19 are not saturated), the operating point of the (differential) output voltage obtained from output terminals 5 and 6 does not change. This is advantageous for low power supply voltage operation and multi-stage connection of amplifier circuits.

Further, since the transistors 14 and 15 operate with the bases being grounded, the connection with the transistor 7 is a cascode connection, which is suitable for widening the band.

Such conventional variable gain amplifier circuits are described in "Analog Integrated Circuits," co-translated by Nakahi et al., Kindai Kagakusha, 1975, PP, 2.
40. Figure 7.5. PP, 236 Figure 7.3゜Unexamined Japanese Patent Publication 1986-
A similar circuit is disclosed in FIG. 1 of Publication No. 110307 "Variable Gain Circuit".

[Problem that the invention seeks to solve]

When decreasing the gain in the circuit shown in Figure 2,
The absolute value of the control voltage VC corresponding to the potential difference between the control terminals 3 and 4 is reduced, and the current shunt ratio of the differential pair of transistors 14 and 15, 18 and 19 is made close to 1:1. As a result, the differential signal currents obtained from the collector terminals of transistors 7 and 8 are combined and flow in output resistors 22 and 23 in a direction that cancels each other out.

However, most of the signal current 26 flowing through the parasitic capacitance 25 (mainly the parasitic capacitance of the transistor constituting the constant current source 10) on the emitter terminal side of the transistor 7 to which the input signal voltage VIN is applied flows only to the transistor 7. flows to

Also, a differential circuit is constructed with resistors 91 and 92 . Even when configured with a constant current source 10, the parasitic capacitance 25
The signal current 26 flowing through the transistor 7 is shunted more than the transistor 8 . For this reason, analysis has revealed that the above-mentioned signal current cancellation operation is not performed sufficiently when the gain is reduced.

The frequency characteristic of the gain of the circuit shown in Fig. 2 is expressed by the solid line 2 in Fig. 3.
7 and the dashed line 2nd. When the control voltage VC is large and the gain is maximum, the frequency characteristic is as shown by the solid line 27, but due to the above problem, when the gain is decreased, the high-frequency gain cannot be suppressed as shown by the broken line 28. Becomes a characteristic. The above problem can be solved by inputting the input signal in a balanced format, but
Frequency band deterioration is inevitable.

An object of the present invention is to provide a wideband variable gain amplifier circuit that is advantageous for low power supply voltage operation and multi-stage connection of amplifiers, and has a wide variable gain range in which the frequency characteristics are not adversely affected by changes in gain. be.

[Means for solving problems]

In order to solve the problem, in the present invention, each emitter of two transistors forming a pair is interconnected to connect one or two constant current sources (hereinafter referred to as the first constant current source), and the two One and the other of two differential transistor pairs (hereinafter referred to as the first differential pair) whose shunt ratios can be controlled by a common control voltage are connected to each collector of the transistor. and in the wideband variable gain amplifier circuit in which an input signal is applied between the bases of the two transistors, the two first
One and the other of two differential transistor pairs (hereinafter referred to as the second differential pair) each controlled by the common control voltage are connected to each of the differential pairs by a collector-collector connection. , a second constant current source is connected to the emitter connection point of each of the two second differential pairs, and the sum of the currents obtained by the second constant current source is equal to the first constant current. The current value of the constant current source was set to be equal to the sum of the currents obtained by the sources.

[Effect]

A differential amplifier circuit (two transistors in a pair) converts the input signal voltage into a differential signal current, and the first differential pair converts the shunt ratio of the differential signal current across the output resistance to a common control voltage. By changing the gain accordingly, variable gain characteristics are obtained. When the gain is decreased, the ratio of the differential signal current flowing through the output resistor to the signal current flowing through the parasitic capacitance does not change, so that an increase in gain in the high range can be suppressed.

Further, by connecting a second differential pair to which a second constant current source is connected and controlled by the above-mentioned common control voltage to the first differential pair so that the collector is common to the first differential pair, the variable This suppresses fluctuations in the operating point of the (differential) output voltage of the gain amplifier circuit. This is advantageous for operation under low power supply voltage and for multi-stage connection of amplifiers.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram showing a wideband variable gain amplifier circuit as an embodiment of the present invention.

In FIG. 1, a differential amplifier circuit constituted by transistors 7 and 8 has the function of converting an input voltage 1N applied between input terminals 1 and 2 into a (differential) signal current. In this case, the input signal VIN may be input in an unbalanced format in which one of input terminals 1 and 2 is fixed, as shown in FIG. Transistors 14 and 15 . constitute a differential pair.
The pairs 16 and 17, 18 and 19, and 20 and 21 are elements whose emitters are commonly connected and constitute a pair of transistors.

Two differential pairs consisting of transistors 14 and 15, and 18 and 19 output (differential) signal currents obtained from the collector terminals of transistors 7 and 8, respectively, to an output resistor 22.
, 23 and the power supply V (((). The current division ratio at this time is controlled by the control voltage V applied to the control terminals 3 and 4.

The collector currents of transistors 14 and 15 are respectively I
Dividing ratio I c+s / when C+4 and I C+5
(I c+a + I c+s) is expressed as the following equation (1).

I c+s I Ic+a + Ic+s 1 +e X P (q
Vc /kT) ... (1) However, V is (potential of input terminal 3) - (potential of input terminal 4), q is the amount of charge, k is Boltzmann's constant, and T is the base
is the absolute temperature of the emitter-to-emitter junction.

However, if only the differential pair of transistors 4, 15. The points also change.

Therefore, a differential pair consisting of transistors 6 and 17, 20 and 21 is connected as shown in FIG.
．． The current values for each combination of 12 and 13 are set to be equal. By connecting as above,
The DC component of the current flowing through the output resistors 22 and 23 can be held constant.

As described above, with the circuit shown in Figure 1, stable frequency characteristics can be obtained as shown by the solid line 29 in Figure 3 even when the gain is decreased, and the operating point of the output voltage does not change even if the gain is changed. A wideband variable gain amplifier circuit having unique characteristics can be obtained.

Furthermore, if a balanced type (differential type) is not required for the output voltage, the two differential pairs in FIG. 1 can be deleted. For example, in FIG. 1, there are two differential pairs made up of transistors 18 to 21 and an output resistor 23. The constant current source 13 may be omitted, the collector terminal of the transistor 8 may be connected to a constant potential point such as the power supply voltage cc, and only the output terminal 6 may be used.

Another embodiment is shown in FIG. The resistor 9 and constant current sources 10 and 12, which were the components of the differential amplifier circuit for converting the input signal voltage into a signal current in FIG. 1, are replaced by the resistors 91, 92, . . . shown in FIG. Transistor 1 constituting a constant current source
01 respectively. Further, the constant current sources 11 and 13 in FIG. 1 can also be replaced with transistors 111 and 131 constituting a constant current source as shown in FIG.
It is necessary to make the sum of the collector currents of transistors 1 and 131 equal to the collector current of transistor 101.

When converting it into an IC, the area of the transistor 101 may be made twice the area of the transistors 111 or 131, or the area of the transistor 101 may be doubled.
It goes without saying that the resistor 102 is configured to have two paired transistors 111 and 131 connected in parallel, and the resistor 102 is configured to have two paired resistors 112 and 132 connected in parallel.

To further improve accuracy, transistors II3 and 13
3 to adjust the collector potential of the transistors 111 and 131 to the transistor 101 and the constant current sources 10 and 12 in FIG.
is set to be equal to the operating point of the collector potential of the transistors constituting the transistor. This is a measure to prevent the collector current of the transistors 111 and 131 from increasing beyond the designed value due to the Early effect.

The above measures are effective when implementing the circuit of the present invention into an IC, especially when using high frequency elements.

FIG. 6 shows an embodiment in which FIG. 1 is further simplified. Two pairs of transistors 31 and 32, 33 and 34, and a constant current source 30 are used to fix the operating point of the output voltage.

Since the collector current of the transistor 31 is divided into two by the transistors 33 and 34, the current value of the constant current source 30 is set equal to 10 or 1202 times the constant current source (normally, the current values of the constant current sources 10 and 12 are in phase with each other). equal). Further, constant current sources 10 and 12. The configuration of the resistor 9 is shown in FIG. 5 as a constant current source transistor 101. By configuring the resistors 91 and 92, the circuit can be further simplified (in that case, the current value of the constant current source 30 is set equal to the collector current value of the constant current source transistor 101).

Although the embodiments of the present invention have been described above using an NPN) transistor configuration, the present invention can also be configured using a PNP) transistor or an FET.

〔Effect of the invention〕

The variable gain amplifier circuit according to the present invention has the advantage that its frequency characteristics and output voltage operating point can be stably maintained even if the gain is changed significantly. Therefore, according to the invention:
It operates even at low power supply voltages (e.g. 5.0μ), which is advantageous for designing multi-stage amplifier circuits, and it has the advantage of being able to realize wideband variable gain amplifier circuits (e.g. 100M) (Z or higher) by using high-frequency elements. be.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional example, FIG. 3 is a characteristic diagram showing frequency characteristics of gain of the circuit of the present invention and the conventional example, and FIG. FIG. 4 is a circuit diagram showing another conventional example, and FIGS. 5 and 6 are circuit diagrams showing other embodiments of the present invention. Explanation of symbols 1.2...Input terminal, 3, 4...Gain control terminal, 5
゜6... Output terminal, 14.15... Variable gain transistor, 16.17... Fixed operating point transistor,
18.19...Variable gain transistor, 22.23
...Output resistance agent Akio Namiki, patent attorney No. 2 Figure 3 Frequency [MHz] Figure 4

Claims (1)

[Claims] 1. The emitters of two transistors forming a pair are interconnected to connect one or two constant current sources (hereinafter referred to as the first constant current source), and the two transistors are Each collector has two differential transistor pairs (hereinafter referred to as
In a wideband variable gain amplifier circuit, one and the other of the first differential pair (hereinafter referred to as a first differential pair) are connected to each other, and an input signal is applied between the bases of the two transistors. two differential transistor pairs each controlled by the common control voltage (
Hereinafter, one and the other of the two differential pairs (hereinafter referred to as the second differential pair) are connected by collector-to-collector connection, and the two
A second constant current source is connected to each emitter connection point of the differential pair, and the sum of the currents obtained by the second constant current sources is equal to the current obtained by the first constant current source. 1. A wideband variable gain amplifier circuit, characterized in that the current value of the constant current source is set so as to be equal to the sum of the current values. 2. The wideband variable gain amplifier circuit according to claim 1, wherein the first differential pair is one set and the output is taken out in an unbalanced format.