JPH02124620A - Active filter - Google Patents

Abstract

PURPOSE:To improve the frequency characteristic and the transconductance by constituting a differential amplifier circuit with the 1st and 2nd emitter coupling transistor(TR) pair and forming an integration circuit with one stage of the differential amplifier circuit. CONSTITUTION:1st and 2nd emitter coupling TR pair 10, 20 are constituted by employing pair TRs with equal emitter area and constant current sources 15a, 15b as emitter current sources giving a constant current is respectively are connected to the common connecting point of each emitter. Moreover, the 1st collectors 1, 2 are connected, a collector current source 5 is connected to its common connecting point, the 2nd collectors 3, 4 are connected, a collector current source 6 is connected to the common connecting point. Then a capacitor 7 being a load is connected between both the collector common connecting points. Thus, the integration circuit is constituted by one stage of the differential amplifier circuit using a capacitor as the load, the frequency circuit is improved and the transconductance Gm is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to an active filter suitable for use in a high frequency region such as a video band.

(Prior Art) In recent years, the frequency of active filters has been increasing, and in particular, active filters for video bands, including their capacitors, are being built into ICs. However, it is difficult to make something with a high Q (especially a bandpass filter).
Furthermore, there is a demand for technology for even higher frequencies. and,
When configuring an active filter for a frequency band of several MHz or more, such as a video band, an operational amplifier type filter consisting of two stages of amplification requires phase compensation and does not have good frequency characteristics. It is not used as a circuit. In addition, as an element for circuit configuration, M
Since the OSFET has a low mutual conductance gm, a bipolar transistor (hereinafter also simply referred to as a transistor) is generally used for a high-frequency active filter.

FIG. 13 is a known circuit for a conventional active filter configuration, and shows a differential amplifier circuit using transistors with a capacitor 81 as the load and a one-stage integrating circuit. There is.

In FIG. 13, Q5 t Q52 is a pair of transistors with equal emitter areas, and the differential amplifier circuit is constituted by an emitter-coupled transistor pair formed by this pair of transistors Q5 + and Q52. 82 is a constant current source, 83
．． 84 is a collector current source.

However, such an emitter-coupled transistor pair including the transistors Q5IQ52 has poor linearity, and the mutual conductance gm changes depending on the level of the input signal. Therefore, the characteristics of an active filter constructed using such a differential amplifier circuit change depending on the level of the input signal, and in this respect, it cannot be said that the active filter has sufficient characteristics. Also, if the capacity 81 is built into the IC chip, the absolute accuracy will be ±30 for boat fishing.
% variation will occur.

Therefore, it is necessary to perform tuning by varying the gm of the differential amplifier circuit.

FIG. 16 shows an integrating circuit used in a multi-purpose filter as another conventional example (Japanese Patent Laid-Open No. 58-161
Publication No. 413). In the figure, the signal VIN input to the input terminal 85 is amplified by the differential amplifier circuit A linearized by the resistors 86 and 87, and is then amplified by the transistors Q55 and Q5.
A signal is inputted to a differential amplifier circuit B by a capacitor 88 and outputted to a terminal 89.

Considering the performance required of the integrator circuit that makes up the active filter, it is ideal that the integrator circuit has a first pole at a very low frequency and has no other poles or zero points. It is true. However, actual integration circuits have multiple poles and zero points due to the performance limits of the transistors used, so they are far from ideal, and these poles and zero points are relative to the cutoff frequency of the filter. It is generally known that a good active filter cannot be constructed unless it is 50 to 100 times larger.

From this, for example, when trying to fabricate an active filter with a cutoff frequency of 10 MHz, the second pole and zero point must be at a point of 500 MHz to IGHz or higher.

In other words, it is not possible to manufacture a good active filter unless consideration is given to extremely high frequency performance relative to the frequency used.

Incidentally, in the circuit shown in FIG. 16, the resistors 86 and 87 are selected to have large values in order to ensure linearity. In other words, the nonlinearity of transistors Q53 and Q54 is
This resistance 86 is used for linearization by resistance 86.
．． It is necessary to make the value of 87 sufficiently larger than the isometric resistance 1/g m of transistors Q53, Qs 4.

Also, transistor Q53, Qs 4, resistor 86.8
The temperature characteristics of the transconductance Gm of the differential amplifier circuit A consisting of the bipolar transistor Qs 3
, Q54 and the temperature characteristics of the resistors 86 and 87, it cannot be compensated by a simple temperature compensation circuit. For this reason, settings are generally made so that the influence of resistance with small temperature characteristics is dominant. At this time, Ω is used as the value of the resistor 86.87 from 2 to 4. Therefore, the signal VIN input to the input terminal 85 is attenuated by about 2 ndB, for example, and is input to the bases of the transistors Q55 and Q5e in the differential amplifier circuit B.

Therefore, as a result, the first integration circuit as a whole
Compared to the differential amplifier circuit shown in FIG. 3, the transconductance Gm is about 1/10, and the use of transistors with high gm becomes meaningless. In addition, in a high-frequency, high-Q filter, the Q changes greatly depending on the element parameters, so it is desirable to have some kind of control means. However, in the integrating circuit shown in Figure 16, a special circuit is required to control the Q. Difficult unless added.

As mentioned above, the temperature characteristic of the transconductance Gm of the entire circuit is the bipolar transistor Q53.
, Q54 and resistance 86.87 are combined, so it is difficult to cancel them accurately.

Further, in the differential amplifier circuit A, since the base of the transistor Q54 is grounded in an alternating current manner, the signal VIN inputted to the input terminal 85 is transmitted through an emitter follower circuit formed by the transistor Q53 and a base grounded circuit formed by the other transistor Q54. is passed through and output. However, when using differential input and differential output, it can be considered as a half circuit in terms of frequency characteristics. ), it has the characteristic of one stage of emitter grounding, but as mentioned above, if one side is grounded AC, the equivalent circuit becomes complicated.
Frequency characteristics deteriorate due to the unnecessary poles and zero points mentioned above. Furthermore, since the input signal VIN passes through two stages of differential amplifier circuits A and B, the frequency characteristics also deteriorate in this respect. Furthermore, the load resistance has pnp
Since transistor Q57 is used, the overall DC gain is equal to the output resistance rot of transistor Q57.
is multiplied by the transconductance Gm. However, the value of the output resistance rot is determined by the process, and it is difficult to set it freely, which is disadvantageous in terms of frequency characteristics.

Additionally, a method of phase compensation in an active filter using MOSFET has been reported (H.

Khorra+nabadi and P, R, Gr
ay, “High frequency CM
OS continuous-time f'
11ters, IEEE J, 5ol
id-8tate C1rcuits, vol, 5C
-19, p939-948. Dec.

1984). In this method, it has been shown that the phase delay caused by unnecessary high-frequency poles can be canceled by a low-frequency pole, and the low-frequency ball is created by the finite DC gain of the integrating circuit. The value of DC gain is
This is determined by the dimension value of the MOSFET of the current source which is the active load. With this phase compensation method, for example, for a Q-2n bandpass filter, the unnecessary ball must be at least 100 times the center frequency.
If the phase is relaxed to about twice as much and the phase compensation is complete, the deviation from the theoretical characteristics can be kept within ±065 dB.

However, since the cutoff frequency of an active filter is proportional to the DC Gm of the integrating circuit used, when considering power consumption, a high frequency active filter has Gm/I
As mentioned above, a bipolar transistor with a large value of O (IC: co-collector current) is suitable.

An example of configuring an active filter using such bipolar transistors is further disclosed in Japanese Patent Application Laid-Open No. 61-2247.
It is described in Publication No. 15. In this prior art, a current source is used for the load, but if a bipolar transistor process is used, this is generally constructed from a pnp (pnp) transistor. However, since the output impedance of a bipolar transistor is determined by the process, it is difficult to set the DC gain to a desired value. In addition, in order to improve frequency characteristics, it is necessary to use a fully differential configuration, which requires a common-mode feedback circuit to stabilize the DC potential. The common-mode feedback circuit cannot be constructed with a simple circuit, which leads to a complicated circuit.

(Problems to be Solved by the Invention) A conventional active filter using an integrating circuit shown in FIG. Since it has a two-stage configuration with differential amplifier circuit B as a load resistor, the transconductance G of the entire integrating circuit is
m is low and is not suitable for high frequency operation.

Furthermore, the temperature characteristics of the transconductance Gm of the entire integrating circuit are as follows:
3. Since the temperature characteristics of both Q54 and resistance 86.87 are combined, it is difficult to cancel the temperature characteristics accurately.

Furthermore, in a high-frequency, high-Q filter, since the Q changes greatly depending on the element parameters, it is desirable to have some kind of Q control means.
In the integral circuit shown in the figure, it is difficult to control this Q unless a special circuit is added. In addition, in the differential amplifier circuit A on the first stage side, the base of the transistor Q54 is grounded in an AC manner, so the equivalent circuit becomes complicated and has unnecessary poles and zero points. Frequency characteristics deteriorate.

In addition, another conventional technique shows that in an active filter using a MOSFET, a phase delay caused by an unnecessary high-frequency pole can be canceled out by a low-frequency pole. However, the cutoff frequency of an active filter is proportional to the DC Gm of the integrating circuit used, so when considering power consumption, a high-frequency active filter using a bipolar transistor with a large Gm/IC value is suitable. . Therefore, there is a need for a phase compensation method that does not use bipolar transistors to complicate the circuit and is suitable for this purpose.

This invention was made based on the above circumstances, and uses a bipolar transistor to have good frequency characteristics and a high transconductance Gm, and also to be able to accurately cancel the temperature characteristics of this transconductance Gm, and to control Q. It is an object of the present invention to provide an active filter having a phase compensation means suitable for bipolar transistors without complicating the circuit.

[Configuration of the Invention (Means for Solving the Problems) In order to solve the above problems, the first invention has two
The first
a first emitter-coupled transistor pair and a second emitter-coupled transistor pair, and a first collector of the first emitter-coupled transistor pair and a first collector of the second emitter-coupled transistor pair are connected to a first output. a second collector of the first emitter-coupled transistor pair and a second collector of the second emitter-coupled transistor pair are commonly connected to a second output terminal; A means for applying a DC voltage that provides a required level of offset between the first base of the pair of emitter-coupled transistors and the first base of the second pair of emitter-coupled transistors is connected to one input terminal; means for applying a DC voltage that provides an offset of the opposite polarity and the same level as the DC voltage between the second base of the second emitter-coupled transistor pair and the second base of the first emitter-coupled transistor pair; configuring a differential amplifier circuit connected to the other input terminal, and configuring an integrating circuit by connecting a capacitor between the first output terminal and the second output terminal of the differential amplifier circuit, The gist is that it is configured using the integrating circuit.

Moreover, second to sixth inventions have the following configurations in the first invention.

In the second invention, a resistor for phase characteristic compensation is connected in parallel to the capacitor connected between the first output terminal and the second output terminal in the differential amplifier circuit.

In the third invention, the load of the collector circuit for obtaining the differential output in the differential amplifier circuit is a resistor, and a bias voltage source is connected to both ends of the resistor to prevent a DC voltage drop. .

In the fourth invention, the load of the collector circuit for obtaining the differential output in the differential amplifier circuit is composed of a resistor or a parallel composite resistor of a resistor and a negative resistor.

In the fifth aspect of the invention, the DC voltage application means is configured using an output potential difference between two emitter followers using transistors having different emitter areas.

In the sixth aspect of the invention, the DC voltage application means uses an output potential difference between two emitter followers having different collector currents.

A seventh aspect of the present invention is n pairs (n is an integer of 2 or more) of transistors each having substantially the same emitter area, one of which has a collector connected to the first and second output terminals. an emitter-coupled transistor pair, an emitter current source commonly connected to the emitters of all the transistors constituting the n emitter-coupled transistor pairs directly or through at least one diode, and a first and a second emitter-coupled transistor pair. From the input signal applied between the input terminals, n AC signals with different amplitudes and the same phase on which different DC voltages are superimposed are generated, and the n AC signals are applied to each of the n pairs of emitter-coupled transistors. an integrating circuit comprising a differential amplifier circuit comprising drive means for applying voltage between the bases, and a capacitor connected between the first output terminal and the second output terminal in the differential amplifier circuit; The gist is that the integrated circuit is constructed using the integrating circuit.

Moreover, the gist of the eighth to twelfth inventions is the following configurations in the seventh invention.

In the eighth invention, a resistor for phase characteristic compensation is connected in parallel to the capacitor connected between the first output terminal and the second output terminal in the differential amplifier circuit.

In the ninth invention, the load of the collector circuit for obtaining a differential output in the differential amplifier circuit is a resistor, and a bias voltage source is connected to both ends of the resistor to prevent a DC voltage drop. .

In the tenth invention, the load of the collector circuit for obtaining the differential output in the differential amplifier circuit is composed of a resistor or a parallel composite resistor of a resistor and a negative resistor.

In the eleventh invention, the drive means is constituted by 2n emitter followers whose emitters are respectively connected to the bases of the n emitter-coupled transistor pairs, and among the 2n emitter followers, the n emitter-coupled transistor pairs n emitter followers whose emitters are connected to one base of an emitter-coupled transistor pair have different emitter areas or different collector currents,
and by making the emitter areas of the remaining n emitter followers whose emitters are connected to the bases of the other of the n emitter-coupled transistor pairs similarly different from each other, or by making the collector currents similarly different from each other, It is configured to vary the DC voltages superimposed on the AC signals applied between the bases of the n pairs of emitter-coupled transistors.

In the twelfth invention, the drive means is constituted by 2n emitter followers each having an emitter connected to the base of the n emitter-coupled transistor pairs, and of the 2n emitter followers, the emitter is connected to the n emitter-coupled transistor pairs. The bases of the n emitter followers connected to the bases of one of the emitter-coupled transistor pairs of the set are each divided into voltages of a first voltage dividing means having n voltage dividing points connected to the first input terminal. the bases of the remaining n emitter followers whose emitters are connected to the bases of the other of the n emitter-coupled transistor pairs, respectively, to the n voltage dividing points connected to the second input terminal; is connected to each voltage dividing point of the second voltage dividing means having a voltage dividing means, so that the amplitudes of the AC signals applied between the bases of the n pairs of emitter-coupled transistors are made different.

(Function) In the first invention, the differential amplifier circuit is composed of a first and second emitter-coupled transistor pair whose collector currents are given respective required offsets, and a linearization resistor is connected to the emitters of the transistors. By integrating the offset collector currents and outputting them as differential outputs, the linearity is improved and the mutual conductance gm is made variable. Further, the integrating circuit is composed of one stage of the above-mentioned differential amplifier circuit whose load is a capacitor,
The frequency characteristics are said to be good, and the transconductance Gm is increased compared to the conventional technology. Furthermore, as described above, since no resistor is connected to the emitters of the transistors constituting the differential amplifier circuit, the transconductance Gm of the integrating circuit is exactly inversely proportional to the absolute temperature. Therefore, by using an emitter current source whose current is proportional to the absolute temperature,
The temperature dependence of the transconductance Gm is canceled, and the characteristics are stabilized.

Further, in the second to sixth inventions, in addition to the effects of the first invention, the following effects can be obtained.

In the second invention, appropriate phase compensation is performed using a simple circuit, and frequency characteristics are improved.

In the third invention, the DC potential of the load resistor is stabilized, the signal flow becomes entirely differential, and the DC gain can be set to a desired value, thereby canceling out the influence of the second pole. Therefore, the frequency characteristics can be further improved.

In the fourth invention, the load of the collector circuit for obtaining the differential output in the differential amplifier circuit is a resistor or a parallel composite resistance of a resistor and a negative resistance, and this reduces the power consumption of the power supply as well as the third invention. A similar improvement in frequency characteristics is achieved.

In the fifth or sixth invention, by adjusting the current of the emitter follower connected to the input stage of the differential amplifier circuit,
Since Q can be controlled, changes in Q due to parameters of constituent elements can be suppressed.

In the seventh invention, the emitter areas of the transistors used in the emitter-coupled transistor pair are all made equal, and different DC voltages are superimposed on the AC signals applied to their bases to give an offset to the collector current. Then, by integrating the offset collector currents and making them a differential output, linearity is improved and the mutual conductance gm is made variable. Also, the integrating circuit is
It is composed of one stage of the differential amplifier circuit with the load as a capacitor, and furthermore, as mentioned above, since no resistor is connected to the emitter of the transistor that constitutes the differential amplifier circuit,
The transconductance Gm of the integrating circuit will be exactly inversely proportional to the absolute temperature. Therefore, by using an emitter current source whose current is proportional to the absolute temperature, the temperature dependence of the transconductance Gm can be canceled and the characteristics can be stabilized.

Further, in the eighth to twelfth inventions, in addition to the effects of the seventh invention, the following effects can be obtained.

In the eighth invention, appropriate phase compensation is performed using a simple circuit, and frequency characteristics are improved.

In the ninth invention, the DC potential of the load resistor is stabilized, all signal flows are in a differential configuration, and the DC gain can be set to a desired value, thereby canceling out the influence of the second pole. Therefore, further improvement in frequency characteristics can be obtained.

In the tenth invention, the load of the collector circuit for obtaining the differential output in the differential amplifier circuit is a resistor or a parallel composite resistance of a resistor and a negative resistance, and this reduces the power consumption of the power supply and also achieves the ninth invention. A similar improvement in frequency characteristics is achieved.

In the eleventh or twelfth invention, Q can be controlled by adjusting the current of the emitter follower connected to the input stage of the differential amplifier circuit, and changes in Q due to parameters of constituent elements can be suppressed. .

(Example) Embodiments of the present invention will be described below based on the drawings.

1 to 4 are diagrams showing a first embodiment of the present invention.

The active filter of this example is constructed using an integrating circuit with the load of the differential amplifier circuit as a capacitance.
First, the configuration of this integrating circuit will be explained using (A), (B), (C), and (D) of FIG.

FIG. 2(A) shows the basic configuration of the integrating circuit.

In the figure, QB and Q4 and Q5 and QB are pair transistors with equal emitter areas, respectively, and each pair of transistors is used to configure a first emitter-coupled transistor pair 10 and a second emitter-coupled transistor pair 2n. ing.

A constant current 1e is applied to the common connection point of the emitters of the first and second emitter-coupled transistor pairs 10°2n, respectively.
Constant current sources 15a, 15 as emitter current sources consisting of
b is connected.

The first collector 1 of the first emitter-coupled transistor pair 1o and the first collector 2 of the second emitter-coupled transistor pair 2n are connected, and a collector current source 5 is connected to their common connection point.

Further, the second collector 3 of the first emitter-coupled transistor pair 1o and the second collector 4 of the second emitter-coupled transistor pair 2n are connected, and a collector current source 6 is connected to their common connection point. .

A capacitor 7 serving as a load is connected between the above-mentioned common connection point of both collectors.

In addition, in order to improve linearity, as a drive means for giving a required offset to the output current of the first and second emitter-coupled transistor pair 10.2n, an emitter area ratio is 1=4 2
Two emitter followers consisting of transistors are arranged in parallel.

That is, on one input terminal 8 side, the emitter area ratio is 1=
Two emitter followers 16, 17 using two transistors QI Q2 of 4 are arranged in parallel. The emitter circuit of each emitter follower 16.17 has a constant current Io
A constant current source 21a121b is connected. and,
The emitter output point of the emitter follower 16 is connected to the first base 12 of the second emitter-coupled transistor pair 2n, and the emitter output point of the other emitter follower 17 is connected to the first base 12 of the second emitter-coupled transistor pair 2n.
The first base 11 of the emitter-coupled transistor pair 1o of
It is connected to the.

Further, on the other input terminal 9 side, two emitter followers 18 and 19 using two transistors Q7 and QB with an emitter area ratio of 1=4 are arranged in parallel, as described above. Constant current sources 21c and 21d of constant current Io are connected to the emitter circuit of each emitter follower 18, 19.

Then, the emitter output point of the emitter follower 18 is the first
The second base 13 of the emitter-coupled transistor pair 10 of
The emitter output point of the other emitter follower 19 is connected to the second base 14 of the second emitter-coupled transistor pair 2n.

Since the differential amplifier circuit constituting the integrating circuit is configured as described above, the transistor Q in the two emitter followers 16 and 17 arranged in parallel on one input terminal 8 side is
1 has an emitter area four times that of the other transistor Q2, and a constant current 1o of the same level flows through both transistors QI02. Therefore, the base-emitter voltage Vbe of the transistor Q1 and the other transistor Q2 are respectively Vv@In(IC/4IS) (V) −(1)
VT-吏n(10/IS) (V) -(2)
However, IS:) saturation current of the transistor, IC: collector current, vT: thermal voltage, and Vbe of transistor Q2 and transistor Q+.
The voltage difference between is always VT'! L n 4 (V)
−(3).

As a result, the first base 11 of the first emitter-coupled transistor pair 10, ! : A DC offset of a required level is provided between the first base 12 of the second emitter-coupled transistor pair 2o and the first base 11 side of the first emitter-coupled transistor pair 10. This is equivalent to applying an offset DC voltage of a required level to one input section.

Regarding the other input terminal 9 side, the second base 1 of the first emitter-coupled transistor pair 1o is also connected in substantially the same manner as above.
This means that the third side has a DC offset of the required level with the opposite polarity to the above, which is equivalent to applying an offset DC voltage of the required level to the other input section.

In this way, by providing a DC offset to both input parts, a 1:4 offset is generated in the output current of the first and second emitter-coupled transistor pair 10.2n, and this 1:4 offset is generated. The respective output currents are integrated, and each current 1. after this integration is calculated. 12 is each current source 5.6
By making the current flow at , a distortion rate of approximately 1% has been achieved. Compared to a differential amplifier circuit that does not have linearization means, its linear range has been expanded approximately three times, and the transconductance Gm is approximately 2/3 of the transconductance gm of a common emitter transistor. It is a single-stage differential amplifier circuit,
It achieves both linearity and high transconductance Gm.

The integrating circuit of FIG. 2(B) has a resistor 22 for phase characteristic compensation connected in parallel to the capacitor 7 in the above-described integrating circuit of FIG. 2(A). Further, the resistor 22 is provided with a dividing point 22a that divides the resistance value into two.
2a and the low potential point, do not cause a DC voltage drop across the load (collector current source 5.6 in Figure 2 (B)) for obtaining differential output in the differential amplifier circuit. A bias voltage source 23 is connected for this purpose. The bias voltage source 23 and the resistor 22 stabilize the direct current potential of the load in the integrating circuit, resulting in a fully differential configuration, and appropriate phase compensation is performed to improve frequency characteristics.

The integrator circuit of FIG. 2(C) has a more specific configuration by using pnp transistors Q9 and Q+o, respectively, instead of the collector current source 5.6 in the integrator circuit of FIG. 2(A). be.

In addition, FIG. 2(D) shows that the collector current source 5.6 in the integrating circuit of FIG. 2(A) is replaced by a resistor 2 with a more limited value.
4.25 to obtain the effect of improving frequency characteristics.

The above-mentioned integrating circuit shown in FIG. 2 (D) cancels the phase delay of the second pole by advancing the phase by making the DC gain finite, and corrects the frequency shift where the gain becomes O dB. Can be done.

Now, as an example, let us consider the case of configuring a bandpass filter with a center frequency f o and Q -2n. Comparing the band characteristics of the passband with the ideal case without the second ball, and limiting the deviation of the characteristics to within +2 dB, we get:
The frequency of the second pole of the integrating circuit is 2 of the center frequency fo.
It must be n0 times or more and must satisfy strict conditions.

However, even if the frequency of the second pole is, for example, 50 times the center frequency to, there is a method of making the band characteristics within +1 dB. This is achieved by setting the DC gain to 50.
It is possible to completely correct the frequency shift where the gain becomes OdB. However, since the frequency of the second ball is determined by the characteristics of the element, the DC gain must be set to exactly cancel out the frequency.

The collector current sources in FIG. 2(C) described above are connected to p
np) In an integrating circuit constructed using transistors Q9 and Qlo, the DC gain is determined by the early voltage of the transistor, and cannot be freely adjusted. A configuration using a resistor is very effective in this respect because the resistance value can be set to any value within the Ic chip. Especially when configuring a high Q filter,
It is effective because it is difficult to control the Q.

In addition, a second circuit in which the load of the differential amplifier circuit is a resistance of 24.
The circuit shown in FIG. 2(D) can be combined with the connection of the phase characteristic compensation resistor 22 and the bias voltage source 23 shown in FIG. 2(B). With this kind of circuit configuration, the DC potential of the load can be stabilized with a simple circuit without the need for a complicated common-mode feedback circuit, and the signal flow is entirely differential, further improving frequency characteristics. be able to.

The active filter shown in FIG. 1 is similar to the active filter shown in FIG.
) is used to configure a second-order biquad bandpass filter.

The connection between the two integrating circuits 30a and 30b is such that the output terminal 26a of one integrating circuit 30a is connected to the output terminal 26a of the other integrating circuit 30a.
b, and the output terminals 2 and 7a of one integrating circuit 30a are connected to the input terminal 8 of the other integrating circuit 30b.
connected to b.

Also, each output terminal 26b of the other integrating circuit 30b.

27b is each input terminal 8a of one integrating circuit 30a.
s 9 a, respectively. In this way, 2
The integrating circuits 30a and 30b are connected to each other via emitter followers at their respective input and output stages.

Further, the input signal VIN is inputted by capacitance division by capacitance 28.29. Transistor Q+ +・Q1
0.Q+ 3SQ+ 4 each constitute a termination resistor.

Since the active filter of this embodiment is configured as described above, the sum of the output impedance of the emitter follower connecting the integrating circuits 30a130b, the base resistance of the transistor connected to the emitter follower, and the base - The time constant po with the emitter capacitance and the frequency fc of the second pole of the integrating circuit are relatively close values, and these two values determine the frequency characteristics of the integrating circuit as a whole. The frequency characteristics of a differential amplifier circuit are almost determined by the manufacturing process of the transistors that make up the circuit, and it is difficult to change this. However, since the above-mentioned time constant po changes depending on the current value of the emitter follower, it is easy to control. Therefore, by controlling this current value, the second
The cancellation effect between the pole and the DC gain can be controlled.

Furthermore, as mentioned above, some kind of Q control means is essential for a high Q filter, but by utilizing the above-mentioned effect, this can be easily achieved without adding a special Q control circuit. be able to.

Therefore, by adjusting the value of the resistor 24.25 connected as a load of the differential amplifier circuit, the DC gain and the second pole are canceled to a certain extent, and the current value of the emitter follower is adjusted. It is possible to obtain a reliable counteracting effect and obtain critical performance. Note that in the prior art shown in FIG. 16, signals are transferred between two integrating circuits using an emitter follower. Because I had
Even if the current of the emitter follower is changed, the above-mentioned time constant po does not change. In contrast, in this embodiment, the overall frequency characteristics can be controlled simply by changing the current of the emitter follower. In this way, the active filter of this embodiment has the following effects when compared with the prior art:
It has a function that allows Q to be controlled without requiring any special additional circuit.

In addition, in the integrating circuits (A), (B), (C), and (D) in Fig. 2, the signal transmission is fully differential with differential input and differential output, but single hand-powered It goes without saying that even a single output is advantageous because it has the various advantages mentioned above compared to the conventional technology.

Next, modifications of the integrating circuit applied to the active filter of the first embodiment will be explained using FIGS. 3 and 4.

FIG. 3 is a diagram showing a first modification of the integral one path. This modification is based on the resistor 24. in the circuit of FIG. 2(D).
A negative resistor is connected in parallel to the resistor 25, and the DC voltage drop across the resistor 24 and 25 is made small, thereby making it possible to lower the voltage of the IC.

The negative resistance is the two transistors Q of the differential amplifier circuit whose emitter degeneration is performed by the terminating resistor 31 of the resistor 2R, where the resistance value of each of the resistors 24 and 25 above is R.
It is constituted by a positive feedback circuit in which the bases of +s and Q+e are connected to the collectors of other transistors.

The isometric combined resistance of resistor 24.25 and negative resistance is gm
Then, it is expressed by the following formula.

(-(1/gm+R) ・R] / [-(1/gm+R)+R) = (R/ (1/gm)) ((1/gm) + R) -R・ (1+gm-R) ・・・(4)
Therefore, the resistance value is 1. (1+gm-R) times. Therefore, even if the DC voltage applied to the resistors 24 and 25 is reduced, the isometric load resistance of the differential amplifier circuit can be increased, and the DC gain can be increased.

FIG. 4 shows a second modification of the integrating circuit. In this modification, the transistor Q of the integrating circuit shown in FIG.
Diodes 36, 37, 38, and 39 are connected in series to the emitters of 3, Q4, Qs, and Qe, respectively, and the linear input level range is approximately doubled. Although one diode is used for each of the diodes in the figure, the linear input level range can be further expanded by connecting two or more diodes in series. However, since each diode produces a forward voltage drop of approximately 0.7V, there is a limit to the number of diodes that can be connected in series for the purpose of reducing the voltage of the circuit.

Next, FIGS. 5 to 10 show a second embodiment of the present invention.

Like the first embodiment, the active filter of this embodiment is constructed using an integrating circuit with the load of the differential amplifier circuit as a capacitance.
), we will first explain the configuration of this integrating circuit.

Figure 6(A) shows the basic configuration of an integrating circuit.
In the figure, Q23, Q24, Q25, and Q26 are transistors having the same emitter area, and the emitters of these transistors are commonly connected to form an emitter-coupled transistor pair 40. A constant current of 1
A constant current source 53 as an emitter current source consisting of e is connected.

First collector 41 of emitter-coupled transistor pair 40
A collector current source 43 is connected to.

Further, a collector current source 44 is connected to the second collector 42 of the emitter-coupled transistor pair 40.

A capacitor 45 serving as a load is connected between the first and second collectors 41 and 42 described above.

In addition, in order to improve linearity, two transistors, each with an emitter area ratio of 1:5, are installed at both input terminals 46 and 47 as drive means for giving a required offset to the output current of the emitter-coupled transistor pair 40, respectively. Two emitter followers made of transistors are arranged in parallel.

That is, on one input terminal 46 side, the emitter area ratio is 1.
Two emitter followers 54 and 55 using two transistors Q21 and Q22 of :5 are arranged in parallel. The emitter circuit of each emitter follower 54,55 has a constant current of 1.
Constant current sources 58a and 58b are connected to the constant current sources 58a and 58b, respectively.

The emitter output point of the emitter follower 54 is connected to the first base 48 of the emitter-coupled transistor pair 40, and the emitter output point of the other emitter follower 55 is connected to the second base 49 of the emitter-coupled transistor pair 40. There is.

Also, on the other input terminal 47 side, two transistors Q27 and Q2 with an emitter area ratio of 1=5 are installed in the same manner as above.
Two emitter followers 56 and 57 using e are arranged in parallel. Constant current sources 58c and 58d with a constant current of 10 are connected to the emitter circuit of each emitter follower 56, 57, respectively.

The emitter output point of the emitter follower 56 is connected to the first base 51 of the emitter-coupled transistor pair 40, and the emitter output point of the other emitter follower 57 is connected to the second base 52 of the emitter-coupled transistor pair 40. There is. Also, transistors Q2 + and Q22
A resistor RI between the bases of transistors Q22 and 028
A resistor R2 is connected between the bases of the transistors Q27 and Q2B, and a resistor R3 is connected between the bases of the transistors Q27 and Q2B. These resistors serve to divide the AC component of the input signal VIN and input it to the bases of the respective transistors. The values of each of these resistances are R1(-R3):R2=5:
It is set to 8.

Since the differential amplifier circuit constituting the integrating circuit is configured as described above, the emitter area of the transistor Q22 in the two emitter followers 54 and 55 arranged in parallel on one input terminal 46 side is larger than that of the other. Transistor Q21
, and both transistors Q21 and Q
A constant current 10 of the same level flows through 22. Therefore, the base-emitter voltages VBE of the transistor Q21 and the other transistor Q22 are VT-in (IC/IS) (V)VT-,1
n(1(j15IS) (V) = 15) However, ■S: saturation current of transistor, IC: collector current, vT: thermal voltage, and the difference between the VBE voltages of transistor Q21 and transistor Q22 is always VT -n n 5 (V)
=16>.

Further, in FIG. 6(A), transistor Q23. Q
24SQ25 SQ2 e collector current I
I I2, I3, I4, base-emitter voltages, respectively, VBEI VBE2, VBE3. If VBE4, II -Is-exp (VBEI /VT)12-I
s 11exp (VBE2 /VT)13 =IS
IIexp (VBE3 /VT)14-Is-exp
(VBE4 /VT) - (7) Therefore, 11/12=exp((VBEI VBE2)/V
T l ...(8) Here, from the above equation 7), transistors Q2 + and Q
The difference in voltage between 22 vBEs is 7-! Ln5(v), and the difference in base potential is (VIN/2) +1R+ / (R+ + (R2
/2)), the above equation (4) becomes as follows.

eXp ([((VIN/2) ・R+ / (R+ + (R2/2))
) -VT -1n5)/VT) -exp (((VIN/2) ・R+ / (R+ + (R2/2)))
/VT ) (exp (Jjn5)) -' Pa・I+ / (I2 15) -exp (((VIN/2)・Rr / (R+ + (R2/2))))
/VT)...(9) Similarly, (1315)/l4-exp (C(VI N/2)・
Rs / (R3+ (R2/2)))/VT)...
・(When the effective input signal VIN (AC component) is small (for example, VI
N = 0),) The base potentials of transistors Q23 to Q2B are all equal, and the flowing current is proportional to the emitter area, so I+ = 14 = Ie/12 I2- Is -5" I e/ 12 -
<It). Therefore, when the input signal VIN is small, the collector currents of Q23 and Q26 are small.

That is, gm is small. On the other hand, when VIN is large, 1+ / (1215)-exp (((Vt
N/2)・R+ / (R+ + (R2
/2)))/V■]...(Φ), so the influence of the exponential curve of the voltage-current characteristic of the transistor is more dominant than the emitter area ratio, and 'll becomes I2. Class AB operation is performed in which the gm increases proportionally.

Figure 6 (E) shows the output characteristics of the differential amplifier circuit in Figure 6 (A), where gm is large in the range (E) where the input signal voltage VIN is small, and gm is large in the range (F) where VIN is large. becomes smaller. Therefore, in the range of F, the transistor Q23,
By increasing gm by passing more current through Q2a, the linear operating range is expanded as a whole.

According to the example of the differential amplifier circuit shown in FIG. 6(A), a linear operating range approximately 2n times larger than that of the basic differential amplifier circuit shown in FIG. 13 can be obtained. In this way, the above-described differential amplifier circuit achieves both linearity and high transconductance Gm with a one-stage configuration.

The integrating circuit shown in FIG. 6(B) has a resistor 59 for compensating phase characteristics connected in parallel to the capacitor 45 in the above-described integrating circuit shown in FIG. 6(A). Further, the resistor 59 is provided with a dividing point 59a that divides its resistance value into two, and a load (sixth In the figure (B), a bias voltage source 61 is connected to both ends of the collector current sources 43, 44) in order to prevent a DC voltage drop from occurring. The bias voltage source 61 and resistor 59 stabilize the direct current potential of the load in the integrating circuit, resulting in a fully differential configuration, and appropriate phase compensation is performed to improve frequency characteristics.

The integrator circuit in FIG. 6(C) uses the collector current sources 43 and 44 in the integrator circuit in FIG. 6(A) as pnp).
This is a more specific configuration using transistors Q29 and Qao.

In addition, FIG. 6(D) shows that the collector current sources 43 and 44 in the integrating circuit of FIG. 6(A) are constructed using resistors 62 and 63 of a more limited value, thereby obtaining the effect of improving frequency characteristics. This is how it was done.

The above-mentioned integrating circuit shown in FIG. 6(D) cancels the phase delay of the second pole by advancing the phase by making the DC gain finite, and corrects the frequency shift where the gain becomes OdB. Can be done.

Now, as an example, consider the case of configuring a bandpass filter with center frequencies fo and Q-2n. Comparing the band characteristics of the passband with the ideal case without the second pole, and limiting the deviation of the characteristics to within +2 dB, the frequency of the second pole of the integrating circuit should be set to 2n0 times or more of the center frequency fo. must meet strict conditions.

However, even if the frequency of the second pole is, for example, 50 times the center frequency fo, there is a method of making the band characteristics within +1 dB. This is achieved by setting the DC gain to 50.
It is possible to completely correct the frequency shift where the gain becomes OdB. However, since the frequency of the second pole is determined by the characteristics of the element, the DC gain must be set to exactly cancel out the frequency.

The collector current sources in FIG. 6(C) described above are connected to p
np) In an integrating circuit configured using transistors Q29 and Qao, the DC gain is determined by the earth voltage of the transistors, so it cannot be adjusted freely, but the collector current in Figure 6 (D) When the source is constructed using a resistor, the resistance value can be set relatively freely within the IC chip, so it is very effective in this respect. In particular, when configuring a filter with a high Q, it is difficult to control the Q.
Effective.

In addition, the sixth
The circuit shown in FIG. 6(D) can be combined with the connection of the phase characteristic compensation resistor 59 and the bias voltage source 61 shown in FIG. 6(B).

The active filter shown in FIG. 5 is similar to the active filter shown in FIG.
) is used to configure a second-order biquad bandpass filter.

The coupling between the two integrating circuits 50a and 5Qb is such that the output terminal 64a of one integrating circuit 50a is connected to the other integrating circuit 50.
b, and one of the integrating circuits 50a
The output terminal 65a of the integrating circuit 50b is connected to the input terminal 46b of the other integrating circuit 50b. In addition, the other integrating circuit 50b
Each output terminal 64b, 65b of one integrating circuit 50a
are connected to the input terminals 46a and 47a, respectively.

In this way, the two integrating circuits 50a and 50b are connected to each other via emitter followers at their respective input and output stages.

Further, the input signal VIN is inputted by capacitance division by capacitance 66.67. Transistor Q3 +
Qa 2 , Qa 3 , and Qa4 each constitute a termination resistor.

Since the active filter of this embodiment is configured as described above, the sum of the output impedance of the emitter follower that connects the integrating circuits 50a and 150b, the base resistance of the transistor connected to the emitter follower, and the base resistance The time constant po with the emitter capacitance and the frequency fo of the second ball of the integrating circuit are relatively close values, and the frequency characteristics of the integrating circuit as a whole are determined by the value 0>2. ``The frequency characteristics of a differential amplifier circuit 1 are almost determined by the manufacturing process of the transistors that make up the circuit, and it is difficult to change this. However, since the above-mentioned time constant Po changes depending on the current value of the emitter follower, it is easy to control. Therefore, by controlling this current value, the canceling effect between the second ball and the DC gain can be controlled without changing the transconductance Gm of the entire differential circuit.

Furthermore, as mentioned above, some kind of Q control means is essential for a high Q filter, but by utilizing the above-mentioned effect, this can be easily achieved without adding a special Q control circuit. be able to.

Therefore, by adjusting the value of the resistor 62, 63 connected as a load of the differential amplifier circuit, the DC gain and the second ball are canceled out to a certain extent, and by further adjusting the current value of the emitter follower, It is possible to obtain a reliable counteracting effect and obtain critical performance. In the prior art shown in FIG. 16, signals are transferred between two integrating circuits using an emitter follower. Therefore, even if the current of the emitter follower is changed, the above-mentioned time constant po does not change. In contrast, in this embodiment, the overall frequency characteristics can be controlled simply by changing the current of the emitter follower. As described above, the active filter of this embodiment has the ability to control Q without requiring any special additional circuit, compared to the prior art.

In addition, in the integrating circuits (A), (B), (C), and (D) in FIG. 6, the signal transmission is fully differential with differential input and differential output, but single input It goes without saying that even a single output is advantageous because it has the various advantages mentioned above compared to the conventional technology.

Next, various modifications of the integrating circuit applied to the active filter of this embodiment will be explained using FIGS. 7 to 10.

FIG. 7 is a diagram showing a first modification of the integrating circuit. This modification is based on the resistor 62. in the circuit of FIG. 6(D).
A negative resistor is connected in parallel to the resistor 63, and the DC voltage drop of the resistor 62<63 is made small, thereby achieving a low voltage of the IC.

When the resistance value of each of the above-mentioned resistors 62 and 63 is R, the negative resistance is the two transistors Q of the differential amplifier circuit whose emitter degeneration is performed by the terminating resistor 68 of resistor 2R.
3 s and Qs e are configured by a positive feedback circuit in which the bases of each transistor are connected to the collectors of other transistors.

The equivalent combined resistance of resistance 62.63 and negative resistance is gm
Then, it is expressed by the following formula.

[-(1/gm+R) ・R] / (-(1/gm+R) 10R) -[R/ (1/gm)) [(1/gm)+R,) -R・(1+gm-R) -( 13), and the resistance value can be multiplied by (1+gm”R). Therefore, even if the DC voltage applied to the resistors 62 and 63 is reduced, the equivalent load resistance of the differential amplifier circuit cannot be increased. This allows the DC gain to be increased.

FIG. 8 shows a second modification of the integrating circuit. This modification example differs from the integrating circuit shown in FIG.
Diodes 71, 72, 73, and 74 are connected in series to the emitters of 24 SQ25 SQ2 e, respectively, and the linear input level range is expanded by about twice. Although one diode is used for each of the diodes in the figure, the range of linear human power level can be further expanded by connecting two or more diodes in series. However, since each diode produces a forward voltage drop of about 0.7 V, there is a limit to the number of diodes that can be connected in series for the purpose of lowering the voltage of the circuit.

FIG. 9 shows an example in which the integrating circuit shown in FIG. 7 is further generalized. n emitter-coupled transistor pairs PI
,Ul-P2,Ul,'',Pn.

The emitters of the 2n transistors having approximately equal emitter areas constituting Un are connected to a common current source C8, and P
The collector of n% U n is connected to the first and second output terminals OU.
connected to T, , 0UT2, respectively, PH, UIP2
, Ul, -Pn-1, and Un-1 are connected to the power supply terminal vCC.

Further, the drive means includes transistors 5IS2, . . .
5nSTI I2,...,Tn and current sources JI I2,...JnS as their emitter loads
11 I2,"' Transistors P, P2, .-Pn, which are composed of 2n emitter followers made of In and constitute an emitter-coupled transistor pair.
The base of Ul, Ul,"・,Un is connected to the transistor 5182,"'5 which is the output terminal of the emitter follower.
nSTl, I2, and "' are connected to the emitters of Tn, respectively.

Here, in the emitter follower, the transistor SI
S2,...5nST1, I2,...Tn have different emitter areas, or current source J+I
2,...' Jns I+ 12,"'The current values of In are different from each other. This causes emitter-coupled transistor pairs PI, U, P2, Ul,...
The DC voltages superimposed on the AC signals applied between the respective bases of PnSUn are made different.

In addition, the transistors SI S2,...Sn.

The bases of T, , I2, --..., Tn are resistors R2, R
It is connected to each voltage dividing point of the first voltage dividing means constituted by A2, . 1st
one end of the voltage dividing means is connected to the first input terminal IN,
One end of the second voltage dividing means is connected to the second input terminal IN2. This results in emitter-coupled transistor pair P,
, U, P2, U 2 ,... PnSUn
The alternating current signals applied between the respective bases are made to have the same phase, but have different amplitudes depending on the resistor voltage division point.

FIG. 10 shows a modification of the integrating circuit shown in FIG. 9 above.

In this modification, each transistor P constituting the emitter-coupled transistor pair for the integrating circuit shown in FIG.
P2,... Pn, UIU2,... Un's emitters are connected in series with diodes DI D2, respectively.
. The range of input levels can be further expanded by setting the number of series-connected diodes to two or more, as described above.

The integration circuits shown in FIGS. 9 and 10 above are composed of transistors PI
P2 ,”'PnSUl ,Ul ,=・U
As the number of n increases, the input signal level can be expanded, but gm decreases. However, instead of expanding the input level by expansion and compression as in the conventional technology, the noise level generated from the circuit does not change and only the input level can be expanded, which is advantageous in terms of S/N.

FIG. 11 shows a third embodiment of the invention.

This embodiment uses transistors Q37, Q38, Q39
SO2o SO21% Two integration circuits 60 each using a gain cell consisting of Q42 and a resistor 75176, etc.
A and 60b constitute a bandpass filter, and a resistor 22 for phase characteristic compensation is connected in parallel to the capacitor 7 in each integrating circuit 60a, 60b, and a load for obtaining a differential output (Fig. In this example, a bias voltage source 23 is connected to both ends of the collector current sources 77, 78) in order to prevent a DC voltage drop from occurring. In addition, the input signal VI
N is input by capacitance division by capacitance 28.29. Transistors Q43 and Q44 each constitute a termination resistor.

In the embodiment described above, in a bandpass filter using a gain cell, the DC potential of the load is stabilized, and all signal flows have a differential configuration, resulting in improved frequency characteristics.

FIG. 12 shows a fourth embodiment of the invention.

This embodiment uses transistors Q2, Q7 and Q+ having an emitter area ratio of 1=4, similar to that shown in the first embodiment.
, Qa, etc., to construct a differential amplifier circuit with improved linearity without an emitter follower. The two integration circuits 70a and 70b constructed from this differential amplifier circuit constitute an active filter, and each integration circuit 70a and 70b constitute an active filter.
Similar to the third embodiment, a resistor 22 for phase characteristic compensation is connected in parallel to the capacitance 7 at a and 70b, and a bias voltage source 23 is connected thereto.

The input signal VIN is input by capacitance division by capacitance 28.29. Further, 70c is a transistor Q4 e and Q4y with an emitter area ratio of 1=4 as above.
It shows a termination resistor composed of Q45, Q4e, and Q45.

In this embodiment, an active filter with improved frequency characteristics can be realized with an overall simple circuit configuration.

In addition, in the third and fourth embodiments described above, the signal exchange of the integrating circuit is fully differential with differential input and differential output.
It is also applicable to those with a single input and single output circuit configuration.

[Effects of the Invention] As explained above, according to the first invention, the differential amplifier circuit is constituted by a pair of first and second emitter-coupled transistors whose collector currents are each given an offset, and the emitter of the transistor is Since the offset collector currents are integrated to improve linearity without connecting a linearization resistor to the transconductance gm, the mutual conductance gm can be made variable. Also,
Since the integrating circuit is constituted by one stage of the above-mentioned differential amplifier circuit whose load is a capacitor, it is possible to improve the frequency characteristics and increase the transconductance Gm. Further, since no resistor is connected to the emitters of the transistors constituting the differential amplifier circuit, the transconductance Gm of the integrating circuit is inversely proportional to the absolute temperature. Therefore, the emitter current source is
By using a current whose current is proportional to the absolute temperature, the temperature dependence of the transconductance Gm can be canceled and the characteristics can be stabilized.

Further, according to the second to sixth inventions, the common first
In addition to the effects of the invention described above, the following effects can be obtained.

According to the second aspect of the invention, appropriate phase compensation can be performed using a simple circuit and frequency characteristics can be improved.

According to the third invention, the DC potential of the load resistor is stabilized, all signal flows are in a differential configuration, and the DC gain can be set to a desired value, thereby eliminating the influence of the second ball. This can be canceled out and the frequency characteristics can be further improved.

According to the fourth invention, since the load of the collector circuit for obtaining differential output in the differential amplifier circuit is a resistor or a parallel composite resistance of a resistor and a negative resistance, the power of the power supply can be reduced and the load of the collector circuit for obtaining a differential output can be reduced. Further improvement in frequency characteristics similar to that in the third invention can be obtained.

According to the fifth and sixth inventions, by adjusting the current of the emitter follower connected to the input stage of the integrating circuit, it is possible to control Q, thereby suppressing changes in Q due to parameters of constituent elements. Can be done.

According to the seventh invention, the differential amplifier circuit makes the emitter areas of the transistors used in the emitter-coupled transistor pair substantially equal, and superimposes different DC voltages on the AC signals applied to the bases of the transistors by the drive means. Since linearity is improved by giving an offset to the collector current, integrating the offset collector currents, and making this a differential output, the mutual conductance gm can be made variable. .

Moreover, since the integrating circuit is configured with one stage of the above-mentioned differential amplifier circuit whose load is a capacitor, it is possible to improve the frequency characteristics and increase the transconductance Gm. Further, since no resistor is connected to the emitters of the transistors constituting the differential amplifier circuit, the transconductance Gm of the integrating circuit is inversely proportional to the absolute temperature. Therefore, by using an emitter current source whose current is proportional to the absolute temperature, the temperature dependence of the transconductance Gm can be canceled and the characteristics can be stabilized.

Further, according to the eighth to twelfth inventions, in addition to the effects of the common seventh invention, the following effects can be obtained.

According to the eighth invention, appropriate phase compensation is performed using a simple circuit, and frequency characteristics are improved.

According to the ninth invention, the DC potential of the load resistor is stabilized, the signal flow becomes entirely differential, and the DC gain can be set to a desired value, thereby eliminating the influence of the second pole. This can be canceled out and the frequency characteristics can be further improved.

According to the tenth invention, the load of the collector circuit for obtaining a differential output in the differential amplifier circuit is a resistor or a parallel composite resistance of a resistor and a negative resistance. Further improvement in frequency characteristics similar to the invention of No. 9 can be obtained.

According to the eleventh and twelfth inventions, by adjusting the current of the emitter follower connected to the input stage of the integrating circuit,
Q can be controlled, and changes in Q due to parameters of constituent elements can be suppressed.

[Brief explanation of drawings]

1 to 4 show a first embodiment of an active filter according to the present invention. FIG. 1 is a circuit diagram showing the overall configuration, FIG. 2 is a circuit diagram showing an integrating circuit, and FIG. 3 is a circuit diagram showing an integral circuit. FIG. 4 is a circuit diagram showing a first modification of the integrating circuit, FIG. 4 is a circuit diagram showing a second modification of the integrating circuit, and FIGS. 5 to 10 also show a second embodiment of the invention. Figure 5 is a circuit diagram showing the overall configuration, Figure 6 is a diagram showing the circuit of the integrating circuit, etc., Figure 7 is a circuit diagram showing the first modified example of the integrating circuit, and Figure 8 is the second modified example of the integrating circuit. 9 is a circuit diagram showing an integrating circuit that is a generalized version of the circuit shown in FIG. 7, FIG. 10 is a circuit diagram showing an integrating circuit that is a generalized version of the circuit shown in FIG. FIG. 12 is a circuit diagram showing a third embodiment of the invention, FIG. 12 is a circuit diagram showing a fourth embodiment of the invention, FIG. 13 is a circuit diagram showing an integrating circuit for a conventional active filter configuration, and FIGS. FIG. 15 is a circuit diagram showing a half circuit of a differential amplifier circuit for explaining the operation of the conventional example, and FIG. 16 is a circuit diagram showing another conventional example. 7.45: Capacitance, 8.9.46.47: Input terminal of differential amplifier circuit, 10:
First emitter-coupled transistor pair, 2n: Second emitter-coupled transistor pair, 40: Emitter-coupled transistor pair, 15a, 15b, 53: Emitter current source, 16.17.
18.19.54.55.56.57: Emitter follower serving as drive means, 22.59: Resistor for phase characteristic compensation, 23.61: Bias voltage source, 6 et al. 24.25.62.63: Differential Load resistance for obtaining differential output in amplifier circuit, 26 a s 26 b 127 a s 27 b
% 64 a 564b, 65a, 65b: first and second output terminals, 30a, 30b, 50a, 50b: integrating circuit, 71.
72.73.74: Diode, Q3 s Q4 s
Q5SQe SQ23% Q24SQ25, Q28: Transistors forming an emitter-coupled transistor pair, Q l5Q2\Q7 % Qe % Q2 + Q2
25Q27, Q28Transistors forming the nidobe means, Q+s, Q+e, Q35, Q3e: Transistors forming a positive feedback circuit that becomes negative resistance.

Claims (12)

[Claims] (1) A first emitter-coupled transistor pair and a second emitter-coupled transistor pair are constructed using two transistors each having substantially the same emitter area, and the first collector of the first emitter-coupled transistor pair and the first collectors of a second pair of emitter-coupled transistors are commonly connected to a first output terminal; are commonly connected to a second output terminal, and a required level of offset between the first base of the first emitter-coupled transistor pair and the first base of the second emitter-coupled transistor pair. is connected to one input terminal, and the DC voltage is applied between the second base of the second emitter-coupled transistor pair and the second base of the first emitter-coupled transistor pair. A differential amplifier circuit is constituted by connecting to the other input terminal a means for applying a DC voltage that provides an offset of opposite polarity and the same level, and the first output terminal and the second output terminal in the differential amplifier circuit are connected to the other input terminal. An active filter characterized in that an integrating circuit is constructed by connecting a capacitor between the output terminal of the active filter and the output terminal of the active filter. (2) The first output terminal and the second output terminal in the differential amplifier circuit.
Claim 1 characterized in that a resistor for phase characteristic compensation is connected in parallel to the capacitor connected between the output terminal and the output terminal.
Active filter as described. (3) The load of the collector circuit for obtaining differential output in the differential amplifier circuit is a resistor, and a bias voltage source is connected to both ends of the resistor to prevent a DC voltage drop. The active filter according to claim 1 or 2. (4) The active filter according to claim 1, wherein the load of the collector circuit for obtaining the differential output in the differential amplifier circuit is a resistor or a parallel composite resistor of a resistor and a negative resistor. (5) The DC voltage applying means uses an output potential difference between two emitter followers using transistors having different emitter areas.
Active filter as described. (6) The active filter according to claim 1, wherein the DC voltage application means uses an output potential difference between two emitter followers having different collector currents. (7) n pairs (consisting of transistors with substantially equal emitter areas, with the collectors of one pair of emitter-coupled transistors connected to the first and second output terminals);
n is an integer greater than or equal to 2); and an emitter current source commonly connected to the emitters of all transistors constituting the n pairs of emitter-coupled transistors, either directly or through at least one diode. , from the input signal applied between the first and second input terminals,
drive means for generating n alternating current signals having the same phase and different amplitudes on which different direct current voltages are superimposed, and applying the n alternating current signals between the bases of the n pairs of emitter-coupled transistors, respectively; configuring a differential amplifier circuit, comprising an integrating circuit in which a capacitor is connected between the first output terminal and the second output terminal of the differential amplifier circuit;
An active filter configured using the integrating circuit. (8) The first output terminal and the second output terminal in the differential amplifier circuit.
Claim 7, characterized in that a resistor for phase characteristic compensation is connected in parallel to the capacitor connected between the output terminal and the output terminal.
Active filter as described. (9) The load of the collector circuit for obtaining differential output in the differential amplifier circuit is a resistor, and a bias voltage source is connected across the resistor to prevent a DC voltage drop. The active filter according to claim 7 or 8. (10) The active filter according to claim 7, wherein the load of the collector circuit for obtaining the differential output in the differential amplifier circuit is a resistor or a parallel composite resistor of a resistor and a negative resistor. (11) The drive means includes 2n emitter followers whose emitters are connected to the bases of the n pairs of emitter-coupled transistors, and among the 2n emitter followers, the n emitter-coupled transistors n whose emitter is connected to the base of one of the pairs
The emitter followers have different emitter areas or different collector currents, and the n
By making the emitter areas of the remaining n emitter followers whose emitters are connected to the bases of the other of the emitter-coupled transistor pairs similarly different from each other, or by making the collector currents similarly different from each other, 8. The active filter according to claim 7, wherein the DC voltages superimposed on the AC signals applied between the bases of each pair of emitter-coupled transistors are different. (12) The drive means is constituted by 2n emitter followers each having an emitter connected to the base of the n emitter-coupled transistor pairs, and of the 2n emitter followers, the emitter is connected to the n emitter-coupled transistor pairs. n connected to the base of one of the coupled transistor pair
The bases of the emitter followers are connected to respective voltage dividing points of a first voltage dividing means having n voltage dividing points connected to the first input terminal, and the emitters are connected to the n sets of emitter-coupled transistors. the remaining n connected to the other base of the pair
by connecting the bases of the emitter followers of the n sets of emitter-coupled transistors to each voltage dividing point of the second voltage dividing means having n voltage dividing points connected to the second input terminal. 8. The active filter according to claim 7, wherein the amplitudes of the alternating current signals applied between the bases of the pair are different.