JPS63193710A - Integration circuit - Google Patents

Abstract

PURPOSE:To obtain an integration circuit suitable for an IC forming filter, by providing a means which connects two resistors voltage-dividing an input signal to the transistor of an input, and also, controls the current value of a power source for supplying the emitter current of a differential amplifier. CONSTITUTION:By inputting the input signal to a differential pair after damping with a voltage divider with resistors R1 and R2, a resistance value which decides a time constant is designed to have the value of (R1+R2)/R2 times the emitter resistance. Therefore, it is possible to operate transistors Q1 and Q2 with the emitter current in which a frequency fT is always increased. Also, when dispersion in an IC forming capacitor C and the current values of current sources A1 and A2 are generated and an integration gain is changed, it is possible to obtain a desired integration gain by changing the emitter currents of the differential pairs Q1 and Q2 by controlling the controlled voltage V0 of a control terminal T2.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an integrator circuit that is a component of an active filter, and particularly relates to an integrator circuit that is a component of a filter that is suitable for IC implementation.

[Conventional technology]

When converting a circuit that includes a filter into an IC, how do you incorporate the filter inside the IC and reduce the number of external parts?
The important issue is whether to do so. Generally, when converting a filter into an IC, an active filter is used.
The cutoff frequency determined by those bands will vary.

(2) Since the resistance value and capacitance value of the capacitor cannot be made too large, it is difficult to create a device with a low cutoff frequency.

There are problems such as:

Incidentally, related devices of this type for solving the above-mentioned problems include, for example, Japanese Patent Laid-Open No. 55-45224 and Japanese Patent Laid-Open No. 55-45266.

[Problem that the invention seeks to solve]

The above-mentioned conventional technology does not take into consideration the high frequency performance of the transistor, and there is a problem in using it in a circuit that needs to process a high band signal.

In general, the trough frequency fT, which is an index indicating the high frequency performance of a transistor, changes as shown in FIG. 2 depending on the emitter current. In order to improve high frequency performance, the emitter current should be increased and used in a region where fT can be increased.

In this case, as will be described later, the capacitance value of the capacitor becomes large (and when integrated into an IC, the chip area increases).

An object of the present invention is to eliminate the above-mentioned problems and provide an integrating circuit suitable for an IC filter.

[Means for solving problems]

The present invention includes an amplifier that converts a signal voltage into a current and a load capacitor, and divides the signal voltage and supplies it to the amplifier.

In the present invention, two resistors for dividing the input signal are connected to the input transistor, and means for controlling the current value of the power source for supplying the emitter current of the differential amplifier is provided.

[Effect]

The present invention is composed of an amplifier that converts a signal voltage into a current and a load capacitor, and the signal voltage is divided and connected to the amplifier. When designing the integral gain of the integrating circuit with the transconductance lfm of the amplifier and the load capacitor, it is possible to design the capacitance value to be smaller by Ω. Therefore, it is suitable for IC implementation.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG.

In FIG. 1, the emitter of a transistor Q1 is connected to the emitter of a transistor Q2, and the emitter is connected to a variable current source A1, so that the transistors Q, ,
Q2 constitutes a differential pair. Further, the base of the transistor Q1 is connected to the input terminal T1 via the resistor R1, and the input signal voltage 1/L? L is applied, and a bias voltage VB+ is applied to the base of transistor Q2.

The collector of the transistor Q2 is connected to the variable current source A2 and to the load capacitor C whose other end is grounded, and obtains an output signal voltage from the output terminal T3. Variable current sources A1 and A2 are controlled by a signal at control terminal T2, and are controlled so as to maintain a relationship such that when the current value of current source A1 is Io, the current value 'tE of current source A2 is .

In such a configuration, the input voltage of terminal 1 is set to 5. and the output voltage of terminal T3 is set to 5. In addition, the alternating current flowing to the collector of transistor Q2 due to the input voltage is input to transistor Q1. If each emitter resistance of Q2 is re, then the following holds true and current Lz flows to capacitor C, resulting in output voltage! . get l. If the angular frequency of the signal is ω, then it becomes an S nira plus operator, and from equation (2), the transfer function H1(
S) shows that it is an integrating circuit. Also, emitter resistance r
g is the emitter current IlI! Determined by: Boltzmann constant T: Absolute temperature q: Expressed by electron charge, f at room temperature and emitter current 100 μA
, w 2soΩ.

Transistor 2717, which generally indicates the high frequency performance of a transistor.
The frequency fr is the emitter current 1. As a result, changes occur as shown in Figure 2. Therefore, in order to improve high frequency performance, the emitter current should be increased and the device should be used in a region where the frequency IT can be increased.

If the integral gain is determined by the emitter resistance r, it may not match the conditions for using a transistor with good high frequency performance as described above, and the performance may not be obtained. Therefore, in the present invention, by attenuating the input signal with a voltage divider formed by resistors R1 and R2 and inputting it to a differential pair, the design is made as shown in equation (4) (substantially time constant multiplication. Therefore, transistors Q1 and Q2 can be operated with an emitter current that always increases the frequency fT.

In addition, the capacitor capacitance C1 converted into an IC and the current source A
+, When the current value of A2 varies and the integral gain changes, by controlling the control voltage Va of the control terminal T2, the emitter current of the differential pair Q, Q2 is changed to obtain the desired integral gain. Obtainable.

In addition, the signal voltage input to the terminal T1 is divided by the resistors R<, R2 and applied to the differential pair Q, , Q2, so the actual input dynamic range can be expanded, and distortion and noise characteristics can be improved. can do.

FIG. 3 shows another embodiment of the invention. In FIG. 3, the same components as in FIG. 1 are designated by the same reference numerals. Figure 3 is the first
The difference from the diagram is that the variable current source A2 is connected to the collector of the diode-connected transistor Q4 for the PNP transistor pair QstQ4 that operates as a current mirror, and the collector of the other transistor Q5 is connected to the collector of the transistor Q2. That is what we are doing. In this configuration, by setting , the same operation as in FIG. 1 is obtained.

FIG. 4 shows another embodiment of the invention. In Figure 4,
Components that are the same as those in FIG. 1 are designated by the same reference numerals. The difference between FIG. 4 and FIG. 1 is that the collector of transistor Q2 is a pair of PNP transistors Qs and Q4 that operate as a current mirror.
The collector of one transistor Q4 is connected to the collector of the transistor Q4, and the collector of the transistor Q1 is connected to the other diode-connected transistor Q1. In this configuration, assuming that the current value of the current source A is IO, the DC operation of the transistor Q1 is the same as that shown in FIG.

On the other hand, the gain of the signal current flowing to the load capacitor is doubled by the transistors Qs and Q= which operate as current mirrors.

FIG. 5 shows another embodiment of the invention. In Figure 3,
The same components as in FIG. 1 are designated by the same reference numerals. The transistor Qs and the constant current source A5 constitute an emitter follower. The integrated output of the capacitor C is applied to the base of the transistor Q5, and taken out from the emitter via the terminal T4 as an output voltage 'two. On the other hand, it is also applied to the base of transistor Q2 via transistor Qs, forming a negative feedback loop.

Therefore, the transfer function H2(S) in FIG. 3 becomes, and becomes a low-pass filter with a cutoff frequency Wo.

In this case, the variation in capacitor C can be reduced by changing the emitter current of transistors Q1-Q2.
can be varied and set accurately. Furthermore, by reducing the values of the capacitor C1 and the emitter resistor rg, the cutoff frequency Wo can be lowered, so even if the filter has a low cutoff frequency, the capacitor C can be integrated into an IC, so the effect of IC implementation is great.

Further, FIG. 6 shows still another embodiment in which the integrator circuit of the present invention is a high-pass filter. In FIG. 1, the same components as in FIGS. 1 and 5 are designated by the same reference numerals. Input voltage'
Ln is applied to the load capacitor C via the terminal Ts.

The other end of capacitor C is connected to the collector of transistor Q2.

The base of transistor Q1 is connected to bias voltage VB3. Therefore, the transfer function H3(S) in FIG. 6 is expressed as follows, indicating a high-pass filter. It is clear that the same effect as the embodiment shown in FIG. 5 can be obtained.

A biquadratic filter shown in FIG. 7 is a more general application of the integrating circuit. In Figure 7, G+, G
2 is an integrating circuit, and the integral gains are G1 and G2, respectively. Also Gs, G4. Gs represents a coefficient circuit that provides constants o, b, and α that respectively determine the magnitude of the input terminal num. Input voltage n is applied to terminal T6, and output voltage ngJ- appears at terminal T7. The transfer function E(4(s)) of the circuit shown in FIG. 5 is expressed by the following, and various filters such as low-pass, high-pass, and band-pass filters can be constructed depending on the values of α, b, and a.

Figure 8 shows the coefficients α, b, and c in Figure 7 as α-
An embodiment of the present invention will be shown in which a low-pass filter is configured such that o, b-=o, a-1. In FIG. 8, the number of transistors in the circuit corresponding to the integrating circuit G1 in FIG. 7 is 1.
The transistors corresponding to the 00s and G2 are numbered 200s, and the two digits are transistor pairs 101 and 102.
and 201 and 202 emitter current control circuits.

Here Rhos-R205-X Rh.

, and transistors Q+oz and Q+o3. And the collector currents of C205 and C202 are equal.

Therefore, the transfer function Hs(S) of the circuit shown in FIG. 8 is as follows, and exhibits a second-order low-pass characteristic.

Here R1o+-Rloa Rloz-Rlos, R
2o1-R2oaR202-R2O3. It is clear that the effect of the present invention is the same in the embodiment shown in FIG. 8 as in the other embodiments.

FIG. 9 shows another embodiment of the present invention. In Figure 9,
Components that are the same as those in FIG. 8 are designated by the same reference numerals. Figure 9 is the 8th figure.
The difference from the diagram is that the collector of transistor Q+o2 is Q
Connected to the collector of +o6 and the emitter of Q+o4 and Q
The collector of +H is connected, the collector of transistor 202 is connected to the collector of C204, and the emitter of C2o a and the collector of Q+os are connected. Transistor Q+oa and C2
The base of 07 is connected to the bias voltage VB+olC. Transistor Q+o6. The effect of Q+o7 is C
7゜2. This is provided to increase the drive impedance of C2°, and the substantial operation is the same as that in FIG.

〔Effect of the invention〕

According to the present invention, it is possible to operate a transistor with an emitter current in an operating region with the best high frequency characteristics, and to select an arbitrary value for the integral gain. Furthermore, since a filter having a cutoff at a low frequency can be configured with a small capacitance, it is effective for IC implementation.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a characteristic diagram showing the high frequency characteristics of a transistor, Figs.
5 and 6 are circuit diagrams showing other embodiments, FIG. 7 is a block diagram showing a general biquadratic filter, and FIGS. 8 and 9.
The figure is a circuit diagram showing still another embodiment. T1...Input terminal, T2...Control terminal, Ts...Output terminal, R1, R2...Resistance for voltage division. High/Old Ke 2 Kyou Ume 3.21 OJ” Earth S Layer No. 40 So. 7 lolame8i ¥1 easy de bad

Claims (1)

[Claims] 1. First and second transistors constituting a first differential pair, a current source that supplies emitter current of the first differential pair transistors, and a load capacitor connected to the collector of the second transistor. and input signal voltage dividing means;
an integrating circuit comprising means for supplying the output of the voltage dividing means to the base of the first transistor, and obtaining an integrated output of the input signal voltage as a terminal voltage of the load capacitor; The input signal voltage dividing means includes a first resistor connected in series between the signal input terminal and the first transistor. , an integrating circuit comprising a first transistor and a second resistor connected to a tributary ground potential.