JPS6184908A - Bias circuit in high frequency circuit - Google Patents

Abstract

PURPOSE:To stabilize a bias voltage by constituting the post-stage filter with an emitter follower transistor (TR) whose base and emitter are connected between a filter output terminal of the 1st stage and a bias output terminal and with a capacitor connected to said emitter. CONSTITUTION:A TRQ1 of emitter follower connection is used in place of a resistor constituting a post-stage LPF together with a capacitor C2. Through the constitution above, in viewing the post-stage filter circuit from the 1st stage LPF circuit comprising a diode D and a resistor R1 and a capacitor C1 connected in series therewith, the input impedance is very high, resulting that the time constant is very large. Since a base-emitter voltage of the TRQ1 is not so much changed even when a bias current iB changes largely, a bias voltage outputted at a bias output terminal K is not almost changed.

Description

Detailed Description of the Invention (1) Technical Field The present invention relates to a bias circuit that supplies high-intensity voltage to a high-frequency circuit such as a high-frequency amplifier circuit, and particularly relates to a bias circuit that supplies high-intensity voltage to a high-frequency circuit such as a high-frequency amplifier circuit. This invention relates to improvements in bias circuits including low-pass filter circuits that remove noise.

(bl Prior Art and Its Disadvantages) In order to form a predetermined high-asuminum pressure in a high-frequency circuit such as a high-frequency amplifier circuit, the current supplied from a constant current source including a transistor or the like is converted to a voltage at -C, and the voltage is is obtained through a low-pass filter circuit.The current −
The voltage formed by voltage conversion is passed through a low-pass filter circuit to avoid wide-spectrum noise (thermal noise, shot M
This is to remove noise (caused by sound, etc.) and to provide a bias circuit to the high frequency signal to prevent noise from being mixed in. Fourth
The figure is a circuit diagram of a conventional bias circuit including a low-pass filter circuit using a CR time constant.

In the figure, a diode D is used to match the temperature coefficient of a high frequency circuit (not shown) connected to the bias output terminal K with the temperature coefficient of the bias circuit. Diode D, resistor R1 connected in series with this diode D
and capacitor CI constitute a first-stage low-pass filter circuit. The resistor R1 acts as a filter element and performs current-to-voltage conversion on the current i flowing from the current source -[,.

Resistor R2 and capacitor C2 constitute a low-pass filter circuit at the subsequent stage. In this circuit, a current source ■ is connected to the resistor R1. When a current i flows into the capacitor C1, a bias voltage is formed across the capacitor C1, noise is removed by a two-stage low-pass filter circuit, and a bias voltage is output to the terminal K.

However, in the above-mentioned bias circuit, when the bias current i changes greatly, the voltage drop across the resistor R2 also changes greatly, and the bias voltage supplied to the terminal K has a problem of extremely large fluctuations. Furthermore, if the resistor R2 is made small in order to minimize this variation, the effect of the filter circuit at the subsequent stage will be weakened, resulting in the disadvantage that sufficient filter characteristics cannot be obtained.

(C) Purpose of the Invention The purpose of the present invention is to provide a high-frequency circuit that can increase the CR time constant of the low-pass filter circuit in the subsequent stage with a simple configuration, and can output a stable bias voltage even when the bias current changes greatly. An object of the present invention is to provide a bias circuit for

fd1 Structure and Effects of the Invention The present invention is based on a second stage filter circuit between a first stage filter output terminal and a bias output terminal.

An emitter follower transistor with an emitter connected,
It is characterized in that it is constructed with a capacitor ' connected to the emitter of this transistor.

According to this invention, by configuring as described above,
Because it is only necessary to use a transistor in place of the resistor R in the conventional CR time constant circuit, a large CR time constant can be achieved without complicating the circuit configuration, and the bias voltage can be stabilized. can be realized.

te+ Embodiment FIG. 1 is a circuit diagram of a bias circuit according to an embodiment of the present invention. The difference in configuration from the conventional bias circuit shown in FIG. 4 is that the resistor R2 in the filter circuit at the subsequent stage is replaced with a transistor Ql connected in an emitter follower manner. . With each of these configurations, when looking from the first-stage filter circuit to the subsequent-stage filter circuit, the input impedance becomes extremely high, and as a result, the time constant becomes extremely thick (also, the bias current 18 changes greatly). Since the base-emitter voltage V of transistor Q1 does not change to that extent, the bias voltage appearing at terminal K hardly changes.Figure 2 shows the case where the above bias circuit is connected to a differential amplifier. An example of the circuit is shown.

FIG. 3 is a diagram showing an example of application of the present invention. The difference from the embodiment of the present invention shown in FIG. 1 is that the emitter follower transistor Q1 is connected with a constant current. - Replaced with Noshigon type MO, Sl-transistor Q2. In this circuit, the impedance becomes extremely large because the transistor Q2 operates at a constant current. Furthermore, since the current is constant, the bias current In does not change significantly, and as a result, almost no voltage fluctuation occurs. Note that a pinch resistor that operates at a constant current may be used in place of the MOS transistor Q2.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a bias circuit according to an embodiment of the present invention. FIG. 2 is a diagram showing an example of a circuit when the same bias circuit is connected to a differential amplifier. Further, FIG. 3 shows an application example of the present invention 7, and FIG. 4 shows a circuit diagram of a conventional bias circuit. R1', C1-first stage low-pass filter circuit, Ql, C
2-A stage low-pass filter circuit, Ql-emitter follower transistor.

Claims (1)

[Claims] (1) In a bias circuit in a high frequency circuit that converts a current controlled by a semiconductor element into a voltage and outputs the voltage as a bias voltage through a low-pass filter circuit with a CR time constant connected in two stages, the filter circuit in the subsequent stage is 1. A bias circuit for a high frequency circuit, comprising an emitter follower transistor whose base and emitter are connected between a first-stage filter output terminal and a bias output terminal, and a capacitor connected to the emitter of this transistor.