JPH04351107A - Piezoelectric oscillator and its manufacture - Google Patents

Piezoelectric oscillator and its manufacture

Info

Publication number
JPH04351107A
JPH04351107A JP12585691A JP12585691A JPH04351107A JP H04351107 A JPH04351107 A JP H04351107A JP 12585691 A JP12585691 A JP 12585691A JP 12585691 A JP12585691 A JP 12585691A JP H04351107 A JPH04351107 A JP H04351107A
Authority
JP
Japan
Prior art keywords
lead terminal
cut
resin
piezoelectric oscillator
input lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12585691A
Other languages
Japanese (ja)
Other versions
JP3151853B2 (en
Inventor
Kenji Tsuchido
健次 土戸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP12585691A priority Critical patent/JP3151853B2/en
Publication of JPH04351107A publication Critical patent/JPH04351107A/en
Application granted granted Critical
Publication of JP3151853B2 publication Critical patent/JP3151853B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Oscillators With Electromechanical Resonators (AREA)

Abstract

PURPOSE:To suppress the increase in terminal number due to the addition of the adjustment function by inputting an electric signal to a signal input lead terminal prolonged to the outside from the piezoelectric oscillator and cutting-off the input lead terminal. CONSTITUTION:A VDD lead terminal 27 and an output lead terminal 26 connecting electrically to a semiconductor element 21 are connected by a dam bar 35 prolonged from an outer ridge 25 to an outer ridge 26 and a lead terminal 30 and a VSS lead terminal 29 are connected by other dam bar 36. After sealing, the dam bars 35, 36 are cut off, the lead terminals 31, 32 are cut off from the ridge of a resin 23 and data control and data input lead terminals 33, 34 are cut off from the ridge of the outer ridge 26. Then the frequency adjustment is implemented by applying a prescribed power supply voltage between the VDD lead terminal 27 and the VSS lead terminal 29, after the frequency adjustment, the data control lead terminal 33 and the data input lead terminal 34 are cut off from the ridge of the resin 23. Thus, the presence of the undesired lead terminal is eliminated.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は封止後に調整のできる圧
電発振器及びその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a piezoelectric oscillator that can be adjusted after being sealed and a method for manufacturing the same.

【0002】0002

【従来の技術】従来の圧電発振器は図4に示すように、
半導体素子71をダイパッド70に固着し、金属細線(
本例ではAuワイヤー72)により実装時に外部接続さ
れるリード端子77〜79及び、後にパッケージの縁よ
り切断されるリード端子81、82と電気的接続される
。圧電振動子(本例では水晶振動子64)は前記半導体
素子71と電気的接続され、後にパッケージの縁より切
断されるリード端子81、82と溶接等により電気的接
続され、前記半導体素子71、前記Auワイヤー72、
前記水晶振動子64及び前記リード端子77〜82の一
部を残して樹脂73により封止し、ダムバー85、86
及び前記リード端子81、82と外縁部75間を切断し
ていた。
[Prior Art] A conventional piezoelectric oscillator, as shown in FIG.
The semiconductor element 71 is fixed to the die pad 70, and a thin metal wire (
In this example, electrical connections are made by Au wires 72) to lead terminals 77 to 79 that are externally connected during mounting, and to lead terminals 81 and 82 that are later cut from the edge of the package. A piezoelectric vibrator (crystal vibrator 64 in this example) is electrically connected to the semiconductor element 71, and is electrically connected by welding or the like to lead terminals 81 and 82 which are later cut from the edge of the package. the Au wire 72;
A portion of the crystal resonator 64 and the lead terminals 77 to 82 are sealed with resin 73, and dam bars 85 and 86 are sealed.
Also, the lead terminals 81, 82 and the outer edge portion 75 were cut.

【0003】0003

【発明が解決しようとする課題】しかし、前述の従来技
術では、圧電発振器の性能を良くする為に半導体素子へ
データを入力して実装工程内で調整する際、例えば周波
数調整を行い前記圧電発振器の高精度化を図る場合、そ
れに伴って外部接続されるリード端子を増加させなけれ
ばならず、ユーザーにとって不用なリード端子を圧電発
振器に付加しなければならないという問題点を有し、し
かも、ユーザーがこのような圧電発振器を使用する場合
、基板のピンホール増加、配線の制約等、ユーザーの基
板設計上での規制ができてしまうという問題点も有して
いた。
[Problems to be Solved by the Invention] However, in the prior art described above, when inputting data to a semiconductor element and adjusting it during the mounting process in order to improve the performance of the piezoelectric oscillator, for example, frequency adjustment is performed to improve the performance of the piezoelectric oscillator. In order to improve the accuracy of the piezoelectric oscillator, the number of externally connected lead terminals must be increased accordingly, and lead terminals that are unnecessary for the user must be added to the piezoelectric oscillator. However, when using such a piezoelectric oscillator, there are also problems in that the user is subject to restrictions on board design, such as an increase in pinholes on the board and restrictions on wiring.

【0004】そこで本発明は、圧電発振器に調整機能を
付加した半導体素子を搭載しても、従来と同端子数であ
り、互換性のある圧電発振器を提供することを目的とす
る。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a piezoelectric oscillator which has the same number of terminals as the conventional piezoelectric oscillator and is compatible even when a semiconductor element with an adjustment function is mounted on the piezoelectric oscillator.

【0005】[0005]

【課題を解決するための手段】本発明の圧電発振器は、
少なくとも半導体素子と圧電振動子を有し、樹脂により
封止される圧電発振器において、前記半導体素子と電気
的接続され、前記圧電振動子と電気的接続されない信号
入力用リード端子を有し、前記信号入力用リード端子の
端面が前記樹脂の端面に露出していることを特徴とする
[Means for Solving the Problems] The piezoelectric oscillator of the present invention has the following features:
A piezoelectric oscillator that includes at least a semiconductor element and a piezoelectric vibrator and is sealed with resin, the piezoelectric oscillator having a signal input lead terminal that is electrically connected to the semiconductor element and not electrically connected to the piezoelectric vibrator; The end face of the input lead terminal is exposed to the end face of the resin.

【0006】本発明の圧電発振器の製造方法は、樹脂に
よる封止後、外部接続されるリード端子間のダムバーの
切断、及びリードフレームの外縁部から延びる信号入力
用リード端子を前記外縁部の縁から切断する工程と、少
なくとも前記信号入力用リード端子へ電気的信号を入力
する工程と、前記信号入力用リード端子を前記樹脂の縁
から切断する工程とからなることを特徴とする。
The method for manufacturing a piezoelectric oscillator of the present invention includes cutting a dam bar between externally connected lead terminals after sealing with a resin, and connecting a signal input lead terminal extending from an outer edge of a lead frame to an edge of the outer edge. A step of inputting an electrical signal to at least the signal input lead terminal, and a step of cutting the signal input lead terminal from the edge of the resin.

【0007】本発明の圧電発振器の製造方法は、前記信
号入力用リード端子にダムバーを設け、前記ダムバーは
外部接続される前記リード端子間のダムバー切断時に切
断されることを特徴とする。
The method of manufacturing a piezoelectric oscillator according to the present invention is characterized in that a dam bar is provided on the signal input lead terminal, and the dam bar is cut when the dam bar is cut between the externally connected lead terminals.

【0008】[0008]

【実施例】本発明の圧電発振器を水晶発振器を例に図面
を用いて詳細に説明する。尚、以下に第一の実施例とし
て半導体素子に周波数調整機能を付加した場合について
説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A piezoelectric oscillator according to the present invention will be explained in detail using a crystal oscillator as an example with reference to the drawings. Note that, as a first embodiment, a case will be described below in which a frequency adjustment function is added to a semiconductor element.

【0009】図2の(a)は本発明の水晶発振器の第一
の実施例を示すブロック回路図であり、図2の(b)は
発振回路及び容量アレイを示す回路図である。図2の(
a)において点線内は半導体素子を示す。発振回路1は
水晶振動子14と電気的接続され、前記発振回路1の出
力は、分周回路2により分周され、分周選択回路3によ
り選択された所定の分周出力となり、出力部4へ伝送さ
れる。以下に半導体素子に付加した周波数調整回路につ
いて説明する。データ処理回路7はデータ入力端子13
にシリアルで入力されたデータをパラレルのデータに変
換し、前記パラレルのデータをデータ制御回路6へ伝送
する。前記データ制御回路6は前記データ処理回路7か
らのデータを周波数調整時及び分周選択時には容量アレ
イ5及び前記分周選択回路3へ伝送し、記憶時にはPR
OM回路8へ伝送し、そして通常時は、前記PROM回
路8で記憶されたデータを前記容量アレイ5及び前記分
周選択回路3へ伝送する。前記容量アレイ5は、片側を
前記発振回路1のインバータ15の入力側と接続された
コンデンサと片側を接地したトランジスタを直列接続し
、それらを複数個並列接続し、複数の前記トランジスタ
のゲートは前記データ制御回路6からのデータによりO
NまたはOFFする。
FIG. 2(a) is a block circuit diagram showing a first embodiment of the crystal oscillator of the present invention, and FIG. 2(b) is a circuit diagram showing an oscillation circuit and a capacitor array. In Figure 2 (
In a), the dotted line indicates a semiconductor element. The oscillation circuit 1 is electrically connected to a crystal oscillator 14, and the output of the oscillation circuit 1 is frequency-divided by a frequency division circuit 2 to become a predetermined frequency-divided output selected by a frequency division selection circuit 3, and output to an output section 4. transmitted to. The frequency adjustment circuit added to the semiconductor element will be explained below. The data processing circuit 7 has a data input terminal 13
Converts serially input data into parallel data, and transmits the parallel data to the data control circuit 6. The data control circuit 6 transmits data from the data processing circuit 7 to the capacitor array 5 and the frequency division selection circuit 3 during frequency adjustment and frequency division selection, and transmits the data from the data processing circuit 7 to the capacitor array 5 and the frequency division selection circuit 3 during storage.
The data stored in the PROM circuit 8 is then transmitted to the capacitor array 5 and the frequency division selection circuit 3 during normal operation. The capacitor array 5 has a capacitor whose one side is connected to the input side of the inverter 15 of the oscillation circuit 1 and a transistor whose one side is grounded, which are connected in series, and a plurality of them are connected in parallel, and the gates of the plurality of transistors are connected to the input side of the inverter 15 of the oscillation circuit 1. O due to data from data control circuit 6
N or OFF.

【0010】図1は以上の水晶発振器の実装の一実施例
を示す平面図である。尚、本例における信号入力用リー
ド端子はデータ制御用リード端子33とデータ入力用リ
ード端子34を示す。ダイパッド20に半導体素子21
を固着させ、金属細線(本例ではAuワイヤー22)に
よるワイヤーボンディング接続等により実装時に外部接
続されるリード端子27〜29、及び、後にパッケージ
の縁より切断されるリード端子31〜34と電気的接続
する。水晶振動子14は前記半導体素子21と電気的接
続され、後にパッケージの縁より切断されるリード端子
31、32と溶接等により電気的接続及び機械的接続さ
れ、前記半導体素子21、前記Auワイヤー22、前記
水晶振動子14及び前記リード端子27〜34の一部を
残してモールド剤等の樹脂23により封止する。この時
、前記樹脂23の外に出るリード端子は、VDD用リー
ド端子27、VSS用リード端子29、出力用リード端
子28、リード端子30、データ制御回路を制御するデ
ータ制御用リード端子33、データ入力用リード端子3
4及び水晶振動子14と電気的接続された前記リード端
子31、32となり、前記データ制御用リード端子33
及び前記データ入力用リード端子34は、それぞれ前記
樹脂23の近傍及び外縁部26の近傍は後に切断しやす
いように細く、前記樹脂23の近傍と前記外縁部26の
近傍の間は、ピンプローブ等による電気的接続がしやす
いように太くなっている。水晶発振器の長手方向から延
びる各リード端子、つまり前記リード端子31、32及
び前記データ入力用リード端子34、及び前記データ制
御用リード端子33はそれぞれ外縁部25、26と接続
されている。また前記VDD用リード端子27及び前記
出力用リード端子28は前記外縁部25からもう一方の
前記外縁部26まで延びるダムバー35(図中点線で示
す)により連結され、前記リード端子30及び前記VS
S用リード端子29はもう一方のダムバー36(図中点
線で示す)により連結されている。封止後、前記ダムバ
ー35、36を切断し、前記リード端子31、32は前
記樹脂23の縁から切断され、前記データ制御用リード
端子33及び前記データ入力用リード端子34は前記外
縁部26の縁から切断される。(図中一点鎖線で示す)
その後、周波数調整を前記VDD用リード端子27、前
記VSS用リード端子29間に所定の電源電圧を加え、
前記出力用リード端子28から出力される発振周波数に
より前記データ制御用リード端子33及び前記データ入
力用リード端子34へ所定の信号を入力し、周波数調整
を行う。 周波数調整後、前記データ制御用リード端子33及び前
記データ入力用リード端子34を前記樹脂23の縁から
切断する。よって、本例における水晶発振器はユーザー
にとって不用なリード端子が存在せず、従来の水晶発振
器と同端子数のものとなる。
FIG. 1 is a plan view showing an example of mounting the above crystal oscillator. Note that the signal input lead terminals in this example include a data control lead terminal 33 and a data input lead terminal 34. Semiconductor element 21 on die pad 20
The lead terminals 27 to 29, which are externally connected during mounting by wire bonding connection using thin metal wires (Au wire 22 in this example), and the lead terminals 31 to 34, which are later cut from the edge of the package, are electrically connected. Connecting. The crystal resonator 14 is electrically connected to the semiconductor element 21 and electrically and mechanically connected by welding or the like to lead terminals 31 and 32 which are later cut from the edge of the package. , the crystal oscillator 14 and the lead terminals 27 to 34 are partially sealed with a resin 23 such as a molding agent. At this time, the lead terminals coming out of the resin 23 are a VDD lead terminal 27, a VSS lead terminal 29, an output lead terminal 28, a lead terminal 30, a data control lead terminal 33 for controlling the data control circuit, and a data control lead terminal 33 for controlling the data control circuit. Input lead terminal 3
The lead terminals 31 and 32 are electrically connected to the crystal resonator 14 and the data control lead terminal 33.
The data input lead terminal 34 is thin in the vicinity of the resin 23 and in the vicinity of the outer edge 26 so that it can be easily cut later, and a pin probe or the like is provided between the vicinity of the resin 23 and the outer edge 26. It is thicker to make it easier to make electrical connections. Each lead terminal extending from the longitudinal direction of the crystal oscillator, that is, the lead terminals 31 and 32, the data input lead terminal 34, and the data control lead terminal 33 are connected to the outer edge portions 25 and 26, respectively. Further, the VDD lead terminal 27 and the output lead terminal 28 are connected by a dam bar 35 (shown by a dotted line in the figure) extending from the outer edge 25 to the other outer edge 26, and the lead terminal 30 and the VS
The S lead terminal 29 is connected by the other dam bar 36 (indicated by a dotted line in the figure). After sealing, the dam bars 35 and 36 are cut, the lead terminals 31 and 32 are cut from the edge of the resin 23, and the data control lead terminal 33 and the data input lead terminal 34 are cut from the outer edge 26. cut off from the edge. (Indicated by the dashed-dotted line in the figure)
Thereafter, frequency adjustment is performed by applying a predetermined power supply voltage between the VDD lead terminal 27 and the VSS lead terminal 29.
Based on the oscillation frequency output from the output lead terminal 28, a predetermined signal is input to the data control lead terminal 33 and the data input lead terminal 34 to adjust the frequency. After frequency adjustment, the data control lead terminal 33 and the data input lead terminal 34 are cut from the edge of the resin 23. Therefore, the crystal oscillator in this example does not have lead terminals that are unnecessary for the user, and has the same number of terminals as the conventional crystal oscillator.

【0011】尚、第二の実施例として図3に示すように
、樹脂58の近傍に信号入力用リード端子59、60か
ら外縁部61と平行して延びるダムバー57を設けるこ
とにより、前記信号入力用リード端子59、60の太い
部分に前記樹脂58のしみ出し、及びバリ等が付着する
ということがなく、検査時等のピンプローブ等による電
気的接続において導通不良が発生しなくなる。
As a second embodiment, as shown in FIG. 3, a dam bar 57 is provided in the vicinity of the resin 58 and extends from the signal input lead terminals 59 and 60 in parallel with the outer edge 61. The resin 58 does not seep out or burrs or the like adhere to the thick portions of the lead terminals 59 and 60, and conductivity failures do not occur during electrical connection using pin probes or the like during inspection.

【0012】0012

【発明の効果】以上述べたように、半導体素子と電気的
接続され、圧電発振器から外側へ延びる信号入力用リー
ド端子へ電気的信号を入力し、その後、前記入力用リー
ド端子を切断することにより、半導体素子に調整機能等
を付加しても従来と同端子数であり、ユーザーにとって
不用な端子を設けることなく、前記圧電発振器の使用上
の規制を行う必要もなくなる。
As described above, by inputting an electrical signal to the signal input lead terminal that is electrically connected to the semiconductor element and extending outward from the piezoelectric oscillator, and then cutting the input lead terminal, Even if an adjustment function or the like is added to the semiconductor element, the number of terminals is the same as that of the conventional device, and there is no need to provide unnecessary terminals for the user, and there is no need to regulate the use of the piezoelectric oscillator.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の第一の実施例を示す平面図。FIG. 1 is a plan view showing a first embodiment of the present invention.

【図2】(a)は図1の電子回路を示す回路ブロック図
。 (b)は図2の(a)の発振回路と容量アレイを示す回
路図。
FIG. 2(a) is a circuit block diagram showing the electronic circuit of FIG. 1; (b) is a circuit diagram showing the oscillation circuit and capacitor array of FIG. 2(a).

【図3】本発明の第二の実施例を示す平面図。FIG. 3 is a plan view showing a second embodiment of the invention.

【図4】従来の圧電発振器を示す平面図。FIG. 4 is a plan view showing a conventional piezoelectric oscillator.

【符号の説明】[Explanation of symbols]

20  ダイパッド 21  半導体素子 22  Auワイヤー 23  樹脂 25、26  外縁部 27〜32  リード端子 33  データ制御用リード端子 34  データ入力用リード端子 35、36  ダムバー 20 Die pad 21 Semiconductor element 22 Au wire 23 Resin 25, 26 Outer edge 27-32 Lead terminal 33 Lead terminal for data control 34 Lead terminal for data input 35, 36 Dam Bar

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】少なくとも半導体素子と圧電振動子を有し
、樹脂により封止される圧電発振器において、前記半導
体素子と電気的接続され、前記圧電振動子と電気的接続
されない信号入力用リード端子を有し、前記信号入力用
リード端子の端面が前記樹脂パッケージの端面に露出し
ていることを特徴とする圧電発振器。
1. A piezoelectric oscillator that includes at least a semiconductor element and a piezoelectric vibrator and is sealed with a resin, wherein a signal input lead terminal is electrically connected to the semiconductor element and not electrically connected to the piezoelectric vibrator. A piezoelectric oscillator comprising: an end surface of the signal input lead terminal exposed at an end surface of the resin package.
【請求項2】樹脂による封止後、外部接続されるリード
端子間のダムバーの切断、及びリードフレームの外縁部
から延びる信号入力用リード端子を前記外縁部の縁から
切断する工程と、少なくとも前記信号入力用リード端子
へ電気的信号を入力する工程と、前記信号入力用リード
端子を前記樹脂の縁から切断する工程とからなることを
特徴とする請求項1記載の圧電発振器の製造方法。
2. After sealing with resin, cutting a dam bar between externally connected lead terminals, and cutting a signal input lead terminal extending from the outer edge of the lead frame from the edge of the outer edge; 2. The method of manufacturing a piezoelectric oscillator according to claim 1, comprising the steps of: inputting an electrical signal to the signal input lead terminal; and cutting the signal input lead terminal from the edge of the resin.
【請求項3】前記信号入力用リード端子にダムバーを設
け、前記ダムバーは外部接続される前記リード端子間の
ダムバー切断時に切断されることを特徴とする請求項2
記載の圧電発振器の製造方法。
3. The signal input lead terminal is provided with a dam bar, and the dam bar is cut when the dam bar is cut between the lead terminals connected externally.
A method of manufacturing the piezoelectric oscillator described.
JP12585691A 1991-05-29 1991-05-29 Manufacturing method of piezoelectric oscillator Expired - Fee Related JP3151853B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12585691A JP3151853B2 (en) 1991-05-29 1991-05-29 Manufacturing method of piezoelectric oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12585691A JP3151853B2 (en) 1991-05-29 1991-05-29 Manufacturing method of piezoelectric oscillator

Publications (2)

Publication Number Publication Date
JPH04351107A true JPH04351107A (en) 1992-12-04
JP3151853B2 JP3151853B2 (en) 2001-04-03

Family

ID=14920638

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12585691A Expired - Fee Related JP3151853B2 (en) 1991-05-29 1991-05-29 Manufacturing method of piezoelectric oscillator

Country Status (1)

Country Link
JP (1) JP3151853B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6081164A (en) * 1997-01-09 2000-06-27 Seiko Epson Corporation PLL oscillator package and production method thereof
US6154095A (en) * 1997-02-27 2000-11-28 Seiko Epson Corporation Phase locked loop clock source provided with a plurality of frequency adjustments

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6081164A (en) * 1997-01-09 2000-06-27 Seiko Epson Corporation PLL oscillator package and production method thereof
US6154095A (en) * 1997-02-27 2000-11-28 Seiko Epson Corporation Phase locked loop clock source provided with a plurality of frequency adjustments
US6337600B1 (en) 1997-02-27 2002-01-08 Seiko Epson Corporation Oscillator and oscillation frequency setting method for the oscillator

Also Published As

Publication number Publication date
JP3151853B2 (en) 2001-04-03

Similar Documents

Publication Publication Date Title
US5745012A (en) Voltage-controlled oscillator having a semiconductor integrated circuit, a piezoelectrics resonator and a diode and variable-capacitance diode
JPH041503B2 (en)
CN1083626A (en) Installable clock oscillator assembly in surface and the method for making this assembly
JPH10510973A (en) Functionally differentiated temperature compensated crystal oscillator and method of manufacturing the same
JPH04351107A (en) Piezoelectric oscillator and its manufacture
JPH11284441A (en) Manufacture of temperature compensated crystal oscillator
JP2541475B2 (en) Resin mold type semiconductor device
JP3289461B2 (en) Voltage controlled oscillator and method of manufacturing the same
JP3079786B2 (en) Piezoelectric oscillator, real-time clock and PLL oscillator using the same
JPS62139347A (en) Metal lead frame for packaging resin-sealed type semiconductor
JPH05145340A (en) Semiconductor and piezoelectric oscillator
JPH11340405A (en) Lead frame, semiconductor device and manufacture thereof
JP2869998B2 (en) Piezoelectric oscillator
JP2605756B2 (en) Piezoelectric oscillator
JP3359845B2 (en) Oscillation circuit and method of manufacturing the same
JPH05121618A (en) Lead frame for semiconductor device and manufacture thereof
JP3192238B2 (en) Method of assembling semiconductor device
JPH07111271A (en) High power field-effect transistor
JPS58142551A (en) Resin sealed semiconductor device
JP2995901B2 (en) Semiconductor device and piezoelectric oscillator using the same
JP4319426B2 (en) Semiconductor device and manufacturing method thereof
JPH0637234A (en) Semiconductor device
JPH04335705A (en) Oscillation circuit
JP2945488B2 (en) Lead frame and semiconductor device burn-in method
JPH04298070A (en) Semiconductor process

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090126

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100126

Year of fee payment: 9

LAPS Cancellation because of no payment of annual fees