JPH04335705A - Oscillation circuit - Google Patents

Abstract

PURPOSE:To make the oscillation of a piezoelectric vibrator stable by decreasing a common impedance of a power supply line of an oscillation section and an oscillation output buffer section. CONSTITUTION:A VDD pad 8 and a VSS pad 9 are provided to an oscillation section comprising an inverter 1, a feedback resistor 2, a gate capacitor 3, a drain capacitor 4 and a piezoelectric vibrator 5. A VDD pad 13 and a VSS pad 14 are provided to an oscillation buffer section comprising an oscillation buffer 10 and an output buffer 11. The VDD and VSS pads of the oscillation section and the VDD and VSS. pads of the oscillation output buffer section are provided separately independently as stated above so as to decrease the common impedance of a power supply line of the oscillation section and the oscillation buffer section.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillation circuit incorporating a semiconductor integrated circuit.

0002

2. Description of the Related Art FIG. 4 is a circuit diagram showing a conventional oscillation circuit.

In the figure, 101 is an inverter;
2 is a feedback resistor connected to the gate and drain of the inverter 101. Reference numeral 103 denotes a gate capacitor, one electrode of which is connected to the gate of the inverter 101, and the other electrode connected to VSS and grounded at high frequency. 104
is a drain capacitance with one electrode connected to the drain of the inverter 101 and the other electrode connected to VSS. 10
A piezoelectric vibrator 5 is connected to the gate and drain of the inverter 101. At this time, the drain side is connected via a drain pad 106 and the gate side is connected via a gate pad 107 by wire bonding or the like. 110
is an oscillation buffer that amplifies the oscillation signal oscillated by the inverter 101. 111 is an output buffer that further amplifies the oscillation signal amplified by the oscillation buffer 110 and outputs it to the outside. Reference numeral 112 denotes an output pad, which is connected to the lead frame of the package by wire bonding or the like, and outputs a signal to the outside. Reference numeral 108 denotes a VDD pad, which is connected to the inverter 101, oscillation buffer 110, and output buffer 111 by a VDD line, and is also connected to the VDD lead of the package by wire bonding or the like. Reference numeral 109 denotes a VSS pad, which is connected to the inverter 101, oscillation buffer 110, and output buffer 111 by a VSS line, and is also connected to the VSS lead of the package by wire bonding or the like. 115 is a portion of the above circuit that is implemented as an IC. FIG. 5 is a mounting diagram showing a conventional oscillation circuit mounting method. A piezoelectric vibrator 105 is connected to a drain pad 106 and a gate pad 107. 115 is an IC, and 120 is an IC stage. 121 is a VDD lead of the package, which is connected to the VDD pad 108 of the IC 115 by wire bonding. Similarly, 123 is connected to the VSS pad 109 through the VSS lead. Reference numeral 125 is an output lead connected to the output pad 112.

0004

Problems to be Solved by the Invention In the conventional oscillation circuit described above, the inverter 101 and the oscillation buffer 110
V that supplies power to three circuits: and output buffer 111
Since the DD pad and VSS pad are common, the VDD and VSS wiring from the pad to the package side becomes a common impedance when viewed from the three circuits, resulting in unstable power supply and unstable circuit operation. There is. Specifically, the power supply ripple generated by the current consumed by the output buffer enters the power supply line of the inverter, causing the power supply voltage to have ripples and the inversion level of the inverter to fluctuate, resulting in unstable operation. This means that the output buffer and inverter are electrically integrated via the power supply line. In this case, the power supply line acts as a feedback circuit that feeds back signals from the output to the input for the amplifier circuit from the inverter to the output buffer, and therefore an oscillation loop is formed, which may cause unnecessary oscillations that are not related to the piezoelectric vibrator. Furthermore, in recent years there has been an increasing demand for higher frequencies in oscillation circuits, but in the high frequency range, even the impedance of bonding wires can no longer be ignored and has become a bottleneck in increasing the frequency.

Therefore, the present invention aims to reduce electrical integration via a power supply line between an inverter that oscillates a piezoelectric vibrator and an output buffer, stabilize the power supply, and stabilize the oscillation operation of the piezoelectric vibrator. The purpose is

[0006]

[Means for Solving the Problems] In order to achieve the above object, the oscillation circuit of the present invention includes an oscillation section and an oscillation output buffer section for amplifying the output of the oscillation section.
The oscillation circuit is such that at least one of a VDD pad and a VSS pad that supply power to the oscillation section and the oscillation output buffer section are separated and independent.

[0007]

[Operation] VDD pad or V of the oscillation section and oscillation output section
Since the SS pad or both the VDD and VSS pads are separated and independent, the common impedance of the power supply line of the oscillation section and the oscillation output section is reduced, electrical coupling is eliminated, and the oscillation operation of the oscillation section is stabilized.

[0008]

[Examples] Examples of the present invention will be described below. FIG. 1 is a circuit diagram showing a first embodiment of the present invention, in which 1 is an inverter and 2 is a feedback resistor connected to the gate and drain of the inverter 1. In FIG. 3 is a gate capacitor, one electrode of which is connected to the gate of the inverter 1, and the other electrode connected to VSS or VDD for high frequency grounding. In FIG. 1, the VSS side is grounded. Reference numeral 4 denotes a drain capacitor, one electrode of which is connected to the drain of the inverter 1, and the other electrode of the drain capacitor 4, similarly to the gate capacitor 3, is grounded at high frequency. 5 is a piezoelectric vibrator connected to the gate and drain of the inverter 1. At this time, the drain side is connected via the drain pad 6, and the gate side is connected via the gate pad 7 by wire bonding or the like. The oscillation section is configured from the above. An oscillation buffer 10 amplifies the oscillation signal oscillated by the inverter 1. Reference numeral 11 denotes an output buffer that further amplifies the oscillation signal amplified by the oscillation buffer 10 and outputs it to the outside. Although the oscillation buffer 10 and the output buffer 11 after the oscillation section are the oscillation output buffer section, the number of gates may be other than the two gates in this example. Reference numeral 12 denotes an output pad, which is connected to the lead frame of the package by wire bonding or the like, and outputs an oscillation signal to the outside. 8 is a VDD pad of the oscillation stage, which supplies VDD power to the oscillation section mainly including the inverter 1. 9 is the VSS pad of the oscillation stage, which is connected to the inverter 1, gate capacitor 3, and drain capacitor 4.
VSS power is supplied to the oscillation section mainly from the high frequency ground terminal of the oscillator. Reference numeral 13 denotes a VDD pad of the oscillation output buffer section, which supplies VDD power to the oscillation output buffer section composed of the oscillation buffer 10 and the output buffer 11. Reference numeral 14 denotes a VSS pad of the oscillation output buffer section, which supplies VSS power to the oscillation output buffer section composed of the oscillation buffer 10 and the output buffer 11. As mentioned above, the VD of the oscillation section
The D pad and the VDD pad of the oscillation output buffer section are separated and independent. Further, the VSS pad of the oscillation section and the VSS pad of the oscillation output buffer section are separated and independent. 15 in Figure 1
indicates the range that has been integrated into an IC. The pads such as the VDD pad and VSS pad described above exist on the surface of the IC and are terminals for connection to wiring such as a lead frame outside the IC by wire bonding or the like. FIG. 2 is a diagram showing the implementation of the oscillation circuit described above. 5 is a piezoelectric vibrator, and 15 is an IC. 6, 7
are a drain pad and a gate pad, respectively, and are connected to the piezoelectric vibrator 5 by wire bonding. Reference numeral 12 denotes an output pad, which is connected to the output lead 25. 8 is the VDD pad of the oscillation section, 9 is the VDD pad of the oscillation output buffer section, and each is connected to the VDD pad by wire bonding separately.
It is connected to the DD lead 26. 9 is the VSS pad of the oscillation section, 14 is the VSS pad of the oscillation output buffer section, and each is connected to the VSS lead 2 by wire bonding separately.
Connected to 7. Reference numeral 20 indicates an area in which the oscillation circuit described above is sealed, and is an area packaged with metal, resin, ceramic, or the like.

In the above oscillation circuit, the VDD pad and VSS pad that supply power to the oscillation section and the oscillation output buffer section are separated and independent, and the connections to the VDD lead and VSS lead by wire bonding are also made separately. Therefore, the power supply impedance (common impedance) that the oscillation section and the oscillation output section have in common becomes extremely small. Therefore, there is no electrical coupling between the oscillation section and the oscillation output buffer section via the power supply line, and the power supply to each circuit becomes stable, allowing each circuit to operate stably. In particular, the oscillation section and the oscillation output buffer section are feedback-coupled via the power supply line to form an oscillation loop, thereby eliminating abnormal oscillations that are not related to the piezoelectric vibrator, and thereby stably oscillating the piezoelectric vibrator.

Next, a second embodiment will be explained based on FIG. 3. Figure 3 is an implementation diagram of the oscillation circuit, and the difference from Figure 2 is that V
The DD lead and VSS lead are also separate and independent. 21 is a VDD lead of the oscillation section, which is connected to the VDD pad of the oscillation section by wire bonding. 22 is a VDD lead of the oscillation output buffer section, which is connected to the VDD pad 13 of the oscillation output buffer section. 2
3 is a VSS lead of the oscillation section, which is connected to the VSS pad 9 of the oscillation section. 24 is VSS of the oscillation output buffer section
Lead, VSS pad 14 of the oscillation output buffer section
connected to. The other details are the same as those described in FIG.

According to the second embodiment described above, the VD
Since the D lead and the VSS lead are also separated and independent, the common impedance is negligibly small, making the operation of the oscillation circuit more stable.

In this embodiment, an oscillation circuit in which both the VDD pad and the VSS pad are separated and independent is explained.
It is effective even if only the D pad or only the VSS pad is used. In addition, in this embodiment, the VDD lead and the VS
Although the explanation has been made using an oscillation circuit in which both the S leads are separated and independent, the effect can be obtained even if only the VDD lead or only the VSS lead is used. In addition, in this embodiment, the connection between the IC and the outside of the IC was explained using wire bonding, but TA
A similar effect can be obtained even with a face-down method such as B.

[0013]

[Effects of the Invention] According to the present invention, the VDD pad and the VSS
By separating at least one of the pads for the oscillation section and the oscillation output buffer, the common impedance of the power supply line for the oscillation section and the oscillation output buffer section becomes extremely small. Since there is no electrical coupling between the two, each circuit can operate stably. In particular, abnormal oscillation caused by the oscillation section and the oscillation output buffer section being feedback-coupled via the power supply line to form an oscillation loop is eliminated, and the oscillation operation by the piezoelectric vibrator is stabilized. Further, the common impedance of the power supply lines of the oscillation section and the oscillation output buffer section is reduced, and since the power supply lines are thicker, the power supply impedance of each power supply line is also reduced, which is advantageous for high frequency operation. Furthermore, since the power supply line is thick, the current capacity of the power supply line is increased, making it suitable for oscillation circuits with large current consumption.

[Brief explanation of drawings]

FIG. 1 is an oscillation circuit diagram showing a first embodiment of the present invention.

FIG. 2 is an implementation diagram of an oscillation circuit showing a first embodiment of the present invention.

FIG. 3 is an implementation diagram of an oscillation circuit showing a second embodiment of the present invention.

FIG. 4 is an oscillation circuit diagram showing an example of a conventional oscillation circuit.

FIG. 5 is an implementation diagram of an oscillation circuit showing an example of a conventional oscillation circuit.

[Explanation of symbols]

1 Inverter 2 Feedback resistance 3 Gate capacitance 4 Drain capacitance 5 Piezoelectric vibrator 6 Drain pad 7 Gate pad 8 VDD pad of oscillation section 9 VSS pad of oscillation section 10 Oscillation buffer 11 Output buffer 12 Output pad 13 VDD pad of oscillation output buffer section 14 VSS pad of oscillation output buffer section 15 IC 20 Package range of oscillation circuit 21 VDD lead of oscillation section 22 VDD lead of oscillation output buffer section 23 VSS lead of oscillation section 24 VSS lead of oscillation output buffer section 25 Output lead 26 VDD lead 27 VSS lead

Claims (2)

[Claims] 1. In an oscillation circuit incorporating a semiconductor integrated circuit comprising at least an oscillation section and an oscillation output buffer section for amplifying the output of the oscillation section, one of VDD and VSS of the oscillation section and the oscillation output buffer section. , and an oscillation circuit characterized in that both of them incorporate a semiconductor integrated circuit having separate and independent pads. 2. In an oscillation circuit comprising at least an oscillation section and an oscillation output buffer section for amplifying the output of the oscillation section, one or both of VDD or VSS of the oscillation section and the oscillation output buffer section are separated, respectively. An oscillation circuit characterized by having independent package leads.