JPH04348592A - Manufacture of thin film circuit board - Google Patents
Manufacture of thin film circuit boardInfo
- Publication number
- JPH04348592A JPH04348592A JP12056091A JP12056091A JPH04348592A JP H04348592 A JPH04348592 A JP H04348592A JP 12056091 A JP12056091 A JP 12056091A JP 12056091 A JP12056091 A JP 12056091A JP H04348592 A JPH04348592 A JP H04348592A
- Authority
- JP
- Japan
- Prior art keywords
- film
- hole
- thin film
- thin
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 29
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000010408 film Substances 0.000 claims abstract description 63
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 20
- 238000005530 etching Methods 0.000 claims abstract description 4
- 239000010931 gold Substances 0.000 claims description 33
- 238000007747 plating Methods 0.000 claims description 24
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 16
- 239000000758 substrate Substances 0.000 claims description 15
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 13
- 229910052737 gold Inorganic materials 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 5
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract description 4
- 230000007547 defect Effects 0.000 abstract description 4
- 239000004020 conductor Substances 0.000 abstract description 3
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- DKNPRRRKHAEUMW-UHFFFAOYSA-N Iodine aqueous Chemical compound [K+].I[I-]I DKNPRRRKHAEUMW-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910001120 nichrome Inorganic materials 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
Description
【０００１】0001
【産業上の利用分野】本発明は薄膜回路基板の製造方法
に関し、特に貫通孔を通して表面回路と裏面回路とが接
続された薄膜回路基板の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film circuit board, and more particularly to a method of manufacturing a thin film circuit board in which a front surface circuit and a back surface circuit are connected through a through hole.
【０００２】0002
【従来の技術】貫通孔接続のなされた薄膜回路基板の製
作は、一般に次の様に行なわれていた。2. Description of the Related Art Thin film circuit boards with through-hole connections have generally been manufactured as follows.
【０００３】まず図２（ａ）に示すように、貫通孔２を
有した絶縁基板１Ａの表面及び裏面にＡｕ薄膜３を真空
蒸着法やスパッタリング法により被着させる。この表面
及び裏面への被着と同時に蒸着金属やスパッタリング金
属の回り込みを利用して貫通孔２の内壁へもＡｕ薄膜３
を被着させる。次に図２（ｂ）に示すように、金メッキ
法によりＡｕ薄膜３上に厚さ２〜５μｍのＡｕメッキ膜
４を形成する。First, as shown in FIG. 2A, an Au thin film 3 is deposited on the front and back surfaces of an insulating substrate 1A having a through hole 2 by vacuum evaporation or sputtering. At the same time as the Au thin film 3 is deposited on the front and back surfaces, it is also applied to the inner wall of the through hole 2 by utilizing the wraparound of the vapor-deposited metal or sputtered metal.
to be coated with. Next, as shown in FIG. 2(b), an Au plating film 4 having a thickness of 2 to 5 μm is formed on the Au thin film 3 by a gold plating method.
【０００４】次に図２（ｃ）に示すように、貫通孔２を
含む貫通孔近傍領域にホトレジスト膜７Ａを形成する。
次に図２（ｄ）に示すように、このホトレジスト膜７Ａ
をマスクとし絶縁基板１Ａの表面と裏面のＡｕ薄膜とＡ
ｕメッキ膜４をエッチングし、貫通孔接続のなされた薄
膜回路基板を完成させる。Next, as shown in FIG. 2(c), a photoresist film 7A is formed in a region near the through hole including the through hole 2. Then, as shown in FIG. Next, as shown in FIG. 2(d), this photoresist film 7A
using the Au thin film on the front and back surfaces of the insulating substrate 1A and A as a mask.
The U-plated film 4 is etched to complete a thin film circuit board with through-hole connections.
【０００５】[0005]
【発明が解決しようとする課題】上述した従来の薄膜回
路基板の製造方法においては、金メッキ膜を用いた導電
体パターン形成法として、一般に貫通孔の内壁もエッチ
ングされない様、ホトレジスト膜で保護する必要がある
ため、スピンナーによる塗布やホトレジスト液中に絶縁
基板をディッピングする方法により、ホトレジスト膜を
５μｍ以上の膜厚に形成する必要がある。しかしながら
、貫通孔の内壁はもちろん、貫通孔の角部ではホトレジ
スト膜が極端に薄くなりがちで、その結果、図２（ｄ）
に示すように、貫通孔の角部でＡｕメッキ膜４に欠損部
８が生じやすいという問題点があった。[Problems to be Solved by the Invention] In the above-mentioned conventional method for manufacturing thin film circuit boards, when forming a conductor pattern using a gold plating film, it is generally necessary to protect the inner walls of the through holes with a photoresist film so that they are not etched. Therefore, it is necessary to form a photoresist film with a thickness of 5 μm or more by coating with a spinner or dipping the insulating substrate in a photoresist solution. However, the photoresist film tends to be extremely thin not only on the inner wall of the through hole but also at the corners of the through hole, and as a result, as shown in FIG. 2(d)
As shown in FIG. 2, there was a problem in that defects 8 were likely to occur in the Au plating film 4 at the corners of the through holes.
【０００６】この問題点を解決するために従来、必要以
上に厚いホトレジスト膜の形成が試みられたが、ファイ
ンパターンが形成できないという問題点が生じた。また
貫通孔の角部に筆などによりホトレジスト液を塗ってホ
トレジスト膜を補強する方法がとられてきたが、膜形成
が不完全であるばかりでなく、多大の工数を必要とする
という問題点があった。In order to solve this problem, conventional attempts have been made to form a photoresist film that is thicker than necessary, but this has resulted in the problem that a fine pattern cannot be formed. In addition, a method has been used to reinforce the photoresist film by applying photoresist liquid to the corners of the through hole with a brush, but this method has the problems that not only is the film formation incomplete, but it also requires a large amount of man-hours. there were.
【０００７】[0007]
【課題を解決するための手段】本発明の薄膜回路基板の
製造方法は、貫通孔が設けられた絶縁基板の表面と裏面
に金の薄膜を形成する工程と、前記貫通孔を含む貫通孔
近傍領域を除いた領域にホトレジスト膜を形成したのち
この貫通孔近傍領域の前記金の薄膜上に厚い金メッキ膜
とニッケルメッキ膜とを順次形成する工程と、前記ホト
レジスト膜を除去したのち前記ニッケルメッキ膜をマス
クとし前記金の薄膜をエッチングして除去する工程と、
マスクとして用いた前記ニッケルメッキ膜を除去する工
程とを含むものである。[Means for Solving the Problems] The method of manufacturing a thin film circuit board of the present invention includes the steps of forming a thin gold film on the front and back surfaces of an insulating substrate provided with a through hole, and the steps of forming a thin film of gold on the front and back surfaces of an insulating substrate provided with a through hole, a step of forming a photoresist film in an area other than the area, and then sequentially forming a thick gold plating film and a nickel plating film on the thin gold film in the area near the through hole; etching and removing the gold thin film using as a mask;
The method includes a step of removing the nickel plating film used as a mask.
【０００８】[0008]
【実施例】次に本発明について図面を参照して説明する
。図１（ａ）〜（ｄ）は本発明の一実施例を説明するた
めの基板の断面図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIGS. 1(a) to 1(d) are cross-sectional views of a substrate for explaining one embodiment of the present invention.
【０００９】まず図１（ａ）に示すように、貫通孔２を
有するアルミナ基板１の表面と裏面に導電体層としてＡ
ｕ薄膜３を約０．３μｍの厚さにスパッタリング法によ
り別々に成膜する。この時、Ａｕ薄膜３のアルミナ基板
１との密着を強化するために、ＮｉＣｒ膜やＴｉ膜等を
介してＡｕ薄膜を成膜しても良い。この操作で貫通孔２
の側面にもＡｕ薄膜３が形成される。次でホトレジスト
膜を衆知の方法で塗布し、露光・現像処理を施し貫通孔
近傍領域を除いた領域にホトレジスト膜７を約８μｍの
厚さに形成する。First, as shown in FIG. 1(a), a conductive layer of A is formed on the front and back surfaces of an alumina substrate 1 having a through hole 2.
The u thin film 3 is separately formed to a thickness of about 0.3 μm by sputtering. At this time, in order to strengthen the adhesion of the Au thin film 3 to the alumina substrate 1, the Au thin film may be formed via a NiCr film, a Ti film, or the like. With this operation, the through hole 2
An Au thin film 3 is also formed on the side surface of the substrate. Next, a photoresist film 7 is applied by a well-known method and exposed and developed to form a photoresist film 7 with a thickness of about 8 μm in the area except for the area near the through hole.
【００１０】次に図１（ｂ）に示すように、このホトレ
ジスト膜７をマスクとして貫通孔近傍領域に金メッキ法
により厚さ約５μｍのＡｕメッキ膜４を形成し、続いて
その表面にＮｉメッキ膜５を約１〜２μｍの厚さに形成
する。Ａｕメッキ膜４は衆知の電解メッキを用いれば良
く、またＮｉメッキ膜５は無電解メッキ法により簡単に
形成できる。Next, as shown in FIG. 1(b), using this photoresist film 7 as a mask, an Au plating film 4 with a thickness of about 5 μm is formed in the area near the through hole by gold plating, and then Ni plating is applied to the surface of the Au plating film 4. The film 5 is formed to a thickness of approximately 1-2 μm. The Au plating film 4 can be formed by using well-known electrolytic plating, and the Ni plating film 5 can be easily formed by electroless plating.
【００１１】次に図１（ｃ）に示すように、ホトレジス
ト膜７を有機溶剤で除去した後、Ｎｉメッキ膜５をマス
クとしヨウ素とヨウ化カリウムの溶液でＡｕ薄膜３をエ
ッチング除去する。Next, as shown in FIG. 1C, after the photoresist film 7 is removed using an organic solvent, the Au thin film 3 is etched away using a solution of iodine and potassium iodide using the Ni plating film 5 as a mask.
【００１２】次に図１（ｄ）に示すように、Ａｕメッキ
膜４上のＮｉメッキ膜５を硝酸溶液で溶解することによ
り、表面と裏面が貫通孔部に於いてＡｕ膜で接続された
薄膜回路基板が得られる。Next, as shown in FIG. 1(d), by dissolving the Ni plating film 5 on the Au plating film 4 with a nitric acid solution, the front and back surfaces were connected by the Au film at the through hole. A thin film circuit board is obtained.
【００１３】[0013]
【発明の効果】以上説明したように本発明は、貫通孔を
有した絶縁基板の表面と裏面の両面からＡｕの薄膜を形
成し、貫通孔近傍領域以外をホトレジスト膜で被覆した
後、貫通孔近傍領域にＡｕメッキ膜を形成し、続いてＮ
ｉ膜を形成し、ホトレジスト膜を除去後、Ｎｉメッキ膜
をマスクとしてＡｕ薄膜をエッチング除去し、その後Ｎ
ｉメッキ膜を除去することにより、貫通孔の角部に欠損
のないＡｕメッキ膜による接続導体を有する薄膜回路基
板が得られる。Effects of the Invention As explained above, in the present invention, a thin film of Au is formed on both the front and back surfaces of an insulating substrate having a through hole, and after coating the area other than the area near the through hole with a photoresist film, An Au plating film is formed in the vicinity area, and then N
After forming the i film and removing the photoresist film, the Au thin film was removed by etching using the Ni plating film as a mask, and then the N
By removing the i-plated film, a thin film circuit board having connection conductors made of the Au-plated film without defects at the corners of the through holes can be obtained.
【図１】本発明の一実施例を説明するための絶縁基板の
断面図。FIG. 1 is a cross-sectional view of an insulating substrate for explaining one embodiment of the present invention.
【図２】従来の薄膜回路基板の製造方法を説明するため
の絶縁基板の断面図。FIG. 2 is a cross-sectional view of an insulating substrate for explaining a conventional thin film circuit board manufacturing method.
１ アルミナ基板 １Ａ 絶縁基板 ２ 貫通孔 ３ Ａｕ薄膜 ４ Ａｕメッキ膜 ５ Ｎｉメッキ膜 ７，７Ａ ホトレジスト膜 ８ 欠損部 1 Alumina substrate 1A Insulated board 2 Through hole 3 Au thin film 4 Au plating film 5 Ni plating film 7,7A Photoresist film 8 Defected part
Claims (1)
裏面に金の薄膜を形成する工程と、前記貫通孔を含む貫
通孔近傍領域を除いた領域にホトレジスト膜を形成した
のちこの貫通孔近傍領域の前記金の薄膜上に厚い金メッ
キ膜とニッケルメッキ膜とを順次形成する工程と、前記
ホトレジスト膜を除去したのち前記ニッケルメッキ膜を
マスクとし前記金の薄膜をエッチングして除去する工程
と、マスクとして用いた前記ニッケルメッキ膜を除去す
る工程とを含むことを特徴とする薄膜回路基板の製造方
法。1. A step of forming a thin gold film on the front and back surfaces of an insulating substrate provided with a through hole, and forming a photoresist film in an area including the through hole except for a region near the through hole, and then forming a gold thin film on the front and back surfaces of an insulating substrate provided with a through hole. a step of sequentially forming a thick gold plating film and a nickel plating film on the thin gold film in a nearby region; and a step of removing the thin gold film by etching using the nickel plating film as a mask after removing the photoresist film. A method for manufacturing a thin film circuit board, comprising the steps of: removing the nickel plating film used as a mask.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12056091A JPH04348592A (en) | 1991-05-27 | 1991-05-27 | Manufacture of thin film circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12056091A JPH04348592A (en) | 1991-05-27 | 1991-05-27 | Manufacture of thin film circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04348592A true JPH04348592A (en) | 1992-12-03 |
Family
ID=14789335
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12056091A Pending JPH04348592A (en) | 1991-05-27 | 1991-05-27 | Manufacture of thin film circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04348592A (en) |
-
1991
- 1991-05-27 JP JP12056091A patent/JPH04348592A/en active Pending
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