JPH01205495A - Manufacture of flexible printed circuit board - Google Patents
Manufacture of flexible printed circuit boardInfo
- Publication number
- JPH01205495A JPH01205495A JP2980688A JP2980688A JPH01205495A JP H01205495 A JPH01205495 A JP H01205495A JP 2980688 A JP2980688 A JP 2980688A JP 2980688 A JP2980688 A JP 2980688A JP H01205495 A JPH01205495 A JP H01205495A
- Authority
- JP
- Japan
- Prior art keywords
- film
- resist
- conductor circuit
- resist film
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 239000010408 film Substances 0.000 claims abstract description 92
- 239000004020 conductor Substances 0.000 claims abstract description 38
- 238000000034 method Methods 0.000 claims abstract description 36
- 239000002184 metal Substances 0.000 claims abstract description 31
- 229910052751 metal Inorganic materials 0.000 claims abstract description 31
- 239000010409 thin film Substances 0.000 claims abstract description 19
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 239000002985 plastic film Substances 0.000 claims abstract description 10
- 229920006255 plastic film Polymers 0.000 claims abstract description 10
- 238000005240 physical vapour deposition Methods 0.000 claims description 8
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims description 2
- 238000001704 evaporation Methods 0.000 abstract 1
- 150000002739 metals Chemical class 0.000 abstract 1
- 238000007493 shaping process Methods 0.000 abstract 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 8
- 238000005530 etching Methods 0.000 description 7
- 229920001721 polyimide Polymers 0.000 description 6
- 239000004642 Polyimide Substances 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 239000011889 copper foil Substances 0.000 description 4
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- -1 polyethylene terephthalate Polymers 0.000 description 3
- 229920000139 polyethylene terephthalate Polymers 0.000 description 3
- 239000005020 polyethylene terephthalate Substances 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910001369 Brass Inorganic materials 0.000 description 1
- 239000004952 Polyamide Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000010951 brass Substances 0.000 description 1
- 238000010924 continuous production Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007646 gravure printing Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- JBJWASZNUJCEKT-UHFFFAOYSA-M sodium;hydroxide;hydrate Chemical compound O.[OH-].[Na+] JBJWASZNUJCEKT-UHFFFAOYSA-M 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
- H05K3/046—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer
- H05K3/048—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer using a lift-off resist pattern or a release layer pattern
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、フレキシブルプリン１〜回路基板の製造方法
に関するもので、特に導体回路のエツジ部形状がシャー
プで、寸法精度が高い導体回路を有するフレキシブルプ
リント回路基板の製造方法に関するものである。Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a method for manufacturing a flexible printed circuit board 1 to a circuit board, and in particular has a conductive circuit with sharp edge shapes and high dimensional accuracy. The present invention relates to a method for manufacturing a flexible printed circuit board.
〔従来の技術］
近年エレクトロニクス分野でフレキシブルプリント回路
基板（ＦＰＣ）の需要が増大しており、高宏度配線を行
なう為、特に導体回路のエツジ部形状がシャープで、寸
法精度が高い導体回路を有するフレキシブルプリント回
路基板が要望されている。[Conventional technology] In recent years, demand for flexible printed circuit boards (FPC) has increased in the electronics field, and in order to perform high-conductance wiring, conductor circuits with sharp edge shapes and high dimensional accuracy are required. Flexible printed circuit boards are desired.
従来、この種のフレキシブルプリント回路基板の製造方
法としては、ポリエチレンテレフタレートフィルム、ポ
リイミドフィルム等に、接着剤を介して銅箔を張りつけ
る事により得られる銅張りフレキンプル基板、或いはス
パックリング法、イオンブレーティング法等の物理的蒸
着法により、前記フィルム表面に直接導体層を形成した
極薄銅箔フレキシブル基板」二に、（イ）スクリーン印
刷により必要回路部をエツチングレジストでマスキング
し、エツチング処理により回路を形成する方法、（ロ）
液状フォトレジスト、ドライフィルム等の写貫現像型レ
ジストを用いて必要回路部をマスキングし、エツチング
処理により回路を形成する方法等により製造されていた
。Conventionally, methods for manufacturing this type of flexible printed circuit board include copper-clad flexible printed circuit boards obtained by pasting copper foil onto polyethylene terephthalate film, polyimide film, etc. via adhesive, spackling method, and ion blating method. An ultra-thin copper foil flexible board on which a conductor layer is directly formed on the surface of the film using a physical vapor deposition method such as a physical vapor deposition method.Secondly, (a) masking the necessary circuit parts with an etching resist by screen printing, and etching the circuit by etching. How to form (b)
The circuits were manufactured by masking the necessary circuit portions using a photoresist such as liquid photoresist or dry film, and forming the circuits by etching.
然しながら、ごの様な工、ヂングによる導体回路形成で
は、レジスト下の回路も腐食（サイ１エツチ）され、更
に極薄銅箔フレキシブル基板ではエツチング処理の種類
によっては、フ゛ラスチック基材と極薄銅箔との密着性
を損なう恐れもあった。However, when forming conductor circuits by such processes and etching, the circuit under the resist is also corroded (side 1 etch), and in the case of ultra-thin copper foil flexible substrates, depending on the type of etching process, the ultra-thin and plastic substrate may be damaged. There was also a risk that the adhesion with the copper foil would be impaired.
本発明者等はこの様な問題点を解決する為鋭意検討を行
なった結果、エンチング工程を利用しない導体回路形成
方法、即ち第２図（ａ）に示す様に、基板となるプラス
チ・ンクフィルム１表面の導体回路パターン形成に不必
要な部分をレジスト２でコー１− Ｌ、しかる後前記基
板表面に物理的蒸着（ＰＶＤ）法により所望の金属を付
着せしめ、続いて第２図（ｂ）に示す様にレジス１−１
１りを剥離する事により、導体回路パターン４を形成す
るフレキソプルプリンｌ−回路基板の製造方法を開発し
て、先に特許出願を行なった（特開昭６１−１８９６２
２号参照）。The inventors of the present invention have conducted intensive studies to solve these problems, and have developed a method for forming conductive circuits that does not use an etching process, that is, as shown in FIG. 1. Parts unnecessary for forming a conductor circuit pattern on the surface of the substrate are coated with a resist 2, and then a desired metal is deposited on the surface of the substrate by physical vapor deposition (PVD), and then as shown in FIG. 2(b). Regis 1-1 as shown in
He developed a method for manufacturing a flexo-purpurin l-circuit board in which a conductor circuit pattern 4 is formed by peeling off the 1st layer, and filed a patent application (Japanese Patent Laid-Open No. 61-18962).
(See No. 2).
この方法によれば、エンチング工程が無くなる為、工、
チング時のサイ１工、チが無くなると共に、水洗工程等
も省略される為、工程の簡素化が図れ、更に連続生産が
可能になる等の利点も有していた。According to this method, there is no enching process, so
This method has the advantage of simplifying the process and making continuous production possible, as it eliminates the need for a die and a chip during chipping, and also eliminates the water washing process.
［発明が解決しようとする課題〕
然しながら木発明者等が提案した前記導体回路形成法で
は、マスクとなるレジスｌ−Ｈｙ、２上に付着形成され
た金属膜３と回路となるフィルム」二の金属膜（導体層
）４とが、蒸着粒子の回り込みにより連続となるという
欠点を有している事が見出された。即ちこの様にレジス
ト膜２上の金属膜３とフィルム上の金属膜４とが連続に
なると、アルカリ水７容ａ（ＮａＯＨ水７容液等）に浸
漬して、レジスト膜２の剥削処理を行なった際、得られ
る導体回路４のエツジ部に第２図（ｂ）に示す様な突起
を生して、回路のシャープ性が悪くなると言う問題点が
あった。更に剥離液が浸透しなくなり、レジスｌ−１１
Ａ２が全く剥離出来ない場合もあった。[Problems to be Solved by the Invention] However, in the method for forming a conductor circuit proposed by the inventors, the metal film 3 deposited on the resist l-Hy, 2 which becomes a mask and the film which becomes a circuit, It has been found that the metal film (conductor layer) 4 has a drawback in that it becomes continuous due to the wraparound of the vapor deposited particles. That is, when the metal film 3 on the resist film 2 and the metal film 4 on the film become continuous in this way, the resist film 2 is subjected to a stripping process by immersing it in 7 volumes a of alkaline water (7 volumes of NaOH water, etc.). When this process is carried out, there is a problem in that a protrusion as shown in FIG. 2(b) is formed on the edge portion of the resulting conductor circuit 4, and the sharpness of the circuit is deteriorated. Furthermore, the stripping solution no longer penetrates, and the resist l-11
In some cases, A2 could not be peeled off at all.
本発明は上記の点に鑑み鋭意検討の結果なされたもので
あり、その目的とするところは、導体回路のエツジ部形
状がシャープで、寸法精度が高い導体回路を有するフレ
キシブルプリント回路基板の製造方法を折伏する事であ
る。The present invention has been made as a result of intensive studies in view of the above points, and its purpose is to provide a method for manufacturing a flexible printed circuit board having a conductor circuit with sharp edge shapes and high dimensional accuracy. It is to shakubuku.
本発明者等は、プラスチックフィルム上に導体回路パタ
ーン形成に不必要な部分を覆う為に形成するレジスト膜
２の１模厚を、導体回路パターン形成の為に付着形成さ
セる金属薄膜４の膜厚の１０倍以上と大きくする事によ
って、レジスト膜２上の金属薄膜３とフィルム上の金属
薄膜４との連続化を回避する事が出来、従ってレジス１
−１１莫２を工１ｊ離した後にシャープなエツジ部を有
する導体回路が形成出来る事を見出して、本発明の完成
に到ったものである。The inventors of the present invention used a resist film 2 of one thickness, which is formed on a plastic film to cover unnecessary parts for forming a conductor circuit pattern, to cover a part of the metal thin film 4, which is deposited to form a conductor circuit pattern. By increasing the film thickness to 10 times or more, it is possible to avoid continuity between the metal thin film 3 on the resist film 2 and the metal thin film 4 on the film.
The present invention was completed by discovering that it is possible to form a conductor circuit having sharp edges after separating -11mm2 by 1j.
即ち本発明は、プラスチックフィルム基板表面の導体回
路パターン形成に不必要な部分をレジストでコートし、
しかる後前記基板表面に物理的蒸着法により所望の金属
を付着せしめ、続いてレジスト膜を剥離する事により導
体回路パターンを形成するフレキシブルプリント回路基
板の製造方法において、レジスト膜厚を、付着形成させ
る導体回路用金属薄膜の膜厚の１０倍以上とする事を特
徴とするフレキシブルプリント回路基板の製造方法であ
る。That is, the present invention coats parts of the surface of a plastic film substrate that are unnecessary for forming a conductor circuit pattern with a resist,
Thereafter, in a method for manufacturing a flexible printed circuit board, a desired metal is deposited on the surface of the substrate by a physical vapor deposition method, and then a conductive circuit pattern is formed by peeling off the resist film, in which a resist film thickness is formed by depositing the resist film. This is a method for manufacturing a flexible printed circuit board, characterized in that the film thickness is 10 times or more the thickness of a metal thin film for a conductor circuit.
本発明において、フィルム基板上に付着形成させる金属
薄膜４の膜厚に対するレジスト膜の膜厚（２）の比が１
０倍未満であると、レジスト膜２上の金属薄膜３とフィ
ルム上の金属薄膜４との連続化を完全に回避する事が出
来なく、従って工。In the present invention, the ratio of the thickness (2) of the resist film to the thickness of the metal thin film 4 deposited on the film substrate is 1.
If it is less than 0 times, it will not be possible to completely avoid continuity between the metal thin film 3 on the resist film 2 and the metal thin film 4 on the film, and therefore the process will be unworkable.
ジ部形状が充分にシャープな導体回路が形成出来ないの
で、前記金属ＦＡ膜の；膜厚に対するレジスト膜厚の比
は１０倍以上にする必要がある。又前記膜厚比の上限に
関しては特に限定は無いが、膜厚比が余り大きすぎると
、レジスト膜が不安定になると共に、導体層が付着形成
されにくくなるので、膜厚比は１５倍以下にする事が望
ましい。Since it is not possible to form a conductor circuit with a sufficiently sharp shape of the groove, the ratio of the resist film thickness to the film thickness of the metal FA film must be 10 times or more. There is no particular limitation on the upper limit of the film thickness ratio, but if the film thickness ratio is too large, the resist film becomes unstable and it becomes difficult to adhere and form the conductor layer, so the film thickness ratio should be 15 times or less. It is desirable to do so.
本発明Ｇこおけるプラスチックフィルムとしては、ポリ
エチレンテレフタレート、ポリイミド、ポリアミド、ポ
リカーボネート等を用いる事が出来る。As the plastic film in the present invention G, polyethylene terephthalate, polyimide, polyamide, polycarbonate, etc. can be used.
又レジストとしては、真空蒸着、スバソタリング等の物
理的蒸着法では、輻射熱等を受けて基板温度が高（なる
為、耐熱性の低いレジストでは、該レジストが熱融解し
てパターンが流れてしまったり、形成したレジスト膜を
剥離出来なくなったりする事があるので、耐タ、ノー性
のあるレジス）−１例えば写真現像型ポリイミド系レジ
スＩ−等を用いる事が望ましい。而して前記レジス１−
をプラスチックフィルム上の、導体回路パターン形成に
不必要な部分にコーティングする方法としては、グラビ
ア印刷、スクリーン印刷、又はロールコーク−、カーテ
ンコーター等を応用すると良い。In addition, when using physical vapor deposition methods such as vacuum evaporation and subsotering for resists, the substrate temperature increases due to radiant heat, etc., so if the resist has low heat resistance, the resist may melt and the pattern may flow. , the formed resist film may not be able to be peeled off, so it is desirable to use a photo-developable polyimide resist I-1, for example, a photo-developable polyimide resist. Therefore, the above-mentioned Regis 1-
As a method for coating parts of the plastic film that are unnecessary for forming a conductor circuit pattern, gravure printing, screen printing, roll caulking, curtain coater, etc. may be used.
次に本発明の実施態様を図面を用いて具体的に説明する
。Next, embodiments of the present invention will be specifically described using the drawings.
第１図（ａ）及び（ｂ）は本発明方法の一実施例を示す
断面説明図（（ａ）はレジスト膜剥則前、（ｂ）はレジ
スト膜剥離後）であって、］はブプラスチックィルム、
２はｍｌ熱性レジスト膜、３はレジスト膜上の金属薄膜
、４は回路となるフィルム」二の金属薄膜（導体層）で
ある。本発明方法においては、第１図（ａ）に示す様に
、レジスト膜２の厚さがレジス［・膜上の金属薄膜３並
びにフィルム上の金属薄膜４の厚さに比べて充分に厚い
ので、付着形成した金属薄膜３及び４が連続化しなく、
従ってレジスト膜剥離後は第１図（ｂ）に示す様なエツ
ジ部がシャープな導体Ｎ４が形成出来る。FIGS. 1(a) and 1(b) are cross-sectional explanatory diagrams showing one embodiment of the method of the present invention ((a) is before resist film peeling, (b) is after resist film peeling), and ] is a cross-sectional view showing one embodiment of the method of the present invention ((a) is before resist film peeling, (b) is after resist film peeling). plastic film,
2 is a ml thermal resist film, 3 is a metal thin film on the resist film, and 4 is a film serving as a circuit.'' 2 is a metal thin film (conductor layer). In the method of the present invention, as shown in FIG. 1(a), the thickness of the resist film 2 is sufficiently thicker than the thickness of the metal thin film 3 on the resist film and the metal thin film 4 on the film. , the deposited metal thin films 3 and 4 are not continuous,
Therefore, after the resist film is removed, a conductor N4 with sharp edges as shown in FIG. 1(b) can be formed.
（作用〕
本発明方法においては、プラスチックフィルム基板表面
の導体回路パターン形成に不必要な部分をレジストでコ
ートし、しかる後前記基板表面に物理的蒸着法により所
望の金属を付着せしめ、続いてレジスト膜を剥離する事
により導体回路パターンを形成するに際して、レジスト
膜の膜厚を、付着形成させる金属薄膜の膜厚より充分に
大きくとっであるので、マスクとなるレジスト股上に付
着形成された金属膜と導体回路となるフィルム上の金属
膜（導体層）とが連続化する事が無く、従ってレジスト
膜剥離後に、エツジ部がシャープな導体回路層が得られ
る。(Function) In the method of the present invention, parts of the surface of a plastic film substrate that are unnecessary for forming a conductor circuit pattern are coated with a resist, and then a desired metal is deposited on the surface of the substrate by physical vapor deposition, and then a resist is applied. When forming a conductive circuit pattern by peeling off the film, the thickness of the resist film is set to be sufficiently larger than the thickness of the metal thin film to be deposited, so that the metal film deposited on the top of the resist serving as a mask is There is no continuity between the metal film (conductor layer) on the film and the conductor circuit, and therefore, after the resist film is removed, a conductor circuit layer with sharp edges can be obtained.
〔実施例１〕
次に本発明を実施例により更に具体的に説明する。厚さ
５０ ／／ ｍのポリエチレンテレフタレートフィルム
（東し製、商品名ニルミラーＱＯ９０）上の回路不要部
分に、耐熱性レジスト（写真現像型ポリイミド系レジス
ト）を膜厚］、Ｏ／７ｍコー１−して乾燥硬化後、該フ
ィルムをスパッタリング装置内にセソトシ、充分排気後
、厚さｌ〃ｍの銅をスパッタリングにより（＝Ｊ着影形
成しめた（レジスト膜厚：銅薄膜層厚−１，０＋］）。[Example 1] Next, the present invention will be explained in more detail with reference to Examples. A heat-resistant resist (photo-developing type polyimide resist) was applied to the unnecessary parts of a 50 m thick polyethylene terephthalate film (manufactured by Toshi Co., Ltd., trade name Nilmirror QO90) with a film thickness of 0/7 m. After drying and curing, the film was placed in a sputtering device, and after sufficient evacuation, a copper film with a thickness of 1 m was formed by sputtering (= J shadow formation (resist film thickness: copper thin film layer thickness - 1, 0 +). ).
この様にして得られた第」図（ａ）に示す様な形状のザ
ンプルを、アルカリ水ン容液（水酸化ナトリウム）に２
分間浸漬して、レジスト膜を膨潤溶解させる事により、
該レジスト股上を剥離したところ、第１１Ｆ（ｂ）に示
す様な、エツジ部がシャープな導体層が得られた。The thus obtained sample having the shape shown in Figure 1(a) was immersed in an alkaline water solution (sodium hydroxide) for 2 hours.
By soaking the resist film for a minute and causing it to swell and dissolve,
When the resist crotch was peeled off, a conductor layer with sharp edges as shown in No. 11F(b) was obtained.
〔実施例２〕
ブラスチンクフィルムとして、厚さ５０μｍのポリイミ
ドフィルム（東しデュポン製、商品名二カプトン）を用
いた以外は実施例１と同様な方法でフレキシブルプリン
ｌ−回路基板を製造したところ、第１図（ｂ）に示す様
な、エツジ部がシャープな導体層が得られた。[Example 2] A flexible printed L-circuit board was manufactured in the same manner as in Example 1, except that a 50 μm thick polyimide film (manufactured by DuPont East, trade name: Nikapton) was used as the brass tink film. A conductor layer with sharp edges as shown in FIG. 1(b) was obtained.
、 〔比較例１〕
耐熱性レジストの膜厚を６μｍ（レジスト膜厚 銅薄膜
層厚−６：１）とした以外は実施例１と同様な方法でフ
レキシブルプリント回路基板を製造したところ、第２図
（ａ）に示す様に、レジスト膜上に付着形成された金属
膜３と導体回路となるフィルム」二の金属膜４とが部分
的に連続化しており、レジス１へ膜２の剥離処理を行な
って得られた導体回路４のエツジ部には第２図（ｂ）に
示す様な突起を生していて、回路のシャープ性が悪かっ
た。, [Comparative Example 1] A flexible printed circuit board was manufactured in the same manner as in Example 1 except that the film thickness of the heat-resistant resist was 6 μm (resist film thickness: copper thin film layer thickness - 6:1). As shown in Figure (a), the metal film 3 deposited on the resist film and the second metal film 4 forming the conductor circuit are partially continuous, and the film 2 is peeled off to the resist film 1. The edges of the conductive circuit 4 obtained by this process had protrusions as shown in FIG. 2(b), and the sharpness of the circuit was poor.
〔比較例２〕
耐熱性レジストの膜厚を３μｍ（レジスト膜厚・銅薄膜
層厚−３：１）とした以外は実施例１と同様な方法でフ
レキシブルプリント回路基板を製造しようとしたところ
、第３図（ａ）に示す様に、レジスト膜２上に付着形成
された金属膜３と導体回路となるフィルム上の金属膜４
とが完全に連続化していて、剥離液が浸透しなくなり、
レジスト膜上が剥離出来なかった。[Comparative Example 2] A flexible printed circuit board was manufactured in the same manner as in Example 1 except that the heat-resistant resist film thickness was 3 μm (resist film thickness/copper thin film layer thickness - 3:1). As shown in FIG. 3(a), the metal film 3 deposited on the resist film 2 and the metal film 4 on the film that will become a conductive circuit.
are completely continuous, and the stripping solution will not penetrate.
The top of the resist film could not be peeled off.
〔発明の効果］
本発明方法によれば、導体回路のエツジ部形状がシ中−
プで寸法精度が高い導体回路を持ったフレキシブルプリ
ン１−回路基板を得る事が出来るものであり、工業上顕
著な効果を奏するものである。[Effect of the invention] According to the method of the present invention, the shape of the edge portion of the conductor circuit is
It is possible to obtain a flexible printed circuit board having a conductor circuit with high dimensional accuracy by using a flexible printed circuit board, which has a remarkable industrial effect.
第１図（ａ）及び（ｂ）は本発明方法の一実施例を示す
断面説明図（（ａ）はレジスト膜剥離前、（ｂ）はレジ
スト膜剥離後）、第２図（ａ）、（１〕）及び第３Ｉｉ
ＩＵ（ａ）は従来の回路ｗ板製遣方法を示す断面説明図
（それぞれにおいて（ａ）はレジスト膜剥離前、（ｂ）
はレジスト膜剥離後）である。
］−プラスチックフィルム、２−耐熱性レジスト膜上膜
レジスト膜上の金属薄膜、４ 導体回路となるフィルム
」二の金属薄膜（導体層）。
特許出願人 古河電気工業株式会社
２耐熱性レジスト膜
（ａ） （ｂ）（ａ）
（ｂ）（ａ）
第３図1(a) and (b) are cross-sectional explanatory diagrams showing one embodiment of the method of the present invention ((a) is before resist film peeling, (b) is after resist film peeling), FIG. 2(a), (1) and 3rd Ii
IU (a) is a cross-sectional explanatory diagram showing the conventional circuit board manufacturing method (in each case, (a) is before resist film peeling, (b) is
is after the resist film is removed). ]-Plastic film, 2-Heat-resistant resist film upper film, metal thin film on the resist film, 4. Film that becomes a conductor circuit. Patent applicant Furukawa Electric Co., Ltd. 2 Heat-resistant resist film (a) (b) (a)
(b) (a) Figure 3
Claims (1)
に不必要な部分をレジストでコートし、しかる後前記基
板表面に物理的蒸着法により所望の金属を付着せしめ、
続いてレジスト膜を剥離する事によりプラスチックフィ
ルム基板表面に導体回路パターンを形成するフレキシブ
ルプリント回路基板の製造方法において、レジスト膜厚
を、付着形成させる導体回路用金属薄膜の膜厚の１０倍
以上とする事を特徴とするフレキシブルプリント回路基
板の製造方法。Coating portions of the surface of the plastic film substrate that are unnecessary for forming a conductor circuit pattern with a resist, and then depositing a desired metal on the surface of the substrate by physical vapor deposition,
In a method for manufacturing a flexible printed circuit board in which a conductive circuit pattern is formed on the surface of a plastic film substrate by subsequently peeling off the resist film, the resist film thickness is at least 10 times the thickness of the metal thin film for the conductive circuit to be deposited and formed. A method for manufacturing a flexible printed circuit board, characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2980688A JPH01205495A (en) | 1988-02-10 | 1988-02-10 | Manufacture of flexible printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2980688A JPH01205495A (en) | 1988-02-10 | 1988-02-10 | Manufacture of flexible printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01205495A true JPH01205495A (en) | 1989-08-17 |
Family
ID=12286264
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2980688A Pending JPH01205495A (en) | 1988-02-10 | 1988-02-10 | Manufacture of flexible printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01205495A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100491179B1 (en) * | 2001-11-21 | 2005-05-24 | 마츠시타 덴끼 산교 가부시키가이샤 | Thinned circuit substrate and its manufacturing method |
| WO2008141481A1 (en) * | 2007-05-24 | 2008-11-27 | Princo Corp. | A structure and manufacturing method of metal wiring on multilayered board |
| US7931973B2 (en) | 2007-05-25 | 2011-04-26 | Princo Corp. | Manufacturing method of metal structure in multi-layer substrate and structure thereof |
| JP2013065838A (en) * | 2011-09-19 | 2013-04-11 | Xerox Corp | System and method for formation of electrical conductor on substrate |
| US8815333B2 (en) | 2007-12-05 | 2014-08-26 | Princo Middle East Fze | Manufacturing method of metal structure in multi-layer substrate |
-
1988
- 1988-02-10 JP JP2980688A patent/JPH01205495A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100491179B1 (en) * | 2001-11-21 | 2005-05-24 | 마츠시타 덴끼 산교 가부시키가이샤 | Thinned circuit substrate and its manufacturing method |
| US7084512B2 (en) | 2001-11-21 | 2006-08-01 | Matsushita Electric Industrial Co., Ltd. | Circuit substrate and its manufacturing method |
| WO2008141481A1 (en) * | 2007-05-24 | 2008-11-27 | Princo Corp. | A structure and manufacturing method of metal wiring on multilayered board |
| US7931973B2 (en) | 2007-05-25 | 2011-04-26 | Princo Corp. | Manufacturing method of metal structure in multi-layer substrate and structure thereof |
| US8815333B2 (en) | 2007-12-05 | 2014-08-26 | Princo Middle East Fze | Manufacturing method of metal structure in multi-layer substrate |
| JP2013065838A (en) * | 2011-09-19 | 2013-04-11 | Xerox Corp | System and method for formation of electrical conductor on substrate |
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