JP2000082877A - Manufacture of thin film circuit board - Google Patents

Manufacture of thin film circuit board

Info

Publication number
JP2000082877A
JP2000082877A JP10250968A JP25096898A JP2000082877A JP 2000082877 A JP2000082877 A JP 2000082877A JP 10250968 A JP10250968 A JP 10250968A JP 25096898 A JP25096898 A JP 25096898A JP 2000082877 A JP2000082877 A JP 2000082877A
Authority
JP
Japan
Prior art keywords
substrate
film
board
circuit board
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10250968A
Other languages
Japanese (ja)
Inventor
Kenichi Yamaoka
憲一 山岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10250968A priority Critical patent/JP2000082877A/en
Publication of JP2000082877A publication Critical patent/JP2000082877A/en
Pending legal-status Critical Current

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  • Parts Printed On Printed Circuit Boards (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain a through-hole that is high in connection reliability by a method wherein a conductive film is provided in a through-hole that penetrates obliquely through a board, whose main component is alumina, from its front surface to rear surface. SOLUTION: A through-hole 8 is provided in a board 1 that contains alumina of purity 99.5% or above penetrating obliquely through it from its front surface to rear surface. The oblique through-hole 8 has a structure where its rear opening is displaced in parallel from the front opening by a distance equal to the thickness of the board 1 or above. A resistive film 2 of tantalum nitride or the like, a chromium film 3a that improves a conductor film in adhesion to the board 1, a copper film 4a that ensures the board 1 of high-frequency characteristics, a nickel film 5a that protects copper against oxidation, and a gold film 6a where an electronic part is mounted are deposited on the surface of the board 1 through evaporation, sputtering, ion plating or the like. Thereafter, the rear surface of the board 1 is coated with a resistive film 2 a chrome film 3b, a copper film 4b, a nickel film 5b, and a gold film 6b the same as the front surface, and a prescribed pattern is provided in the board 1 through a photoengraving technique for the formation of a thin film circuit board 7.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、電子部品を実装
して高周波回路を構成するための基板として使用される
薄膜回路基板の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a thin film circuit board used as a board for mounting electronic components to form a high-frequency circuit.

【0002】[0002]

【従来の技術】99.5%以上のアルミナを含有する薄
膜回路基板は、熱膨張係数が小さい材料に高精度で微細
な回路パターンを形成する事が出来るので薄膜ハイブリ
ッドICや金属被膜抵抗器等に用いられている。特にマ
イクロ波帯で誘電体として使用出来且つシリコンチップ
の直接実装が可能であるなどの理由からマイクロ波回路
用の薄膜ハイブリッドICとして多用されている。
2. Description of the Related Art Thin-film circuit boards containing 99.5% or more of alumina can form a fine circuit pattern with high precision on a material having a small coefficient of thermal expansion. It is used for In particular, it is widely used as a thin film hybrid IC for microwave circuits because it can be used as a dielectric in a microwave band and can be directly mounted on a silicon chip.

【0003】図3は従来の薄膜回路の膜構成を示す図
で、図4は従来の電子回路を実装する前の回路の断面を
示す図である。図3において、表面の回路パターンと裏
面の導通面を接続する回路が存在しない99.5%のア
ルミナを含有する基板に対して常法の洗剤、純水、イソ
プロピルアルコールで洗浄した後、アルミナ基板1と抵
抗体2、導体膜である銅の密着性を向上を目的としたク
ロム層3a及び3b、高周波特性を確保するための銅層
4a及び4bの一部までを蒸着、スパッタリング、イオ
ンプレイティング等で形成し、銅の残りの一部と銅の酸
化を防止するためのニッケル層5a、及び5b、電子部
品の実装におけるワイヤーボンディングやリボンボンデ
ィング性を確保するための金層6a及び6bを電気めっ
き、または蒸着、スパッタリング、イオンプレイティン
グ等で形成してきた。
FIG. 3 is a diagram showing a film configuration of a conventional thin film circuit, and FIG. 4 is a diagram showing a cross section of the circuit before mounting a conventional electronic circuit. In FIG. 3, a substrate containing 99.5% alumina, which has no circuit connecting the circuit pattern on the front surface and the conductive surface on the back surface, is washed with a conventional detergent, pure water, and isopropyl alcohol, and then the alumina substrate is removed. 1 and resistor 2, chromium layers 3a and 3b for improving the adhesion of copper as a conductor film, and a part of copper layers 4a and 4b for securing high-frequency characteristics are deposited, sputtered, and ion plated. And nickel layers 5a and 5b for preventing oxidation of the remaining copper and copper, and gold layers 6a and 6b for securing wire bonding and ribbon bonding in the mounting of electronic components. It has been formed by plating, vapor deposition, sputtering, ion plating, or the like.

【0004】図4では、更に所要パターンのレジストを
配置し、スパッタリングまたは常法による湿式のエッチ
ングにより薄膜回路基板7としてきた。
In FIG. 4, a resist having a required pattern is further arranged, and the thin film circuit board 7 is formed by sputtering or wet etching by a conventional method.

【0005】上記従来の薄膜回路基板は、上記の製造工
程を経た膜構成とエッチングされた導体回路、抵抗体回
路よりなり裏面との接続は金材料よりなるワイヤーボン
ディング、リボンボンディング等によって行われ薄膜回
路基板としてきた。
The above-mentioned conventional thin film circuit board comprises a film structure which has undergone the above-described manufacturing process, a conductor circuit and a resistor circuit which are etched, and a connection with the back surface is made by wire bonding, ribbon bonding or the like made of a gold material. Circuit board.

【0006】[0006]

【発明が解決しようとする課題】上記のような薄膜回路
基板7は、高周波等の回路を形成した基板の表面と裏面
との間に電気的接続を求めるには、ワイヤーボンディン
グやリボンボンディングに因るところが多いが接続に伴
う作業性の影響で電気的接続の信頼性に欠けたり、接続
に伴うスペースを必要するため実装密度が小さくなる不
具合が生じた。
The above-mentioned thin-film circuit board 7 requires an electrical connection between the front surface and the back surface of the substrate on which high-frequency circuits and the like are formed by wire bonding or ribbon bonding. However, the reliability of the electrical connection is lacking due to the workability associated with the connection, and the space required for the connection is required.

【0007】また、アルミナ基板に抵抗膜や導体膜を形
成するための常法による洗浄は、紫外線によるバクテリ
アの駆除を行なわなければバクテリアの温床となりバク
テリアの付着による抵抗膜や導体膜の密着性を著しく損
なう危険を抱えていた。このため紫外線によるフィルタ
ーを洗浄装置に付加する必要を生じるが一般に薄膜回路
基板形成製造は非エッチング部の保護膜形成に紫外線を
使用しているため洗浄装置は薄膜回路基板製造設備と切
り離して別室に設けなければならなかった。このため基
板の洗浄後、薄膜回路基板製造設備に持ち込む際に基板
を汚染させ基板と蒸着、スパッタリング、イオンプレイ
ティング等による抵抗膜或いは導体膜との密着性を損な
う危険があった。
[0007] In addition, cleaning by a conventional method for forming a resistive film or a conductive film on an alumina substrate becomes a breeding ground for bacteria unless bacteria are eliminated by ultraviolet rays, and the adhesion of the resistive film or the conductive film due to the adhesion of bacteria is improved. There was a significant risk of damage. For this reason, it becomes necessary to add a filter using ultraviolet light to the cleaning device.However, since the manufacturing of a thin-film circuit board generally uses ultraviolet light to form a protective film on an unetched portion, the cleaning device is separated from the thin-film circuit board manufacturing equipment and separated into a separate room. Had to be provided. For this reason, there is a risk that the substrate is contaminated when it is brought into a thin film circuit board manufacturing facility after the substrate is washed, and the adhesion between the substrate and a resistive film or a conductive film by vapor deposition, sputtering, ion plating or the like is impaired.

【0008】更には、基板に抵抗膜2、導体膜となるク
ロム層3a及び3b、銅層4a及び4bの一部を蒸着、
スパッタリング、イオンプレイティング等で形成した
後、生産性を高めるために残っている銅層4a及び4
b、ニッケル層5a及び5b、金層6a及び6bを湿式
めっきに因る事が一般的になっているが蒸着、スパッタ
リング、イオンプレイティング等で形成する膜が5,0
00オングストローム近傍と薄いために銅のピンボール
を通じて下地のクロム層3a及び3bの酸化の影響を受
けクロムと銅の層間剥離を生じる危険があった。
Further, a resistive film 2, chromium layers 3a and 3b to be conductor films, and portions of copper layers 4a and 4b are deposited on a substrate,
After being formed by sputtering, ion plating, etc., the remaining copper layers 4a and 4
b, the nickel layers 5a and 5b and the gold layers 6a and 6b are generally formed by wet plating.
Since it is as thin as about 00 Å, there is a danger that chromium and copper will be delaminated under the influence of the oxidation of the underlying chromium layers 3a and 3b through the copper pinball.

【0009】この発明は、かかる問題を解決するために
なされたものであり、接続信頼性の高い薄膜回路基板を
得ることを目的とするものである。
The present invention has been made to solve such a problem, and has as its object to obtain a thin-film circuit board having high connection reliability.

【0010】またこの発明は、基板に対して洗浄過程で
付着する恐れのあるバクテリアを駆除し密着性の良い抵
抗膜、導体膜を形成することができる薄膜回路基板を得
ることを目的とするものである。
It is another object of the present invention to provide a thin film circuit board capable of removing bacteria which may adhere to a substrate during a cleaning process and forming a resistive film and a conductive film having good adhesion. It is.

【0011】この発明は、アルミナ基板に抵抗膜とクロ
ム、銅の一部まで蒸着、スパッタリング、イオンプレイ
ティングを行い、残る銅の一部とニッケル、クロムを湿
式めっきでコーティングする際に蒸着、スパッタリン
グ、イオンプレイティング等で作られた膜と湿式めっき
で作られる膜とを密着性が損なわれること無く接着でき
る薄膜回路基板を得ることを目的とするものである。
According to the present invention, vapor deposition, sputtering and ion plating are performed on a resistive film and a part of chromium and copper on an alumina substrate, and vapor deposition and sputtering are performed when a part of the remaining copper and nickel and chromium are coated by wet plating. It is another object of the present invention to provide a thin film circuit board capable of adhering a film made by ion plating or the like to a film made by wet plating without impairing the adhesion.

【0012】[0012]

【課題を解決するための手段】第1の発明による薄膜回
路基板の製造方法は、アルミナを主成分とする基板の一
方面から他方面に貫通する貫通穴を基板面に対して斜め
方向に形成する第1の工程と、上記第1の工程後、上記
基板の両面に蒸着、スパッタリングまたはイオンプレイ
ティングで基板の抵抗膜及び導体膜を形成する第2の工
程とを有する。
According to a first aspect of the present invention, there is provided a method of manufacturing a thin film circuit board, wherein a through hole penetrating from one surface to the other surface of a substrate containing alumina as a main component is formed obliquely to the substrate surface. And a second step of forming a resistive film and a conductive film of the substrate on both surfaces of the substrate by vapor deposition, sputtering, or ion plating after the first process.

【0013】第2の発明による薄膜回路基板の製造方法
は、アルミナを主成分とする基板の一方面から他方面に
貫通する貫通穴を基板面に対して斜め方向に形成する第
1の工程と、上記第1の工程後、上記基板を1.00モ
ルないし1.50モルの濃度範囲内の硫酸に浸漬し水洗
を行う第2の工程と、上記第2の工程後、基板を1.0
1モルないし3.03モルの濃度範囲内の弗酸に浸漬す
る第3の工程と、上記第3の工程後、上記基板の両面に
蒸着、スパッタリングまたはイオンプレイティングで基
板の抵抗膜及び導体膜を形成する第4の工程とを有す
る。
A method of manufacturing a thin film circuit board according to a second aspect of the present invention includes a first step of forming a through hole extending from one surface of the substrate containing alumina as a main component to the other surface in an oblique direction to the substrate surface. After the first step, a second step of immersing the substrate in sulfuric acid in a concentration range of 1.00 to 1.50 mol and washing with water;
A third step of immersion in hydrofluoric acid within a concentration range of 1 mol to 3.03 mol, and after the third step, a resistive film and a conductive film of the substrate on both surfaces of the substrate by vapor deposition, sputtering or ion plating. Forming a fourth step.

【0014】第3の発明による薄膜回路基板の製造方法
は、アルミナを主成分とする基板の一方面から他方面に
貫通する貫通穴を基板面に対して斜め方向に形成する第
1の工程と、上記第1の工程後、上記基板を1.00モ
ルないし1.50モルの濃度範囲内の硫酸に浸漬し水洗
を行う第2の工程と、上記第2の工程後、基板を1.0
1モルないし3.03モルの濃度範囲内の弗酸に浸漬す
る第3の工程と、上記第3の工程後、上記基板の両面に
蒸着、スパッタリングまたはイオンプレイティングで基
板の抵抗膜、クロム及び銅の一部の導体膜を形成した基
板を、0.62モルの濃度範囲内のシアン化カリウム溶
液に0.2モルのシアン化ニッケルカリウムを加えた溶
液中で陰極電解の下地調整を行う第4の工程と、上記第
4の工程後、残った導体膜を湿式めっきでコーテングす
る第5の工程とを有する。
According to a third aspect of the present invention, there is provided a method of manufacturing a thin-film circuit board, comprising: a first step of forming a through-hole penetrating from one surface to the other surface of an alumina-based substrate in an oblique direction with respect to the substrate surface; After the first step, a second step of immersing the substrate in sulfuric acid in a concentration range of 1.00 to 1.50 mol and washing with water;
A third step of dipping in a concentration of 1 mol to 3.03 mol of hydrofluoric acid, and after the third step, a resistive film of the substrate, chromium and chromium are deposited on both sides of the substrate by vapor deposition, sputtering or ion plating. The substrate on which the copper conductor film is formed is subjected to cathodic electrolysis base adjustment in a solution obtained by adding 0.2 mol of potassium nickel cyanide to a potassium cyanide solution within a concentration range of 0.62 mol. And a fifth step of coating the remaining conductive film by wet plating after the fourth step.

【0015】第4の発明による薄膜回路基板の製造方法
は、上記第1の工程において、貫通穴を上記基板の一方
面と基板の板厚寸法または基板の板厚寸法以上を基板の
他方面に平行移動した斜め方向に形成する。
According to a fourth aspect of the present invention, there is provided a method of manufacturing a thin film circuit board, wherein, in the first step, a through hole is formed on one surface of the substrate and the thickness of the substrate or the thickness of the substrate or more on the other surface of the substrate. It is formed in an oblique direction that has been translated.

【0016】[0016]

【発明の実施の形態】実施の形態1.図1、図2はこの
発明の実施の形態1を示すアルミナ基板とこの基板を使
用した薄膜回路基板の断面図である。図において1は9
9.5%以上のアルミナを含有する基板であり、基板の
表面から裏面に貫通する斜めのスルホール(貫通穴)8
を設ける。この時のスルホール8は基板1の表面と基板
の板厚寸法または基板の板厚寸法以上を基板の裏面に平
行移動した斜めのスルホール8を設けるものとする。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 1 and 2 are cross-sectional views of an alumina substrate and a thin-film circuit board using the alumina substrate according to the first embodiment of the present invention. In the figure, 1 is 9
A substrate containing 9.5% or more of alumina, and an oblique through hole (through hole) 8 penetrating from the front surface to the back surface of the substrate.
Is provided. At this time, the through hole 8 is provided as an oblique through hole 8 in which the surface of the substrate 1 and the thickness of the substrate or the thickness of the substrate or more are moved in parallel to the back of the substrate.

【0017】次に図2のように基板1の表面から窒化タ
ンタル等の抵抗膜2、基板と導体膜の密着性を向上させ
るクロム3a、高周波特性を確保するための銅4a、銅
の酸化を防止するニッケル5a、電子部品を実装するた
めの金6aを蒸着、スパッタリング、イオンプレイティ
ング等でコーティングした後に、基板1の裏面を表面と
同様に抵抗膜2、クロム3b、銅4b、ニッケル5b、
金6bをコーティングし、写真製版技術により所要パタ
ーンにエッチングし薄膜回路基板7とすることができ
る。
Next, as shown in FIG. 2, from the surface of the substrate 1, a resistive film 2 such as tantalum nitride, chromium 3a for improving the adhesion between the substrate and the conductive film, copper 4a for ensuring high frequency characteristics, and oxidation of copper are removed. After coating nickel 5a for prevention and gold 6a for mounting electronic components by vapor deposition, sputtering, ion plating or the like, the back surface of the substrate 1 is made of the resistive film 2, chrome 3b, copper 4b, nickel 5b,
The thin film circuit board 7 can be formed by coating gold 6b and etching it into a required pattern by photomechanical technology.

【0018】実施の形態2.この発明の実施の形態2で
は、図1で設けた斜めのスルホール穴を持つ基板を1.
00モルないし1.5モルの濃度範囲内の硫酸に浸漬し
水洗をした後、1.01モルないし3.03モルの濃度
範囲内の弗酸に浸漬し洗浄を行なう。洗浄された基板1
を用いる事によって基板と抵抗膜及び導体膜との密着性
を向上させた99.5%以上を含有するアルミナ基板1
を薄膜回路7にすることができる。ここで硫酸及び弗酸
の濃度に上限の範囲を設けたのは抵抗膜及び導体膜を形
成し写真製版技術によってエッチングする際に使用され
る図2の所要パターンのレジスト9をコーティングしエ
ッチングした後にレジスト残りを起こさないようにする
ためである。また、硫酸と弗酸の濃度範囲に下限を設け
たのは基板の洗浄の効果を発揮させるためである。
Embodiment 2 FIG. In the second embodiment of the present invention, the substrate having the oblique through-hole provided in FIG.
After being immersed in sulfuric acid in the concentration range of 00 to 1.5 mol and washed with water, it is immersed in hydrofluoric acid in the concentration range of 1.01 to 3.03 mol for washing. Washed substrate 1
Alumina substrate 1 containing 99.5% or more in which the adhesion between the substrate and the resistive film and the conductive film is improved by using
Can be used as the thin film circuit 7. Here, the upper limits of the concentrations of sulfuric acid and hydrofluoric acid are set because the resist 9 having the required pattern shown in FIG. 2 used for forming the resistive film and the conductive film and etching by photolithography is coated and etched. This is to prevent the resist remaining. The lower limit is set in the concentration range of sulfuric acid and hydrofluoric acid in order to exert the effect of cleaning the substrate.

【0019】実施の形態3.この発明の実施の形態3で
は、上記実施の形態2の工程を経て洗浄した図2の基板
1を蒸着、スパッタリング、イオンプレイティング等で
コーティングした窒化タンタル等の抵抗膜2とクロム層
3a及び3bと銅層4a及び4bの1/5までコーティ
ングした基板1を更に生産性を高めるため湿式めっきで
残る銅層4a及び4b、ニッケル層5a及び5b、金層
6a及び6bをコーティングする際に下地調整を行な
い、密着性の良い導体膜を確保するための手段を示すも
のである。図2の基板1に窒化タンタル等の抵抗膜2、
とクロム層3a及び3bと銅層4a及び4bの1/5を
施した基板に、常法のアルカリ脱脂、シアン化ナトリウ
ムまたはカリウム等の溶液で銅層4a及び4bを活性化
した後に0.62モルの濃度のシアン化カリウム溶液に
0.2モルのシアン化ニッケルカリウムを加えた液中で
陰極電解し銅層4a及び4bのピンホールによってクロ
ム層3a及び3bの一部の酸化膜を取り除き、クロム層
3a及び3bを活性化し、湿式による後工程めっきとの
密着性向上を図った薄膜回路基板を得ることができる。
Embodiment 3 In the third embodiment of the present invention, a resistive film 2 made of tantalum nitride or the like and the chromium layers 3a and 3b coated on the substrate 1 shown in FIG. In order to further improve the productivity of the substrate 1 coated with 1/5 of the copper layers 4a and 4b and the copper layers 4a and 4b, the nickel layers 5a and 5b, and the gold layers 6a and 6b, In order to obtain a conductor film having good adhesion. A resistance film 2 such as tantalum nitride is formed on a substrate 1 shown in FIG.
After 1 / of the chromium layers 3a and 3b and 1 / of the copper layers 4a and 4b are applied to the substrate, the copper layers 4a and 4b are activated with a solution of sodium or potassium cyanide or the like by a conventional method. Cathodic electrolysis is performed in a solution obtained by adding 0.2 mol of potassium nickel cyanide to a potassium cyanide solution having a molar concentration of 0.2 mol to remove a part of the oxide film of the chromium layers 3 a and 3 b through pinholes of the copper layers 4 a and 4 b. By activating 3a and 3b, it is possible to obtain a thin-film circuit board in which the adhesion to the post-process plating by wet processing is improved.

【0020】[0020]

【発明の効果】第1、第4の発明によればアルミナを主
成分とする基板に対して表面と裏面を結ぶ斜めのスルホ
ールを設ける事によって蒸着、スパッタリング、イオン
プレイティング等でスルホール穴のコーティングを可能
にした。スルホールの導体膜を設ける事によって接続信
頼性の高いスルホールを有する薄膜回路基板を実現する
ことができる。
According to the first and fourth aspects of the present invention, a through hole is formed by vapor deposition, sputtering, ion plating or the like by providing an oblique through hole connecting a front surface and a back surface to a substrate mainly composed of alumina. Enabled. By providing the through-hole conductor film, a thin-film circuit board having a through-hole with high connection reliability can be realized.

【0021】また、第2、第4の発明によれば、アルミ
ナを主成分とする基板に対して洗浄過程で付着する恐れ
のあるバクテリアを駆除し密着性の良い抵抗膜、導体膜
を形成する事が出来る。また洗浄によって基板が過度に
エッチングされ所要パターンを形成する際に使用するレ
ジストが残り高周波特性を損なわれる事がない薄膜回路
基板を実現することができる。
Further, according to the second and fourth aspects of the present invention, bacteria which may adhere to the substrate containing alumina as a main component in the cleaning process are eliminated to form a resistance film and a conductor film having good adhesion. I can do things. Further, it is possible to realize a thin film circuit board in which the resist used for forming a required pattern due to excessive etching of the substrate due to the cleaning does not remain and high-frequency characteristics are not impaired.

【0022】第3、第4の発明によればアルミナを主成
分とする基板に抵抗膜とクロム、銅の一部まで蒸着、ス
パッタリング、イオンプレイティングを行い、銅の一部
とニッケル、クロムを湿式めっきでコーティングする際
に蒸着、スパッタリング、イオンプレイティング等で作
られた膜と湿式めっきで作られる膜とを密着性が損なわ
れること無く接着し薄膜回路基板とすることができる。
According to the third and fourth aspects of the present invention, a substrate mainly composed of alumina is subjected to vapor deposition, sputtering and ion plating up to a resistive film and a portion of chromium and copper to form a portion of copper and nickel and chromium. When coating by wet plating, a film formed by vapor deposition, sputtering, ion plating, or the like, and a film formed by wet plating are adhered to each other without impairing the adhesion, and a thin film circuit board can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 この発明の実施の形態1を示すアルミナ基板
の断面図である。
FIG. 1 is a sectional view of an alumina substrate according to a first embodiment of the present invention.

【図2】 この発明の実施の形態2及び3を示すアルミ
ナ基板を使った薄膜回路基板の断面図である。
FIG. 2 is a cross-sectional view of a thin-film circuit board using an alumina substrate according to Embodiments 2 and 3 of the present invention.

【図3】 従来のアルミナを使った薄膜回路基板の膜構
成等を示す断面図である。
FIG. 3 is a cross-sectional view showing a film configuration and the like of a conventional thin film circuit board using alumina.

【図4】 従来のアルミナを使った薄膜回路基板の断面
図である。
FIG. 4 is a cross-sectional view of a conventional thin film circuit board using alumina.

【符号の説明】[Explanation of symbols]

1 基板、2 抵抗膜、3 クロム、4 銅、5 ニッ
ケル、6 金、7 薄膜回路基板、8 スルホール、9
レジスト。
1 substrate, 2 resistive film, 3 chrome, 4 copper, 5 nickel, 6 gold, 7 thin film circuit board, 8 through hole, 9
Resist.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 アルミナを主成分とする基板の一方面か
ら他方面に貫通する貫通穴を基板面に対し斜め方向に形
成する第1の工程と、上記第1の工程後、上記基板の両
面に蒸着、スパッタリングまたはイオンプレイティング
で基板の抵抗膜及び導体膜を形成する第2の工程とを有
することを特徴とする薄膜回路基板の製造方法。
A first step of forming a through hole penetrating from one surface to the other surface of a substrate containing alumina as a main component in an oblique direction with respect to the substrate surface; and after the first step, both surfaces of the substrate. Forming a resistive film and a conductive film of the substrate by vapor deposition, sputtering or ion plating.
【請求項2】 アルミナを主成分とする基板の一方面か
ら他方面に貫通する貫通穴を基板面に対し斜め方向に形
成する第1の工程と、上記第1の工程後、上記基板を
1.00モルないし1.50モルの濃度範囲内の硫酸に
浸漬し水洗を行う第2の工程と、上記第2の工程後、基
板を1.01モルないし3.03モルの濃度範囲内の弗
酸に浸漬する第3の工程と、上記第3の工程後、上記基
板の両面に蒸着、スパッタリングまたはイオンプレイテ
ィングで基板の抵抗膜及び導体膜を形成する第4の工程
とを有することを特徴とする薄膜回路基板の製造方法。
2. A first step in which a through hole penetrating from one surface to the other surface of a substrate containing alumina as a main component is formed in an oblique direction with respect to the substrate surface. A second step in which the substrate is immersed in sulfuric acid in a concentration range of 0.000 to 1.50 mol and washed with water, and after the second step, the substrate is cleaned in a concentration range of 1.01 to 3.03 mol. A third step of immersing in an acid; and a fourth step of forming a resistive film and a conductive film of the substrate on both sides of the substrate by vapor deposition, sputtering or ion plating after the third step. Of manufacturing a thin film circuit board.
【請求項3】 アルミナを主成分とする基板の一方面か
ら他方面に貫通する貫通穴を基板面に対し斜め方向に形
成する第1の工程と、上記第1の工程後、上記基板を
1.00モルないし1.50モルの濃度範囲内の硫酸に
浸漬し水洗を行う第2の工程と、上記第2の工程後、基
板を1.01モルないし3.03モルの濃度範囲内の弗
酸に浸漬する第3の工程と、上記第3の工程後、上記基
板の両面に蒸着、スパッタリングまたはイオンプレイテ
ィングで基板の抵抗膜、クロム及び銅の一部の導体膜を
形成した基板を、0.62モルの濃度範囲内のシアン化
カリウム溶液に0.2モルのシアン化ニッケルカリウム
を加えた溶液中で陰極電解の下地調整を行う第4の工程
と、上記第4の工程後、残った導体膜を湿式めっきでコ
ーテングする第5の工程とを有することを特徴とする薄
膜回路基板の製造方法。
3. A first step of forming a through hole penetrating from one surface of the substrate containing alumina as a main component to the other surface in an oblique direction with respect to the substrate surface, and after the first step, removing the substrate by one step. A second step in which the substrate is immersed in sulfuric acid in a concentration range of 0.000 to 1.50 mol and washed with water, and after the second step, the substrate is cleaned in a concentration range of 1.01 to 3.03 mol. A third step of immersing in acid, and after the third step, a substrate on which a resistive film of the substrate is formed on both surfaces of the substrate by sputtering or ion plating, and a conductive film of some of chromium and copper, A fourth step of adjusting the base of the cathodic electrolysis in a solution obtained by adding 0.2 mol of potassium potassium cyanide to a potassium cyanide solution within a concentration range of 0.62 mol, and a conductor remaining after the fourth step. Fifth process to coat the film by wet plating And a method of manufacturing a thin film circuit board.
【請求項4】 上記第1の工程は、貫通穴を上記基板の
一方面と基板の板厚寸法または基板の板厚寸法以上を基
板の他方面に平行移動した斜め方向に形成することを特
徴とする請求項1〜3いずれか記載の薄膜回路基板の製
造方法。
4. The first step is characterized in that the through-hole is formed in an oblique direction in which one side of the substrate and a thickness of the substrate or a thickness greater than the thickness of the substrate are moved in parallel to the other surface of the substrate. The method for manufacturing a thin-film circuit board according to claim 1.
JP10250968A 1998-09-04 1998-09-04 Manufacture of thin film circuit board Pending JP2000082877A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10250968A JP2000082877A (en) 1998-09-04 1998-09-04 Manufacture of thin film circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10250968A JP2000082877A (en) 1998-09-04 1998-09-04 Manufacture of thin film circuit board

Publications (1)

Publication Number Publication Date
JP2000082877A true JP2000082877A (en) 2000-03-21

Family

ID=17215711

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10250968A Pending JP2000082877A (en) 1998-09-04 1998-09-04 Manufacture of thin film circuit board

Country Status (1)

Country Link
JP (1) JP2000082877A (en)

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Publication number Priority date Publication date Assignee Title
KR20220002103U (en) * 2021-02-22 2022-08-30 에이플러스 세미컨덕터 테크놀로지스 컴퍼니 리미티드 Double-sided and multilayer FPC substrate
JP2022128059A (en) * 2021-02-22 2022-09-01 常州欣盛半導體技術股▲ふん▼有限公司 Substrate for double-sided and multi-layer fpc and processing method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20220002103U (en) * 2021-02-22 2022-08-30 에이플러스 세미컨덕터 테크놀로지스 컴퍼니 리미티드 Double-sided and multilayer FPC substrate
JP2022128059A (en) * 2021-02-22 2022-09-01 常州欣盛半導體技術股▲ふん▼有限公司 Substrate for double-sided and multi-layer fpc and processing method thereof
KR200496685Y1 (en) * 2021-02-22 2023-04-03 에이플러스 세미컨덕터 테크놀로지스 컴퍼니 리미티드 Double-sided and multilayer FPC substrate

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