JPH0434744U - - Google Patents
Info
- Publication number
- JPH0434744U JPH0434744U JP1990075938U JP7593890U JPH0434744U JP H0434744 U JPH0434744 U JP H0434744U JP 1990075938 U JP1990075938 U JP 1990075938U JP 7593890 U JP7593890 U JP 7593890U JP H0434744 U JPH0434744 U JP H0434744U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- lead frame
- heat dissipation
- view
- bonded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 9
- 230000017525 heat dissipation Effects 0.000 claims 2
- 238000009413 insulation Methods 0.000 claims 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第1図は本考案の一実施例を示すもので、aは
リードフレームの要部平面図、bは同上の半導体
装置が実装された要部平面図、cは同上の側面図
、第2図は従来の半導体装置の一例を示すもので
、aはリードフレームの平面図、bは 同上の側
面図、cは同上の要部平面図、dは同上の半導体
装置が実装された要部平面図、eは同上の樹脂が
モールドされた平面図、fは同上の側面図を示す
ものである。
1,2……半導体装置、4……リードフレーム
、4a……リードフレーム、6……放熱板。
FIG. 1 shows an embodiment of the present invention, in which a is a plan view of the main part of a lead frame, b is a plan view of the main part on which the above semiconductor device is mounted, c is a side view of the above, and FIG. 1 shows an example of a conventional semiconductor device, where a is a plan view of a lead frame, b is a side view of the same as above, c is a plan view of the main part of the same as above, and d is a plan view of the main part of the same semiconductor device mounted on it. , e shows a plan view of the molded resin, and f shows a side view of the same. 1, 2... Semiconductor device, 4... Lead frame, 4a... Lead frame, 6... Heat sink.
Claims (1)
の実装構造において、リードフレームの少なくと
も半導体装置の実装部の裏面側に、放熱性に優れ
かつ絶縁性を有する放熱板を接着すると共に、前
記リードフレームの表面に半導体装置を実装した
ことを特徴とする半導体装置の実装構造。 In a structure in which a semiconductor device that generates a large amount of heat is mounted on a lead frame, a heat dissipation plate having excellent heat dissipation and insulation properties is bonded to at least the back side of the mounting part of the semiconductor device of the lead frame, and the surface of the lead frame is A mounting structure for a semiconductor device, characterized in that a semiconductor device is mounted on a semiconductor device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990075938U JPH0434744U (en) | 1990-07-17 | 1990-07-17 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990075938U JPH0434744U (en) | 1990-07-17 | 1990-07-17 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0434744U true JPH0434744U (en) | 1992-03-23 |
Family
ID=31616957
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1990075938U Pending JPH0434744U (en) | 1990-07-17 | 1990-07-17 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0434744U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014096432A (en) * | 2012-11-08 | 2014-05-22 | Mitsubishi Materials Corp | Substrate for power module with copper plate and method for manufacturing substrate for power module with copper plate |
-
1990
- 1990-07-17 JP JP1990075938U patent/JPH0434744U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014096432A (en) * | 2012-11-08 | 2014-05-22 | Mitsubishi Materials Corp | Substrate for power module with copper plate and method for manufacturing substrate for power module with copper plate |
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