JPH0434327B2 - - Google Patents
Info
- Publication number
- JPH0434327B2 JPH0434327B2 JP62246767A JP24676787A JPH0434327B2 JP H0434327 B2 JPH0434327 B2 JP H0434327B2 JP 62246767 A JP62246767 A JP 62246767A JP 24676787 A JP24676787 A JP 24676787A JP H0434327 B2 JPH0434327 B2 JP H0434327B2
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- complementary signal
- signal
- inverter circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/151—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Logic Circuits (AREA)
- Manipulation Of Pulses (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62246767A JPS64814A (en) | 1987-03-24 | 1987-09-30 | Complementary signal output circuit |
US07/230,549 US4950920A (en) | 1987-09-30 | 1988-08-10 | Complementary signal output circuit with reduced skew |
EP88307474A EP0310232B1 (en) | 1987-09-30 | 1988-08-11 | Complementary signal output circuit |
DE8888307474T DE3875216T2 (de) | 1987-09-30 | 1988-08-11 | Komplementaersignal-ausgangsschaltung. |
KR1019880010532A KR920000837B1 (ko) | 1987-09-30 | 1988-08-19 | 상보신호출력회로 |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62-67963 | 1987-03-24 | ||
JP6796387 | 1987-03-24 | ||
JP62246767A JPS64814A (en) | 1987-03-24 | 1987-09-30 | Complementary signal output circuit |
Publications (3)
Publication Number | Publication Date |
---|---|
JPH01814A JPH01814A (ja) | 1989-01-05 |
JPS64814A JPS64814A (en) | 1989-01-05 |
JPH0434327B2 true JPH0434327B2 (enrdf_load_stackoverflow) | 1992-06-05 |
Family
ID=26409201
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62246767A Granted JPS64814A (en) | 1987-03-24 | 1987-09-30 | Complementary signal output circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS64814A (enrdf_load_stackoverflow) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU2000260464A1 (en) * | 2000-06-22 | 2002-01-02 | Micron Technology, Inc. | Balanced dual-edge triggered data bit shifting circuit and method |
WO2014175299A1 (ja) * | 2013-04-26 | 2014-10-30 | 株式会社村田製作所 | スイッチング電源装置用制御回路 |
-
1987
- 1987-09-30 JP JP62246767A patent/JPS64814A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS64814A (en) | 1989-01-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term | ||
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080605 Year of fee payment: 16 |