JPH04342150A - Inspection of semiconductor device - Google Patents
Inspection of semiconductor deviceInfo
- Publication number
- JPH04342150A JPH04342150A JP11441591A JP11441591A JPH04342150A JP H04342150 A JPH04342150 A JP H04342150A JP 11441591 A JP11441591 A JP 11441591A JP 11441591 A JP11441591 A JP 11441591A JP H04342150 A JPH04342150 A JP H04342150A
- Authority
- JP
- Japan
- Prior art keywords
- probe
- electrode
- electrodes
- film
- contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000007689 inspection Methods 0.000 title claims abstract description 16
- 239000004065 semiconductor Substances 0.000 title claims description 15
- 239000000523 sample Substances 0.000 claims abstract description 47
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 238000012360 testing method Methods 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 13
- 239000000463 material Substances 0.000 claims description 4
- 239000007779 soft material Substances 0.000 claims description 2
- 238000005259 measurement Methods 0.000 abstract description 9
- 238000009413 insulation Methods 0.000 abstract 1
- 239000010408 film Substances 0.000 description 14
- 239000012528 membrane Substances 0.000 description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Abstract
Description
【0001】0001
【産業上の利用分野】本発明は半導体装置の検査方法に
係り、特に、半導体素子を実装する支持基板の両主面に
電気的に接続して設けられる複数の対応した電極にプロ
ーブを当接して電気的特性を測定する検査方法に関する
ものである。[Field of Industrial Application] The present invention relates to a method for testing semiconductor devices, and more particularly, the present invention relates to a method for testing semiconductor devices, and in particular, a method for testing semiconductor devices, in which a probe is brought into contact with a plurality of corresponding electrodes that are electrically connected to both main surfaces of a support substrate on which a semiconductor element is mounted. This invention relates to an inspection method for measuring electrical characteristics.
【0002】0002
【従来の技術】半導体装置の製造工程中に、半導体素子
あるいは半導体素子を実装する支持基板上の複数の電極
にプローブを当接し、導通状態や抵抗測定等の検査が行
われている。2. Description of the Related Art During the manufacturing process of a semiconductor device, a probe is brought into contact with a plurality of electrodes on a semiconductor element or a support substrate on which the semiconductor element is mounted, and tests such as continuity and resistance measurements are performed.
【0003】この検査方法を紹介するものとして、特開
昭64−50434 号公報がある。[0003] This inspection method is introduced in Japanese Patent Laid-Open No. 64-50434.
【0004】0004
【発明が解決しようとする課題】半導体素子の高集積化
に伴い、半導体素子を実装する支持基板上の複数の電極
は微小化する傾向にある。一例として直径約0.25m
m の電極を設けたものがある。この様に微小なものに
プローブを当接させることは困難が伴う。また、電極材
として用いられるものには軟かいものもあり、微小で軟
かい金属にプローブを押し当てると電極が容易に変形し
てしまい、測定は行えても、その後、支持基板は使用不
能になるものがある。そこで、プローブ当接に手加減を
加えると、充分な接触圧力の確保ができず、高い測定精
度が得られなくなる。As semiconductor devices become more highly integrated, a plurality of electrodes on a support substrate on which semiconductor devices are mounted tend to become smaller. As an example, the diameter is approximately 0.25m
There is one with m electrodes. It is difficult to bring the probe into contact with such a minute object. In addition, some electrode materials are soft, and when a probe is pressed against a small, soft metal, the electrode easily deforms, and even if measurements can be made, the supporting substrate becomes unusable. There is something. Therefore, if the probe is brought into contact with the probe manually, sufficient contact pressure cannot be ensured, and high measurement accuracy cannot be obtained.
【0005】それゆえ、本発明の目的は、支持基板上の
電極を破損することなく特性測定を高精度に行うことが
できる検査方法を提供することにある。SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide an inspection method capable of measuring characteristics with high precision without damaging the electrodes on a support substrate.
【0006】[0006]
【課題を解決するための手段】上記目的を達成する本発
明検査方法の特徴とするところは、軟かい電極が設けら
れる支持基板の一主面に複数の電極を短絡する膜を設け
、この短絡膜と他方の主面の各電極にプローブを当接し
て特性測定を行うことにある。[Means for Solving the Problems] The testing method of the present invention that achieves the above object is characterized by providing a film that short-circuits a plurality of electrodes on one main surface of a support substrate on which soft electrodes are provided, and The purpose is to measure the characteristics by bringing probes into contact with each electrode on the membrane and the other main surface.
【0007】[0007]
【作用】一主面上の短絡膜にプローブを当接することに
より、軟かい材質の電極にプローブを当接する必要がな
くなり、それにより、その電極が破損されることはなく
なる。また、短絡膜にプローブを強く当接し、短絡膜に
プローブで傷を付けることがあっても、その短絡膜は除
去されるので、支障はなく、また、強く当接することに
より、必要な接触圧力は確保でき、高い測定精度が得ら
れる。[Operation] By bringing the probe into contact with the shorting film on one main surface, it becomes unnecessary to bring the probe into contact with the electrode made of a soft material, thereby preventing the electrode from being damaged. In addition, even if the probe strongly contacts the short-circuit membrane and the probe damages the short-circuit membrane, the short-circuit membrane will be removed, so there will be no problem. can be ensured and high measurement accuracy can be obtained.
【0008】[0008]
【実施例】以下、本発明検査方法を図面に示す一実施例
に基づいて説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS The inspection method of the present invention will be explained below based on an embodiment shown in the drawings.
【0009】図1は、本発明検査方法を実施する検査装
置の要部分解斜視図である。FIG. 1 is an exploded perspective view of essential parts of an inspection apparatus for carrying out the inspection method of the present invention.
【0010】図1において、1は、上プローブブロック
であり、このプローブブロック1は図示していない上固
定板に支持固定されている。また、プローブブロック1
は複数のプローブ2が下面に垂設されている。各プロー
ブ2には個々にリード線20が接続されている。In FIG. 1, reference numeral 1 denotes an upper probe block, and this probe block 1 is supported and fixed to an upper fixing plate (not shown). Also, probe block 1
A plurality of probes 2 are vertically installed on the lower surface. A lead wire 20 is connected to each probe 2 individually.
【0011】3は、図示していない半導体素子を面実装
する支持基板である。図1の点線で示した区分け内に1
個ずつ半導体素子が固着される。その固着は上面に設け
た電極4を介して行う。電極4の材質の一例はタングス
テンである。Reference numeral 3 denotes a support substrate on which a semiconductor element (not shown) is surface-mounted. 1 within the division indicated by the dotted line in Figure 1.
Semiconductor elements are fixed one by one. The fixation is performed via an electrode 4 provided on the upper surface. An example of the material of the electrode 4 is tungsten.
【0012】支持基板は図2に示す様に、下面には上面
の各電極4に対応して設けられる複数の軟質の電極16
がある。また、電極16は、半田バンプ用のBLMであ
り、一例として金が外用される。両電極4,16間は支
持基板3中に埋設した配線膜30により接続されている
。尚、配線膜30中の抵抗Rは薄膜技術を応用して設け
た終端抵抗である。As shown in FIG. 2, the support substrate has a plurality of soft electrodes 16 provided on the lower surface corresponding to each electrode 4 on the upper surface.
There is. Further, the electrode 16 is a BLM for a solder bump, and for example, gold is used externally. Both electrodes 4 and 16 are connected by a wiring film 30 buried in the support substrate 3. Note that the resistor R in the wiring film 30 is a terminating resistor provided by applying thin film technology.
【0013】支持基板3の下面には短絡膜5を設けてい
る。これは、電極16全てを短絡している。短絡膜5の
形成は、蒸着やメッキで設けても良いが、金や銀,銅の
箔を接触させるものであっても良い。A shorting film 5 is provided on the lower surface of the support substrate 3. This shorts out all electrodes 16. The shorting film 5 may be formed by vapor deposition or plating, but may also be formed by contacting gold, silver, or copper foil.
【0014】図1における6は、支持基板3の固定治具
である。治具6の中央に支持基板3を収納する略方形の
保持堤7が設けられている。保持堤7の一角にネジ8と
押圧部材9が設けられており、ネジ8を回転させて、保
持堤7に支持基板3を押圧固定する。Reference numeral 6 in FIG. 1 is a fixture for fixing the support substrate 3. As shown in FIG. A substantially rectangular holding bank 7 is provided in the center of the jig 6 to accommodate the support substrate 3. A screw 8 and a pressing member 9 are provided at one corner of the retaining bank 7, and the supporting substrate 3 is pressed and fixed to the retaining bank 7 by rotating the screw 8.
【0015】保持堤内側の床面10には複数のプローブ
通過孔10aが設けられている。固定治具6は図示して
いないが、下プローブブロック11に取外可能に固定さ
れる。下プローブブロック11には固定治具6のプロー
ブ通過孔10aに対応する位置に下プローブ12が直立
されている。下プローブブロック11はX,Y,θ,Z
方向に移動可能なテーブル群13上に固定されている。A plurality of probe passage holes 10a are provided in the floor surface 10 inside the holding bank. Although the fixing jig 6 is not shown, it is removably fixed to the lower probe block 11. A lower probe 12 is erected on the lower probe block 11 at a position corresponding to the probe passage hole 10a of the fixing jig 6. The lower probe block 11 has X, Y, θ, Z
It is fixed on a table group 13 that is movable in the direction.
【0016】固定治具6に支持基板3を固定して短絡膜
5と下プローブ12を当接させてから、テーブル群13
を図示していないコントローラで移動させ、支持基板3
上の電極4を上プローブ2に当接させる。図2では、上
電極4,短絡膜5に上下両プローブ2,12を当接させ
、特性測定を行なう状況を示している。After fixing the support substrate 3 to the fixing jig 6 and bringing the shorting film 5 and the lower probe 12 into contact, the table group 13 is
is moved by a controller (not shown), and the support substrate 3 is
The upper electrode 4 is brought into contact with the upper probe 2. FIG. 2 shows a situation in which both the upper and lower probes 2 and 12 are brought into contact with the upper electrode 4 and the short-circuiting film 5 to measure the characteristics.
【0017】図2に示す14は、上下両プローブ2,1
2とリード線20,21と接続されたスキャナで、上電
極4と短絡膜5の最短距離に位置する上下両プローブ2
,12を選択し、通電して特性測定部15で導通試験や
抵抗,インピーダンス,絶縁抵抗等の測定を行なう。Reference numeral 14 shown in FIG. 2 indicates both the upper and lower probes 2, 1.
2 and lead wires 20 and 21, both upper and lower probes 2 are located at the shortest distance between the upper electrode 4 and the shorting membrane 5.
.
【0018】下プローブ12は支持基板3の短絡膜5に
当接され、電極16に直接触れることはない。そのため
、強く下プローブ12を短絡膜5に接触させることがで
きる。上電極4は硬い材質のものであり、上プローブ2
を電極4に強固に圧接できる。The lower probe 12 is brought into contact with the shorting film 5 of the support substrate 3 and does not touch the electrode 16 directly. Therefore, the lower probe 12 can be brought into strong contact with the shorting film 5. The upper electrode 4 is made of a hard material, and the upper probe 2
can be firmly pressed against the electrode 4.
【0019】上プローブ2は上電極4の個々と接触する
ので、下プローブ12が短絡膜5により短絡されていて
も、対応関係にある上下両電極4,16間で混触を生ず
ることはない。従って、上下プローブ2,12の接触圧
力は充電確保でき、電極16を破損することなく、高精
度に検査を遂行できる。Since the upper probe 2 contacts each of the upper electrodes 4, even if the lower probe 12 is short-circuited by the short-circuiting film 5, no contact occurs between the corresponding upper and lower electrodes 4 and 16. Therefore, the contact pressure of the upper and lower probes 2 and 12 can be maintained to be charged, and the inspection can be performed with high precision without damaging the electrodes 16.
【0020】尚、短絡膜5の特性を前もって測定してお
くことにより、その内部抵抗は補正により除去できる。By measuring the characteristics of the shorting film 5 in advance, its internal resistance can be removed by correction.
【0021】上記実施例では、上下プローブブロック1
,11に複数のプローブ2,12を設けているが、各々
単数のプローブを有したものでも支障ない。In the above embodiment, the upper and lower probe blocks 1
, 11 are provided with a plurality of probes 2, 12, but each probe may have a single probe.
【0022】BLMとして用いる材料を短絡膜5として
蒸着により設けておいて、プローブ12はBLMとなる
部分以外に当接させ、検査後に電極16が形成される様
にエッチング加工を行えば、支持基板3の加工工程と特
性測定工程の一部を重ねることができる。The material used as the BLM is provided by vapor deposition as the shorting film 5, the probe 12 is brought into contact with the part other than the part that will become the BLM, and etching is performed so that the electrode 16 is formed after inspection. Part of the processing step and characteristic measurement step in step 3 can be overlapped.
【0023】[0023]
【発明の効果】以上説明したように、本発明によれば、
支持基板上の電極を破損することなく、特性測定を高精
度に行うことができる。[Effects of the Invention] As explained above, according to the present invention,
Characteristics can be measured with high precision without damaging the electrodes on the support substrate.
【図1】本発明検査方法の一実施例に用いられる検査装
置の要部分解斜視図。FIG. 1 is an exploded perspective view of essential parts of an inspection device used in an embodiment of the inspection method of the present invention.
【図2】図1に示す検査装置により測定を行う状況を示
す図。FIG. 2 is a diagram showing a situation in which measurement is performed by the inspection device shown in FIG. 1.
2…上プローブ、3…支持基板、4…上電極、5…短絡
膜、12…下プローブ、15…特性測定部、16…下電
極。2... Upper probe, 3... Support substrate, 4... Upper electrode, 5... Shorting film, 12... Lower probe, 15... Characteristic measuring section, 16... Lower electrode.
Claims (2)
記各電極に対応した電極が設けられ、両主面の各対応し
た電極が電気的に接続されていて上記一主面上にその各
電極に接続される様に半導体素子が実装される支持基板
の上記両主面の各対応した電極にプローブを当接して各
対応した電極間の特性を測定する半導体装置の検査方法
において、上記一主面にその複数の電極を短絡する膜を
設け、該短絡膜と上記他の主面の各電極にプローブを当
接して各対応した電極間の特性を測定することを特徴と
する半導体装置の検査方法。Claim 1: One main surface is provided with a plurality of electrodes, the other main surface is provided with electrodes corresponding to each of the electrodes, and the corresponding electrodes on both main surfaces are electrically connected, Inspection of a semiconductor device in which a probe is brought into contact with each corresponding electrode on both main surfaces of a support substrate on which a semiconductor element is mounted so as to be connected to each electrode on the surface, and the characteristics between each corresponding electrode are measured. The method is characterized in that a film is provided on the one main surface to short-circuit the plurality of electrodes, and a probe is brought into contact with the short-circuiting film and each electrode on the other main surface to measure the characteristics between the corresponding electrodes. A method for testing semiconductor devices.
の電極は軟かい材質よりなるものであり、他の主面の電
極は硬い材質のものであることを特徴とする半導体装置
の検査方法。2. The inspection method of claim 1, wherein the electrodes on one main surface are made of a soft material, and the electrodes on the other main surface are made of a hard material. Inspection method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11441591A JP2901781B2 (en) | 1991-05-20 | 1991-05-20 | Inspection method for semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11441591A JP2901781B2 (en) | 1991-05-20 | 1991-05-20 | Inspection method for semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04342150A true JPH04342150A (en) | 1992-11-27 |
JP2901781B2 JP2901781B2 (en) | 1999-06-07 |
Family
ID=14637124
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11441591A Expired - Fee Related JP2901781B2 (en) | 1991-05-20 | 1991-05-20 | Inspection method for semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2901781B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10253688A (en) * | 1997-03-10 | 1998-09-25 | Sony Corp | Apparatus and method for continuity inspection of flexible circuit board |
JP2001153909A (en) * | 1999-11-24 | 2001-06-08 | Ngk Spark Plug Co Ltd | Board inspecting device, board manufacturing method, and board with bump |
JP2003057285A (en) * | 2001-08-10 | 2003-02-26 | Hioki Ee Corp | Resistance-measuring apparatus and circuit board inspecting apparatus |
-
1991
- 1991-05-20 JP JP11441591A patent/JP2901781B2/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10253688A (en) * | 1997-03-10 | 1998-09-25 | Sony Corp | Apparatus and method for continuity inspection of flexible circuit board |
JP2001153909A (en) * | 1999-11-24 | 2001-06-08 | Ngk Spark Plug Co Ltd | Board inspecting device, board manufacturing method, and board with bump |
JP2003057285A (en) * | 2001-08-10 | 2003-02-26 | Hioki Ee Corp | Resistance-measuring apparatus and circuit board inspecting apparatus |
JP4588941B2 (en) * | 2001-08-10 | 2010-12-01 | 日置電機株式会社 | Resistance measuring device and circuit board inspection device |
Also Published As
Publication number | Publication date |
---|---|
JP2901781B2 (en) | 1999-06-07 |
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Legal Events
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LAPS | Cancellation because of no payment of annual fees |