JPH04340877A - Video signal converter - Google Patents

Abstract

PURPOSE:To prevent the occurrence of a slip when a NTSC signal is converted into the signal of other system by skipping the field by the NTSC signal when the signal exists in the forbidden zone where the slip occurs. CONSTITUTION:Each field of the video signal of the NTSC system is successively converted into a digital signal by an A/D converter 1 and is stored in a register 3. This signal is successively stored in a main memory 6 and is successively read as each field of the video signal of CIF system from the main memory 6. In this case, if the NTSC vertical synchronizing signal exists for the subsequent specific time defining the vertical synchronizing signal for CIF as reference, there is the possibility of the occurrence of the slip. At this time, a writing control circuit 5 generates a writing control signal forbidding the field of the signal of the NTSC system to be written in the main memory 6 while the slip occurs between the signal of the NTSC system and the signal of the CIF system.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal converter capable of converting an NTSC video signal to another video signal.

0002

BACKGROUND OF THE INVENTION Conventionally, as is well known, a video signal has N
It is transmitted using the TSC method, PAL method, SECAM method, etc. Each system has its own characteristics and drawbacks, but is used in various countries, and the NTSC system is used in the United States, Japan, and other countries. Now, in addition to the above-mentioned systems, the CIF format is currently recommended as a transmission system for videophone calls. This CIF system is the NTSC system and PA
Although it is an intermediate format of the L system, the field frequency is the same as in the PAL direction.

[0003] By the way, as mentioned above, our country
The SC system is adopted, and the current situation is that video-related equipment that uses the NTSC system is available at extremely low prices. Therefore, rather than developing new equipment for the CIF format, it is better to use the
It is better to adopt a method of converting to IF format in terms of development period, parts, cost, etc.

By the way, the NTSC system is also the CIF system (P
Also in the AL system, the video signal consists of two fields making up one frame. At this time, one field frequency is N
The TSC method is 59.94 [Hz], and the CIF (PA
L) method is 49.888 [Hz], and there is a difference between the two.

[0005]

[Problem to be Solved by the Invention] If there is a difference in field frequency as described above, it is difficult to change from the NTSC system to the CIF (PA) system.
When converting to the L) method, there was a drawback that the signals of one method and the signal of the other method could not be synchronized, resulting in a slip.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a video signal conversion device that can prevent slips that occur when converting from one system to another.

[0007]

[Means for Solving the Problems] In order to achieve the above object, the video signal conversion device of the present invention includes a first means for detecting the occurrence of a slip between a signal of the NTSC system and a signal of the CIF system; A second means for skipping the field of the NTSC signal based on the detection signal from the first means.
It is characterized by having the following means.

[0008]

[Operation] The conversion device according to the present invention performs field skipping by prohibiting the storage of the NTSC signal in the memory while a slip occurs when converting the NTSC signal to the CIF signal. , preventing the occurrence of slips.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to illustrated embodiments.

FIG. 1 is a block diagram showing an embodiment of a video signal converter according to the present invention.

In FIG. 1, the input terminal T1 is an analog/
The NTS signal is connected to the input terminal of the digital (A/D) converter 1 and the synchronous separation circuit 2, and is supplied to the input terminal T1.
A video signal of the C format is applied to an A/D converter 1 and a synchronization separation circuit 2. A/D converter 1 is NT
The SC system video signal is converted into a digital signal and input to the register 3. In addition, the synchronous separation circuit 2
is a circuit that separates the vertical synchronizing signal VD and the horizontal synchronizing signal HD, and inputs the respective signals VD and HD to the first pulse generator 4. The first pulse generator 4 sends a vertical synchronization signal VD to the write control circuit 5 in response to each synchronization signal, and also sends a vertical synchronization signal VD to the main memory 6.
A write address is generated and supplied to the main memory 6 via the selector 8. Further, the data stored in the register 3 is transferred to the first pulse generator 4 of the main memory 6 according to a write signal from the write control circuit 5.
It is configured to be stored at the address given by .

The serial output SO of the main memory 6 like this
is connected to the arithmetic circuit 9, and according to the read address from the second pulse generator 7, the serial output S
Data is read from O and supplied to the arithmetic circuit 9. Since there is a difference in the number of scanning lines per field between the NTSC system and the CIF system, the arithmetic circuit 9 interpolates the difference and supplies it to the register 11. The second pulse generator 7 is adapted to generate a vertical synchronization signal, a horizontal synchronization signal, a synchronization clock, and a read control signal for the CIF method. The CIF video signal stored in the register 11 is sent to the second pulse generator 7.
FIG. 2 is a circuit diagram showing the detailed configuration of the write control circuit used in the video signal converter.

In FIG. 2, write control circuit 5 is configured as follows. That is, the CIF video signal vertical synchronization signal CVD generated by the second pulse generator 7 is input to the monostable multivibrator 51. The output of the monostable multivibrator 51 is input to another monostable multivibrator 52. The output of the monostable multivibrator 52 is output from the AND circuit 5
It is input to input terminal 3.

Further, a vertical synchronizing signal NVD obtained from an NTSC video signal is input to a D flip-flop 54. The output signal of the D flip-flop 54 is input to an AND circuit 55, and is also input to an input terminal D of a D flip-flop 56. The output signal from the D flip-flop 56 is input to an AND circuit 55. As a result, the NTSC vertical synchronization signal VD is differentiated, and the result is input to the AND circuit 53.

The output of the AND circuit 53 is input to the clock terminal T of the D flip-flop 57. The output of this D flip-flop 57 is further applied to the D input terminal of a D flip-flop 58. The T input terminal of the D flip-flop 58 receives a vertical synchronizing signal CV for CIF.
D is applied, and the output of the flip-flop 58 becomes a signal that controls writing to the main memory 6.

The operation of such an embodiment will be explained below.

FIG. 3 is a diagram for explaining the operation of this embodiment, and FIG. 4 is an explanatory diagram for explaining the operation of the write control circuit of FIG. 2.

Each field of the NTSC video signal [
1a], [2a], [3a], ... are sequentially converted into digital signals by the A/D converter 1 at 59.94 [Hz] and stored in the register 3, as shown in FIG. 3(a). be done. This signal is sequentially stored in the main memory 6, and the main memory 6
As shown in FIG. 3(b), when each field [1b], [2b], [3b], ... of the CIF video signal is read out sequentially, when the field [7a] of NTSC is
It is completely out of sync with the IF by one field.

In other words, a slip occurs in field [7a]. The time during which this slip may occur can be determined in advance. That is, if an NTSC vertical synchronization signal is present during the ΔT time after the CIF vertical synchronization signal CVD is used as a reference, there is a possibility that a slip will occur. Therefore, this ΔT time width is called the prohibition zone, and this prohibition zone can be set by selecting the values of the resistors R1 and R2 and the capacitors C1 and C2 of the monostable multivibrators 51 and 52 shown in FIG. can.

Next, the operation of forming a write inhibit signal in the write control circuit 5 will be explained. As shown in FIG. 4A, at the rise of the CIF vertical synchronization signal CVD, the monostable multivibrator 51 operates and the output signal is turned on, and turned off after a certain period of time. The monostable multivibrator 52 is the monostable multivibrator 51
It starts operating at the falling edge of the output signal and outputs a signal IZ that turns off after a certain period of time. This becomes a write-inhibited zone to the main memory 6.

On the other hand, the NTSC vertical synchronization signal VD is sampled according to the NTSC video signal sampling clock. By the D flip-flop 54, the D flip-flop 56, and the AND circuit 55,
The output signal RP is obtained by differentiation as shown in b).

The signal IZ and the output signal RP are ANDed by an AND circuit 53, and this output signal forms a write control signal W via D flip-flops 57 and 58. When is high, writing of NTSC signals to the main memory 6 is prohibited, thereby preventing slips.

[0023]

[Effects of the Invention] As explained above, according to the present invention, N
When the TSC signal is in the forbidden zone where slipping occurs, that field is skipped, so NT
It is possible to prevent the occurrence of slips when converting signals from SC signals to other systems.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a video signal conversion device of the present invention.

FIG. 2 is a circuit diagram showing the configuration of a write control circuit used in an embodiment of the present invention.

FIG. 3 is an explanatory diagram for explaining the operation of the embodiment of the present invention.

FIG. 4 is a time chart for explaining the operation of the write control circuit of this embodiment.

[Explanation of symbols]

1 A/D converter 2 Synchronous separation circuit 3 Register 4 First pulse generator 5 Write control circuit 6 Main memory 7 Second pulse generator 9 Arithmetic circuit 10 Register

Claims (1)

[Claims] 1. First means for detecting that a slip occurs between fields of an NTSC signal and a CIF signal;
A video signal converting device comprising: second means for skipping a field of a TSC signal.