JPH04313284A - Thin-film thermoelectric element - Google Patents

Thin-film thermoelectric element

Info

Publication number
JPH04313284A
JPH04313284A JP3077833A JP7783391A JPH04313284A JP H04313284 A JPH04313284 A JP H04313284A JP 3077833 A JP3077833 A JP 3077833A JP 7783391 A JP7783391 A JP 7783391A JP H04313284 A JPH04313284 A JP H04313284A
Authority
JP
Japan
Prior art keywords
transition metal
thin film
type
metal silicide
thermoelectric element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3077833A
Other languages
Japanese (ja)
Inventor
Yutaka Shimabara
豊 島原
Yasunobu Yoneda
康信 米田
Yukio Yoshino
幸夫 吉野
Yukio Sakabe
行雄 坂部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP3077833A priority Critical patent/JPH04313284A/en
Publication of JPH04313284A publication Critical patent/JPH04313284A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain a thin-film thermoelectric element which can be used up to a high temperature region with a high sensitivity by using a transition metal silicide as a thermoelectric material. CONSTITUTION:A thin-film thermoelectric element is obtained by forming a thin-film pattern 2 of a p-type transition metal silicide and a thin-film pattern 3 of an n-type transition metal silicide where a positive hole concentration and an electron concentration are controlled by a mixed ratio of a transition metal silicide showing a p-type conduction and that showing an n-type conduction on a substrate 1.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】この発明は、赤外線センサ、温度センサ、
熱センサなどに用いられる薄膜熱電素子に関する。
[0001] This invention relates to an infrared sensor, a temperature sensor,
This invention relates to thin film thermoelectric elements used in thermal sensors and the like.

【0002】0002

【従来の技術】従来より、赤外線センサ、温度センサ、
熱センサなどとして用いられる、熱電対を多数直列接続
したいわゆるサーモパイル型熱電素子が開発されている
[Prior Art] Conventionally, infrared sensors, temperature sensors,
2. Description of the Related Art A so-called thermopile type thermoelectric element, in which a large number of thermocouples are connected in series, has been developed for use as a thermal sensor.

【0003】一般にサーモパイル型熱電素子は、熱電材
料が多数直列接続され、温度差から生じる熱起電力が加
算される構造を有し、大きな熱起電力を得ることができ
る。
Generally, a thermopile type thermoelectric element has a structure in which a large number of thermoelectric materials are connected in series, and thermoelectromotive force generated from a temperature difference is added, and a large thermoelectromotive force can be obtained.

【0004】これにより高効率の熱電力変換素子や微少
温度差を検知する高感度な赤外線、温度、熱センサとし
て利用することができる。特に、センサ用途には小型化
、高感度化、高応答速度化のために、主に薄膜型の熱電
素子が用いられる。従来の薄膜熱電素子はn型熱電材料
からなる細線パターンとp型熱電材料からなる細線パタ
ーンを基板上において交互に直列接続している。
[0004] Thereby, it can be used as a highly efficient thermoelectric conversion element or a highly sensitive infrared, temperature, or thermal sensor that detects minute temperature differences. In particular, thin film thermoelectric elements are mainly used for sensor applications in order to achieve miniaturization, high sensitivity, and high response speed. In a conventional thin film thermoelectric element, thin wire patterns made of an n-type thermoelectric material and thin wire patterns made of a p-type thermoelectric material are alternately connected in series on a substrate.

【0005】このような従来の薄膜熱電素子の熱電材料
にはコンスタンタン−ニクロム(特公昭61−4015
4号)、Si,Ge(特開昭57−7172号)、Bi
−Sb−Te(特開昭53−132282号,特開昭6
1−22676号)などの金属系または半導体系材料が
用いられてきた。
Constantan-nichrome (Japanese Patent Publication No. 61-4015) is used as a thermoelectric material for such conventional thin-film thermoelectric elements.
No. 4), Si, Ge (Japanese Unexamined Patent Publication No. 57-7172), Bi
-Sb-Te (JP-A-53-132282, JP-A-6
Metal-based or semiconductor-based materials such as No. 1-22676) have been used.

【0006】[0006]

【発明が解決しようとする課題】これら従来の熱電材料
は電気伝導率が高く熱電変換効率が高いという長所があ
るが、ゼーベック係数が小さい、ゼーベック係数の温度
変化が大きい、高温下で使用できない等の欠点を有して
いる。また、銅−コンスタンタンなどの金属系の熱電材
料は薄膜形成が容易であるが熱起電力が小さく感度が低
いという欠点を有し、Bi−Sb−Te系などの化合物
半導体系は比較的高感度であるが基板との密着性が悪い
、エッチングが困難、コストが高いなどの欠点を有して
いる。
[Problems to be Solved by the Invention] These conventional thermoelectric materials have the advantage of high electrical conductivity and high thermoelectric conversion efficiency, but they have a small Seebeck coefficient, a large temperature change in the Seebeck coefficient, and cannot be used at high temperatures. It has the following disadvantages. In addition, metal-based thermoelectric materials such as copper-constantan are easy to form into thin films, but have the disadvantage of small thermoelectromotive force and low sensitivity, while compound semiconductor materials such as Bi-Sb-Te have relatively high sensitivity. However, it has drawbacks such as poor adhesion to the substrate, difficulty in etching, and high cost.

【0007】ところで、遷移金属珪化物は金属伝導から
半金属,半導体などの伝導形態を示し、古くから耐酸化
性に優れた抵抗体材料として使用されてきた。しかしF
eSi2 を除いてゼーベック係数が100μV/K以
下と小さく、熱電材料として利用されているのはFeS
i2 のみである。遷移金属珪化物のなかでもFeSi
2 は真性半導体で不純物の添加とコントロールにより
p,nの伝導と熱電特性を示すが、他の遷移金属珪化物
は一般に真性半導体ではなく、フェルミエネルギーが価
電子帯あるいは伝導帯の近くにあり、縮退しているもの
が多い。このため電気伝導性は高いがゼーベック係数は
小さい。
By the way, transition metal silicides exhibit conductivity forms ranging from metal conductivity to semimetallic conductivity and semiconductor conductivity, and have long been used as resistor materials with excellent oxidation resistance. But F
Except for eSi2, FeS has a small Seebeck coefficient of less than 100 μV/K and is used as a thermoelectric material.
i2 only. Among transition metal silicides, FeSi
2 is an intrinsic semiconductor and exhibits p and n conduction and thermoelectric properties by adding and controlling impurities, but other transition metal silicides are generally not intrinsic semiconductors and have Fermi energy near the valence band or conduction band. Many are degenerate. Therefore, although the electrical conductivity is high, the Seebeck coefficient is small.

【0008】この発明の目的は、高感度で高温域まで使
用でき、高温域までゼーベック係数の変化の少ない安価
な薄膜熱電素子を得ることにある。
An object of the present invention is to obtain an inexpensive thin film thermoelectric element that has high sensitivity, can be used up to a high temperature range, and exhibits little change in Seebeck coefficient up to a high temperature range.

【0009】[0009]

【課題を解決するための手段】この発明では、薄膜熱電
素子としてSi基板またはSiO2 基板に密着性が高
く、且つ選択エッチング性の良い遷移金属珪化物に着目
した。しかし前述したように、FeSi2 以外の遷移
金属珪化物は高電気伝導率、低ゼーベック係数という傾
向を示している。
[Means for Solving the Problems] The present invention focuses on transition metal silicides that have high adhesion to Si substrates or SiO2 substrates and good selective etching properties as thin film thermoelectric elements. However, as mentioned above, transition metal silicides other than FeSi2 tend to have high electrical conductivity and low Seebeck coefficient.

【0010】一般に半導体では、キャリア濃度が低い程
、ゼーベック係数が高く、電気伝導率が低くなり、また
逆にキャリア濃度が高い程、ゼーベック係数が低く、電
気伝導率が高くなるという傾向を示す。前述したように
殆どの遷移金属珪化物は正孔または電子のキャリア濃度
が非常に高い縮退半導体であり、後者の特性を示す。
In general, semiconductors tend to show a tendency that the lower the carrier concentration, the higher the Seebeck coefficient and the lower the electrical conductivity, and conversely, the higher the carrier concentration, the lower the Seebeck coefficient and the higher the electrical conductivity. As mentioned above, most transition metal silicides are degenerate semiconductors with very high hole or electron carrier concentrations and exhibit the latter characteristic.

【0011】熱電変換効率の指標として性能指数がある
が、この性能指数の最も高い領域はキャリア濃度として
1025/m3 程度である。そこで、発明者らはキャ
リア濃度が高い正孔伝導(p型)の遷移金属珪化物と電
子伝導(n型)の遷移金属珪化物を双方含んだ金属間化
合物を形成し、適度にキャリアを消失させて濃度制御し
た。
[0011] There is a figure of merit as an index of thermoelectric conversion efficiency, and the highest region of this figure of merit is a carrier concentration of about 1025/m3. Therefore, the inventors formed an intermetallic compound containing both a hole-conducting (p-type) transition metal silicide and an electron-conducting (n-type) transition metal silicide with a high carrier concentration to appropriately dissipate carriers. The concentration was controlled by

【0012】そしてp型,n型それぞれ最適キャリア濃
度をもつ遷移金属珪化物の薄膜を基板上に作成すること
により、前述の欠点のない薄膜熱電素子が得られること
を見出した。
It has been found that a thin film thermoelectric element free from the above-mentioned drawbacks can be obtained by forming a thin film of transition metal silicide having optimum carrier concentrations for p-type and n-type on a substrate.

【0013】この発明の薄膜熱電素子は、p型伝導を示
す遷移金属珪化物とn型伝導を示す遷移金属珪化物の双
方を含み、その混合比によりそれぞれ正孔濃度と電子濃
度を制御した、p型遷移金属珪化物の薄膜パターンとn
型遷移金属珪化物の薄膜パターンを、基板上に形成して
なることを特徴とする。
The thin film thermoelectric element of the present invention contains both a transition metal silicide exhibiting p-type conduction and a transition metal silicide exhibiting n-type conductivity, and the hole concentration and electron concentration are controlled by the mixing ratio of the two. Thin film pattern of p-type transition metal silicide and n
It is characterized by forming a thin film pattern of type transition metal silicide on a substrate.

【0014】[0014]

【作用】この発明の薄膜熱電素子では、p型伝導を示す
遷移金属珪化物とn型伝導を示す遷移金属珪化物との混
合比によりそれぞれ正孔濃度と電子濃度が制御された、
p型遷移金属珪化物の薄膜パターンとn型遷移金属珪化
物の薄膜パターンが基板上に形成されている。従ってp
,nの電気伝導性を有する遷移金属珪化物のキャリア濃
度を最適値にコントロールすることで、熱電特性の良好
な薄膜パターンが基板上に形成され、高感度で高温域ま
で使用でき、高温域でもゼーベック係数の温度変化の少
ない薄膜熱電素子が得られる。
[Operation] In the thin film thermoelectric element of the present invention, the hole concentration and electron concentration are controlled by the mixing ratio of the transition metal silicide exhibiting p-type conduction and the transition metal silicide exhibiting n-type conduction, respectively.
A thin film pattern of p-type transition metal silicide and a thin film pattern of n-type transition metal silicide are formed on a substrate. Therefore p
By controlling the carrier concentration of transition metal silicides with electrical conductivity of , n to an optimal value, a thin film pattern with good thermoelectric properties is formed on the substrate, and it can be used with high sensitivity up to high temperatures. A thin film thermoelectric element whose Seebeck coefficient changes little with temperature can be obtained.

【0015】[0015]

【実施例】この発明の実施例を図1〜図3に基づいて製
造工程順に説明する。
[Embodiment] An embodiment of the present invention will be explained in the order of manufacturing steps based on FIGS. 1 to 3.

【0016】<p型用半導体ターゲットの作成>まず、
純度99.99%以上のCrが27mol %、純度9
9.99%以上のCoが7mol %および純度99.
999%以上のSiが66mol %からなる粉末を混
合し、円板状に予備プレスした後、Ar中で2000k
g/cm2 ,1000℃でHIP(熱間静水圧プレス
)を行う。その後、その焼結体の表面を研磨してp型用
半導体ターゲットを得る。
<Preparation of p-type semiconductor target> First,
27 mol % Cr with purity 99.99% or higher, purity 9
More than 9.99% Co, 7 mol % and purity 99.
Powders containing 999% or more of 66 mol % Si were mixed, pre-pressed into a disk shape, and then heated at 2000 k in Ar.
HIP (hot isostatic pressing) is performed at 1000° C. and 1000° C. Thereafter, the surface of the sintered body is polished to obtain a p-type semiconductor target.

【0017】<n型用半導体ターゲットの作成>先ず、
純度99.99%以上のCrが4mol %、純度99
.99%以上のCoが30mol %および純度99.
999%以上のSiが66mol %からなる粉末を混
合し、円板状に予備プレスした後、Ar中で2000k
g/cm2 ,1000℃でHIPを行う。その後、そ
の焼結体表面を研磨してn型用半導体ターゲットを得る
<Preparation of n-type semiconductor target> First,
4 mol% Cr with purity 99.99% or higher, purity 99
.. More than 99% Co, 30 mol % and purity 99.
Powders containing 999% or more of 66 mol % Si were mixed, pre-pressed into a disk shape, and then heated at 2000 k in Ar.
HIP is carried out at 1000°C. Thereafter, the surface of the sintered body is polished to obtain an n-type semiconductor target.

【0018】<p型半導体薄膜パターンの形成>前記p
型用半導体ターゲットを用いてRFスパッタリングによ
り基板表面の全面に薄膜を製膜する。この時のスパッタ
リング条件は次のとおりである。
<Formation of p-type semiconductor thin film pattern>
A thin film is formed over the entire surface of the substrate by RF sputtering using a mold semiconductor target. The sputtering conditions at this time are as follows.

【0019】 基板温度:300℃ 高周波出力:500W〜1.5kW レート:1〜10μm/hr 続いてフォトレジスト膜の形成、マスク露光、現像およ
びリフトオフにより不要箇所のp型半導体薄膜を除去し
て必要なp型半導体薄膜パターンを形成する。
Substrate temperature: 300° C. High frequency output: 500 W to 1.5 kW Rate: 1 to 10 μm/hr Subsequently, the p-type semiconductor thin film at unnecessary locations is removed by forming a photoresist film, mask exposure, development, and lift-off. A p-type semiconductor thin film pattern is formed.

【0020】このときの基板の状態を図1に示す。図1
において(A)は平面図、(B)は概略正面図であり、
1はガラス基板、2はp型半導体薄膜パターンである。
FIG. 1 shows the state of the substrate at this time. Figure 1
In (A) is a plan view, (B) is a schematic front view,
1 is a glass substrate, and 2 is a p-type semiconductor thin film pattern.

【0021】<n型半導体薄膜パターンの形成>前記n
型用半導体ターゲットを用いて、RFスパッタリングに
よって基板の全面にn型半導体薄膜を製膜する。このと
きのスパッタリング条件は次の通りである。
<Formation of n-type semiconductor thin film pattern>
Using a mold semiconductor target, an n-type semiconductor thin film is formed over the entire surface of the substrate by RF sputtering. The sputtering conditions at this time are as follows.

【0022】 基板温度:300℃ 高周波出力:500W〜1.5kW レート:1〜10μm/hr その後、フォトレジスト膜の形成、マスク露光、現像お
よびリフトオフにより不要なn型半導体薄膜を除去して
必要なn型半導体薄膜パターンを形成する。
Substrate temperature: 300° C. High frequency output: 500 W to 1.5 kW Rate: 1 to 10 μm/hr After that, unnecessary n-type semiconductor thin film is removed by forming a photoresist film, mask exposure, development, and lift-off. Form an n-type semiconductor thin film pattern.

【0023】このときの基板の状態を図2に示す。図2
において(A)は平面図、(B)は概略正面図である。 この図のように、既に形成されているp型半導体薄膜パ
ターン2に対し温冷接部で一部を重ねてn型半導体薄膜
パターン3を形成して、図に示すようにp型半導体薄膜
パターン2とn型半導体薄膜パターン3を直列接続する
FIG. 2 shows the state of the substrate at this time. Figure 2
(A) is a plan view, and (B) is a schematic front view. As shown in this figure, an n-type semiconductor thin film pattern 3 is formed by partially overlapping the already formed p-type semiconductor thin film pattern 2 at the hot/cold junction, and the p-type semiconductor thin film pattern 3 is formed as shown in the figure. 2 and n-type semiconductor thin film pattern 3 are connected in series.

【0024】<その他のパターン形成>その後、膜の安
定化のために、基板全体を600〜800℃で真空中に
おいて熱処理する。そして図3に示すように、基板中央
部に白金黒などの集熱黒体4を形成し、さらに基板上の
所定箇所にNiなどの電極材料により引き出し電極5,
5を形成する。
<Other Pattern Formation> Thereafter, the entire substrate is heat treated in a vacuum at 600 to 800° C. in order to stabilize the film. As shown in FIG. 3, a heat collecting black body 4 made of platinum black or the like is formed in the center of the substrate, and lead-out electrodes 5, made of an electrode material such as Ni are placed at predetermined locations on the substrate.
form 5.

【0025】以上に示した実施例では、図面を明瞭化す
るために熱電対の対数を少なく描いたが、各パターンは
微細化することができる。例えば、図3に示した構造に
おいて5mm角基板で150対の熱電対を有する熱電素
子を作成し、サーミスタを用いて温度補償を行いつつ感
度を計測したところ、室温で約100V/W、150℃
下で110V/Wであった。
In the embodiments shown above, the number of thermocouples is reduced to make the drawings clearer, but each pattern can be made finer. For example, in the structure shown in Figure 3, a thermoelectric element with 150 pairs of thermocouples was created on a 5 mm square substrate, and the sensitivity was measured while performing temperature compensation using a thermistor.
It was 110V/W at the bottom.

【0026】[0026]

【発明の効果】この発明によればp型,n型の電気伝導
性を示す遷移金属珪化物のキャリア濃度をコントロール
することにより、熱電特性の良好な薄膜を形成すること
ができ、高感度で高温域まで使用でき、高温域までゼー
ベック係数の変化の少ない薄膜熱電素子が得られる。
[Effects of the Invention] According to the present invention, by controlling the carrier concentration of transition metal silicides exhibiting p-type and n-type electrical conductivity, it is possible to form a thin film with good thermoelectric properties, and with high sensitivity. A thin film thermoelectric element can be obtained that can be used up to a high temperature range and has a small change in Seebeck coefficient up to a high temperature range.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】実施例に係る薄膜熱電素子の製造途中の状態を
示す図であり、(A)は平面図、(B)は概略正面図で
ある。
FIG. 1 is a diagram showing a state in the middle of manufacturing a thin film thermoelectric element according to an example, in which (A) is a plan view and (B) is a schematic front view.

【図2】実施例に係る薄膜熱電素子の製造途中の状態を
示す図であり、(A)は平面図、(B)は概略正面図で
ある。
FIG. 2 is a diagram showing a state in the middle of manufacturing a thin film thermoelectric element according to an example, in which (A) is a plan view and (B) is a schematic front view.

【図3】完成した薄膜熱電素子を示す図であり、(A)
は平面図、(B)は概略正面図である。
FIG. 3 is a diagram showing a completed thin film thermoelectric element, (A)
is a plan view, and (B) is a schematic front view.

【符号の説明】[Explanation of symbols]

1−ガラス基板 2−p型半導体薄膜パターン 3−n型半導体薄膜パターン 4−集熱黒体 5−電極 1-Glass substrate 2-p type semiconductor thin film pattern 3-n type semiconductor thin film pattern 4- Heat collecting blackbody 5-electrode

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】p型伝導を示す遷移金属珪化物とn型伝導
を示す遷移金属珪化物の双方を含み、その混合比により
それぞれ正孔濃度と電子濃度を制御した、p型遷移金属
珪化物の薄膜パターンとn型遷移金属珪化物の薄膜パタ
ーンを、基板上に形成してなる薄膜熱電素子。
1. A p-type transition metal silicide containing both a transition metal silicide exhibiting p-type conductivity and a transition metal silicide exhibiting n-type conductivity, with hole concentration and electron concentration controlled respectively by the mixing ratio thereof. A thin film thermoelectric element comprising a thin film pattern of n-type transition metal silicide and a thin film pattern of n-type transition metal silicide formed on a substrate.
JP3077833A 1991-04-10 1991-04-10 Thin-film thermoelectric element Pending JPH04313284A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3077833A JPH04313284A (en) 1991-04-10 1991-04-10 Thin-film thermoelectric element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3077833A JPH04313284A (en) 1991-04-10 1991-04-10 Thin-film thermoelectric element

Publications (1)

Publication Number Publication Date
JPH04313284A true JPH04313284A (en) 1992-11-05

Family

ID=13645047

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3077833A Pending JPH04313284A (en) 1991-04-10 1991-04-10 Thin-film thermoelectric element

Country Status (1)

Country Link
JP (1) JPH04313284A (en)

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