JPH04318982A - Thin film thermoelectric element - Google Patents

Abstract

PURPOSE:To decrease a resistance value of a junction in a thin film thermoelectric element having an iron silicide semiconductor thin film pattern provided on a board. CONSTITUTION:A p-type semiconductor thin film pattern 4 and an n-type semiconductor thin film pattern 6 made of iron silicide are formed on a glass board 3, and a hot/cold connection part is connected by a thin film pattern 8 made of an electrode material having a different iron silicon composition ratio from those of these thin films.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film thermoelectric element used as a sensor such as an infrared sensor, a temperature sensor, or a thermal sensor or as a thermoelectric power converter.

0002

2. Description of the Related Art Thermopile type thermoelectric elements in which a large number of thermocouples are connected in series are used as thermoelectric elements used as sensors such as infrared sensors, temperature sensors, thermal sensors, or thermoelectric converters. By connecting a large number of thermocouples in series in this way, it can be used as a highly sensitive sensor that detects infrared rays, temperature, or heat that can detect minute temperature differences, or as a highly efficient thermoelectric conversion element. In particular, thin film thermoelectric elements are mainly used for sensor applications in order to achieve miniaturization, high sensitivity, and high response speed.

On the other hand, thin film thermoelectric conversion elements using iron silicide are disclosed in Japanese Patent Publication No. 2-8466 and Japanese Patent Application Laid-open No. 102382-1982 for the purpose of thermoelectric power conversion rather than as a sensor.

0004

[Problems to be Solved by the Invention] Thin film thermoelectric elements made of iron silicide thin films have the characteristics of being highly sensitive and usable up to high temperature ranges.

However, conventional thin film thermoelectric elements using iron silicide thin films are constructed by connecting a large number of p-type semiconductor thin film patterns made of iron silicide and n-type semiconductor thin film patterns in series on a substrate. , p-n at the junction
A bond was formed, and the resistance value at the bonded portion tended to increase.

The properties of iron silicide thermoelectric materials vary greatly depending on the Fe-Si ratio and impurity concentration. Iron silicides, which are intermetallic compounds, have F as a single-phase range with effective thermoelectric properties.
eSi1.95 to FeSi2.05 are known. If this single-layer material is doped with a donor such as Co or an acceptor such as Mn, a material with good thermoelectric properties can be obtained, but when these thermoelectric materials are directly p-n bonded, a resistive layer is formed at the bonding interface. is formed, and the resistance value of the entire thin film thermoelectric element increases.

[0007] Formation of a high resistance layer using a p-n junction, etc.
When used as a sensor, it causes a decrease in sensitivity and increases noise, and when used as a thermoelectric conversion element, it causes a decrease in conversion efficiency.

[0008] An object of the present invention is to provide a low resistance thin film thermoelectric element in which no pn junction is formed which causes the formation of a high resistance layer.

[0009]

SUMMARY OF THE INVENTION A common method to avoid p-n junctions is to form electrodes that provide ohmic contact between the contacts of a p-n thermocouple. Metal electrodes can be considered for this, but noble metals such as Pt cannot make ohmic contact with n-type semiconductors and are expensive.
Although ohmic contact can be obtained with base metals such as Ni, adhesion is low.

[0010] The inventors have developed a thin film with a composition ratio outside the range of a single layer of iron and silicon between p-type and n-type iron silicide thin films, thereby achieving high adhesion and It was discovered that it can be used as an ohmic contact material. Conventionally, iron silicides outside the single layer range have been materials with low thermoelectromotive force and high electrical conductivity. This is because excess Fe or Si acts as an impurity and becomes a kind of degenerate semiconductor or metalloid. In the present invention, this material is used as an electrode material for connecting p-type and n-type iron silicide thin films.

In the thin film thermoelectric element of the present invention, a p-type semiconductor thin film pattern and an n-type semiconductor thin film pattern mainly made of iron silicide are formed on a substrate, and the hot and cold junctions of these semiconductor thin film patterns are connected to the p-type semiconductor thin film pattern, respectively. It is characterized in that it is connected by a thin film pattern made of an electrode material having a different iron-silicon composition ratio from the type and n-type semiconductor thin films.

0012

[Operation] In the thin film thermoelectric element of the present invention, a p-type semiconductor thin film pattern and an n-type semiconductor thin film pattern, each mainly made of iron silicide, are formed on a substrate, and the hot and cold junctions of these semiconductor thin film patterns are respectively The p-type and n
The semiconductor thin film of the type is connected with a thin film pattern of an electrode material having a different iron-silicon composition ratio. As described above, this electrode material has high adhesion and makes ohmic contact with the p-type semiconductor thin film pattern and the n-type semiconductor thin film pattern, which are mainly made of iron silicide. Therefore, a low-resistance thin-film thermoelectric element can be obtained without forming a high-resistance layer at the bonding interface.

[0013]

EXAMPLE First, a method for manufacturing a target for forming a pattern of a semiconductor thin film mainly composed of iron silicide will be described.

First, Fe powder with a purity of 99.99% or more and Si powder with a purity of 99.99% or more were mixed in a molar ratio of 1:2.
After mixing and pre-pressing into a disk shape, Ar
HIP (hot isostatic pressing) is performed at 2000 kg/cm 2 and 1000° C. in the chamber. As a result, Figures 1 and 3
An iron silicide plate 1 shown in FIG. 1 is obtained.

On the other hand, as a p-type impurity, the purity is 99.99.
% or higher Cr powder and 99.99% or higher purity Si powder were mixed at a molar ratio of 1:2, pre-pressed into a rectangular plate shape, and then pressed at 2000 kg/cm2 in Ar.
, HIP was performed at 1000°C, and Co powder with a purity of 99.99% or more and Co powder with a purity of 99.99% were used as n-type impurities.
% or more of Si powder was mixed at a molar ratio of 1:2, pre-pressed into a rectangular plate shape, and then heated in Ar for 20 min.
HIP is performed at 00 kg/cm2 and 1000°C.

[0016] As a result, p made of CrSi2 sintered body
An n-type impurity chip consisting of a mold impurity chip and a CoSi2 sintered body is obtained.

Then, as shown in FIG. 1, a p-type impurity chip 2 is placed on an iron silicide plate 1 to create a p-type target, and as shown in FIG. 2, sputtering is performed on a glass substrate 3 using a mask. Then, a p-type semiconductor thin film pattern 4 is formed. In FIG. 2, (A) shows an example, and (B) shows a comparative example. The sputtering conditions at this time are as follows.

Substrate temperature: 300° C. High frequency output: 500 W to 1.5 kW Rate: 1 to 10 μm/hr Next, as shown in FIG. 3, the n-type impurity chip 5 is placed on the iron silicide plate 1, A target is created, and an n-type semiconductor thin film pattern 6 is formed on a glass substrate 3 using a mask as shown in FIG. In this way, in the embodiment, the n-type semiconductor thin film pattern 6 is replaced by the p-type semiconductor thin film pattern 4.
Do not connect directly to In the comparative example, these are directly connected to form a pair of thin film thermoelectric elements.

Note that the sputtering conditions at this time are the same as above.

Next, as a target for creating an iron silicide thin film with a different composition ratio, a chip 7 made of metal Fe or Si with a purity of 99.99% or more is placed on the iron silicide plate 1 as shown in FIG. . Then, as shown in FIG. 6, electrodes 8 are formed on the glass substrate 3 using a mask. The sputtering conditions at this time are also the same as above.

After that, the device of the embodiment shown in FIG.
The element of the comparative example shown in (B) is heat treated at 600 to 800° C. in vacuum or Ar to stabilize the film.

The Seebeck coefficient, forward specific resistance, and reverse specific resistance were measured for the thin film thermoelectric element as a comparative example shown in FIG. 4(B) and the thin film thermoelectric element as an example shown in FIG. As a result, the results shown in Table 1 were obtained.

[0023]

[Table 1]

As described above, according to the examples, the specific resistance is low in both the forward and reverse directions, and it can be seen that the ohmic contact at the junction greatly contributes to the reduction of the resistance value.

[0025]

[Effects of the Invention] According to the present invention, the resistance value of the junction between the p-type semiconductor thin film pattern and the n-type semiconductor thin film pattern is reduced, so the element resistance is reduced, and in sensor applications, sensitivity is increased and noise is reduced. This improves the S/N ratio and also improves the conversion efficiency when used as a thermoelectric conversion element.

[Brief explanation of drawings]

FIG. 1 is a plan view of a target for forming a p-type semiconductor thin film.

FIG. 2 is a diagram showing an example of forming a p-type semiconductor thin film pattern on a substrate.

FIG. 3 is a plan view of a target for forming an n-type semiconductor thin film.

FIG. 4 is a diagram showing an example of forming an n-type semiconductor thin film pattern on a substrate.

FIG. 5 is a plan view of a target for forming an electrode.

FIG. 6 is a diagram showing an example of forming electrodes on a substrate.

[Explanation of symbols]

1 - Iron silicide plate 2 - P-type impurity chip 3 - Substrate 4 - P-type semiconductor thin film pattern 5 - N-type impurity chip 6 - N-type semiconductor thin film pattern 7 - Chip made of metal Fe or Si 8 - From electrode material thin film pattern

Claims (1)

[Claims] Claim 1: P containing mainly iron silicide on the substrate.
forming a type semiconductor thin film pattern and an n-type semiconductor thin film pattern, and connecting the hot and cold junctions of these semiconductor thin film patterns with a thin film pattern made of an electrode material having an iron-silicon composition ratio different from that of the p-type and n-type semiconductor thin films, respectively. A thin film thermoelectric element characterized by: