JPH0431216B2 - - Google Patents

Info

Publication number
JPH0431216B2
JPH0431216B2 JP59131237A JP13123784A JPH0431216B2 JP H0431216 B2 JPH0431216 B2 JP H0431216B2 JP 59131237 A JP59131237 A JP 59131237A JP 13123784 A JP13123784 A JP 13123784A JP H0431216 B2 JPH0431216 B2 JP H0431216B2
Authority
JP
Japan
Prior art keywords
bits
bit
input
output
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59131237A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6043949A (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS6043949A publication Critical patent/JPS6043949A/ja
Publication of JPH0431216B2 publication Critical patent/JPH0431216B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1682—Allocation of channels according to the instantaneous demands of the users, e.g. concentrated multiplexers, statistical multiplexers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/065—Partitioned buffers, e.g. allowing multiple independent queues, bidirectional FIFO's
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/05—Electric or magnetic storage of signals before transmitting or retransmitting for changing the transmission rate
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/80—Camera processing pipelines; Components thereof
    • H04N23/81—Camera processing pipelines; Components thereof for suppressing or minimising disturbance in the image signal generation

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Multimedia (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)
  • Time-Division Multiplex Systems (AREA)
JP59131237A 1983-07-28 1984-06-27 バツフア装置 Granted JPS6043949A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP83430026.1 1983-07-28
EP83430026A EP0132481B1 (fr) 1983-07-28 1983-07-28 Dispositif tampon et système de transmission de données comportant ledit dispositif

Publications (2)

Publication Number Publication Date
JPS6043949A JPS6043949A (ja) 1985-03-08
JPH0431216B2 true JPH0431216B2 (OSRAM) 1992-05-25

Family

ID=8191504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59131237A Granted JPS6043949A (ja) 1983-07-28 1984-06-27 バツフア装置

Country Status (3)

Country Link
EP (1) EP0132481B1 (OSRAM)
JP (1) JPS6043949A (OSRAM)
DE (1) DE3374256D1 (OSRAM)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3820393A1 (de) * 1988-01-18 1989-07-27 Stabifix Brauerei Technik Gmbh Verfahren zur verkleinerung der poren eines filtermediums fuer getraenke
US5127002A (en) * 1991-07-17 1992-06-30 Motorola, Inc. Time slot assigner for use in a serial communication system
EP1182543B1 (en) * 2000-08-17 2005-08-24 Texas Instruments Incorporated Maintaining remote queue using two counters in transfer controller with hub and ports

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2517565C3 (de) * 1975-04-21 1978-10-26 Siemens Ag, 1000 Berlin Und 8000 Muenchen Schaltungsanordnung für ein Datenverarbeitungssystem
DE2555864C2 (de) * 1975-12-11 1982-08-19 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Zeitmultiplex-Übertragung von Daten
US4056851A (en) * 1976-09-20 1977-11-01 Rca Corporation Elastic buffer for serial data
AT352449B (de) * 1977-01-21 1979-09-25 Schrack Elektrizitaets Ag E Einrichtung zur zeitlichen pufferung seriell einlangender bitfolgen in einem oder mehreren silospeichern
FR2496314A1 (fr) * 1980-12-12 1982-06-18 Texas Instruments France Procede et dispositif pour permettre l'echange d'information entre des systemes de traitement d'information a vitesses de traitement differentes
EP0064120B1 (fr) * 1981-04-30 1987-08-26 International Business Machines Corporation Procédé de détermination de la configuration des canaux actifs dans un système de communication multiplex et dispositif de mise en oeuvre dudit procédé

Also Published As

Publication number Publication date
DE3374256D1 (en) 1987-12-03
JPS6043949A (ja) 1985-03-08
EP0132481B1 (fr) 1987-10-28
EP0132481A1 (fr) 1985-02-13

Similar Documents

Publication Publication Date Title
US4213176A (en) System and method for increasing the output data throughput of a computer
US4683564A (en) Matrix switch system
US4485470A (en) Data line interface for a time-division multiplexing (TDM) bus
US4031512A (en) Communications network for general purpose data communications in a heterogeneous environment
US4472788A (en) Shift circuit having a plurality of cascade-connected data selectors
US4141005A (en) Data format converting apparatus for use in a digital data processor
US4591973A (en) Input/output system and method for digital computers
US4309755A (en) Computer input/output arrangement for enabling a simultaneous read/write data transfer
KR880013068A (ko) 2진 트리 멀티프로세서
US4378589A (en) Undirectional looped bus microcomputer architecture
JPS5920206B2 (ja) マイクロ波通信ネツトワ−クの障害警報および制御方法ならびにその装置
JPH03198125A (ja) エラスチックバッファ
EP0042082B1 (en) Microprogram sequencer for microprogrammed control unit
JPH01251383A (ja) 多相メモリ配列の読出回路
EP0185098A1 (en) Control integrated circuit
US4177511A (en) Port select unit for a programmable serial-bit microprocessor
JPH0448014B2 (OSRAM)
NO174985B (no) Anordning for å koble sammen apparater med asynkrone kretser.
GB1581838A (en) I/o bus transceiver for a data processing system
JPH0431216B2 (OSRAM)
US4231084A (en) Data transfer system
US3680057A (en) Data communications subchannel
US6477177B1 (en) Multiple device access to serial data stream
US6442178B1 (en) System and method for data alignment in a communication system
CN118503184A (zh) 一种串口扩展方法