JPH04306865A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPH04306865A JPH04306865A JP7120091A JP7120091A JPH04306865A JP H04306865 A JPH04306865 A JP H04306865A JP 7120091 A JP7120091 A JP 7120091A JP 7120091 A JP7120091 A JP 7120091A JP H04306865 A JPH04306865 A JP H04306865A
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- resin
- semiconductor device
- semiconductor element
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 103
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 229920005989 resin Polymers 0.000 claims abstract description 81
- 239000011347 resin Substances 0.000 claims abstract description 81
- 229920003002 synthetic resin Polymers 0.000 claims abstract description 31
- 239000000057 synthetic resin Substances 0.000 claims abstract description 31
- 230000017525 heat dissipation Effects 0.000 claims description 20
- 238000002347 injection Methods 0.000 claims description 14
- 239000007924 injection Substances 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 11
- 230000000694 effects Effects 0.000 description 10
- 238000004806 packaging method and process Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 230000000191 radiation effect Effects 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/183—Connection portion, e.g. seal
- H01L2924/18301—Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【0001】0001
【産業上の利用分野】本発明は、半導体装置及びその製
造方法に係り、さらに詳しくは、半導体装置のパッケー
ジに関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a package for a semiconductor device.
【0002】0002
【従来の技術】半導体素子は、劣化を防止して信頼性を
高め、外部端子により電子部品の結線を容易にするため
、セラミックや合成樹脂によりパッケージが施されてい
る。2. Description of the Related Art Semiconductor devices are packaged with ceramic or synthetic resin in order to prevent deterioration, increase reliability, and facilitate connection of electronic components with external terminals.
【0003】図8は通常の半導体装置の断面図で、2は
リードフレーム1の中央部に設けられたダイパッド、3
はダイパッド2の周囲に設けられ、半導体素子10の各
電極とワイヤ11によりそれぞれ接続される多数のイン
ナリードである。これらダイパッド2、インナリード3
、半導体素子10及びワイヤ11は、セラミックやエポ
キシ樹脂の如き合成樹脂40によりパッケージされてい
る(なお、以下の説明では合成樹脂によりパッケージす
る場合について述べる)。FIG. 8 is a cross-sectional view of a typical semiconductor device, in which 2 is a die pad provided at the center of a lead frame 1;
are a large number of inner leads provided around the die pad 2 and connected to each electrode of the semiconductor element 10 by wires 11, respectively. These die pad 2, inner lead 3
, the semiconductor element 10 and the wire 11 are packaged with a synthetic resin 40 such as ceramic or epoxy resin (in the following description, a case where they are packaged with a synthetic resin will be described).
【0004】上記のようなパッケージを施すには、図9
に示すようにパッケージの形状に対応する凹部32,3
6が設けられた上型31と下型35との間に、半導体素
子10が実装されたリードフレーム1を挾み、下型35
に設けた樹脂導入口37から凹部32,36内に合成樹
脂(以下単に樹脂という)を注入して凹部32,36内
に充填し、乾燥固化したのち上型31及び下型35を開
き、パッケージされた半導体装置を取出している。なお
、33は空気抜き穴である。[0004] In order to apply the above-mentioned package, FIG.
As shown in the figure, recesses 32, 3 corresponding to the shape of the package
The lead frame 1 on which the semiconductor element 10 is mounted is sandwiched between the upper mold 31 and the lower mold 35 on which the semiconductor elements 6 are provided.
Synthetic resin (hereinafter simply referred to as resin) is injected into the recesses 32, 36 from the resin inlet 37 provided in the recesses 32, 36, and after drying and solidifying, the upper mold 31 and the lower mold 35 are opened, and the package is completed. The semiconductor device that has been removed is being removed. Note that 33 is an air vent hole.
【0005】[0005]
【発明が解決しようとする課題】上記のような従来のパ
ッケージ方法では、樹脂の注入口37が下型35に1か
所設けられているだけなので、樹脂の注入に際して図9
に示すようにダイパッド2が移動していわゆる浮き現象
が生じ易く、また気泡が発生したり樹脂の未充填部分が
生じるなど、種々問題があった。[Problems to be Solved by the Invention] In the conventional packaging method as described above, only one resin injection port 37 is provided in the lower mold 35.
As shown in FIG. 2, the die pad 2 tends to move and a so-called floating phenomenon occurs, and there are various problems such as the generation of air bubbles and the formation of unfilled areas with resin.
【0006】そこで、図9に破線で示すように上型31
に第2の樹脂注入口37aを設けて上記問題の解決をは
かっているが、ダイパッド2の浮き現象はある程度改善
されたものの、気泡の発生や樹脂の未充填などの問題は
解決には至っていない。Therefore, as shown by the broken line in FIG.
In an attempt to solve the above problem, a second resin injection port 37a is provided in the die pad 2, but although the floating phenomenon of the die pad 2 has been improved to some extent, the problems such as the generation of air bubbles and unfilled resin have not been solved. .
【0007】また、周知のように半導体素子は使用によ
り高温になるが、周囲が完全にパッケージされているた
め放熱効果が低く、このため放熱板を取付けるなど実装
に際して種々工夫をこらされているけれども、放熱板の
取付けが面倒であるにもかかわらず、放熱効果は必ずし
も充分ではなかった。[0007] Furthermore, as is well known, semiconductor elements become high in temperature as they are used, but because the surrounding area is completely packaged, the heat dissipation effect is low, and for this reason, various measures have been taken during mounting, such as attaching heat sinks. Despite the troublesome installation of the heat sink, the heat dissipation effect was not always sufficient.
【0008】本発明は上記の課題を解決すべくなされた
もので。パッケージに際して半導体素子の移動、気泡や
樹脂の未充填部分などを生ずるおそれがなく、また放熱
効果を著しく向上させその上薄形化できる半導体装置及
びその製造方法を得ることを目的としたものである。The present invention has been made to solve the above problems. The object of the present invention is to provide a semiconductor device and a method for manufacturing the same, which are free from the risk of movement of semiconductor elements or the formation of air bubbles or unfilled areas of resin during packaging, significantly improve heat dissipation effects, and can be made thinner. .
【0009】[0009]
【課題を解決するための手段及び作用】本発明に係る半
導体装置は、複数の樹脂導入穴を有する放熱板上に半導
体素子が実装されたリードフレームを載置し、半導体素
子を含むリードフレームを放熱板と一体的にパッケージ
したもの。[Means and effects for solving the problems] A semiconductor device according to the present invention includes a lead frame having a semiconductor element mounted thereon mounted on a heat sink having a plurality of resin introduction holes. Packaged integrally with a heat sink.
【0010】複数の樹脂導入穴を有する放熱板上に半導
体装置を搭載してこの半導体素子の電極を放熱板上に載
置されたリードフレームのインナリードとそれぞれ接続
し、半導体素子を含むリードフレームを放熱板を一体的
にパッケージしたもの。A semiconductor device is mounted on a heat sink having a plurality of resin introduction holes, and the electrodes of this semiconductor element are respectively connected to the inner leads of a lead frame placed on the heat sink, thereby forming a lead frame including the semiconductor element. integrated package with a heat sink.
【0011】複数の樹脂導入穴を有する放熱板上にTA
B式半導体装置を載置し、この半導体装置を放熱板と一
体的にパッケージしたもの。[0011] TA is placed on a heat sink having a plurality of resin introduction holes.
A type B semiconductor device is mounted and this semiconductor device is packaged integrally with a heat sink.
【0012】さらに、上記の半導体装置において、放熱
板に代えて合成樹脂板を使用したもの、放熱板又は合成
樹脂板に半導体素子の少なくとも一部を収容する凹部を
設けたもの及び放熱板又は合成樹脂板に放熱板を取付け
たものである。Furthermore, in the above-mentioned semiconductor device, a synthetic resin plate is used instead of the heat sink, a heat sink or synthetic resin plate is provided with a recess for accommodating at least a part of the semiconductor element, and a heat sink or synthetic resin plate is provided. This is a resin plate with a heat sink attached to it.
【0013】また、上記半導体装置の製造方法は、複数
の樹脂導入穴を有する放熱板上に半導体素子が実装され
たリードフレームを載置し、放熱板を、半導体素子等が
収容される凹部を有する上型と、放熱板の樹脂導入穴と
それぞれ整合する樹脂注入口を有する下型との間に挾持
し、樹脂注入口から樹脂導入穴を介して上型の凹部に樹
脂を注入するようにしたこと、及び半導体素子が実装さ
れたリードフレームに代えてTAB式半導体装置を用い
たことを特徴とするものである。[0013] Furthermore, in the method for manufacturing a semiconductor device, a lead frame on which a semiconductor element is mounted is placed on a heat sink having a plurality of resin introduction holes, and a recessed portion in which the semiconductor element, etc. is accommodated is placed on the heat sink. The resin is sandwiched between an upper mold having a heat dissipation plate and a lower mold having a resin injection port that is aligned with the resin introduction hole of the heat dissipation plate, and resin is injected from the resin injection port into the recessed part of the upper mold through the resin introduction hole. The present invention is characterized in that a TAB type semiconductor device is used instead of a lead frame on which a semiconductor element is mounted.
【0014】また、複数の樹脂導入穴を有する放熱板上
に半導体素子を搭載すると共に、放熱板上にインナリー
ドを有するリードフレームを載置してワイヤボンデイン
グし、放熱板を、半導体素子等が収容される凹部を有す
る上型と、放熱板の樹脂導入穴とそれぞれ整合する樹脂
注入口を有する下型との間に挾持し、樹脂注入口から樹
脂導入穴を介して上型の凹部に樹脂を注入するようにし
たこと。[0014] Also, a semiconductor element is mounted on a heat sink having a plurality of resin introduction holes, a lead frame having an inner lead is placed on the heat sink, and wire bonding is performed, and the semiconductor element, etc. is mounted on the heat sink. It is sandwiched between an upper mold having a recess to be accommodated and a lower mold having a resin injection port that is aligned with the resin introduction hole of the heat sink, and the resin is injected from the resin injection port into the recess of the upper mold through the resin introduction hole. I decided to inject it.
【0015】さらに、上記の各製造方法において、リー
ドフレームのインナリードの両面に絶縁膜を設けること
、放熱板に代えて合成樹脂板を用いたこと、放熱板又は
合成樹脂板に半導体素子の少なくとも一部を収容する凹
部を設けたこと、及び下型に放熱板又は合成樹脂板の少
なくとも一部が収容される凹部を設けたことを特徴とす
るものである。Furthermore, in each of the above manufacturing methods, an insulating film is provided on both sides of the inner lead of the lead frame, a synthetic resin plate is used in place of the heat sink, and at least one of the semiconductor elements is attached to the heat sink or the synthetic resin plate. The present invention is characterized in that a recess is provided to accommodate a portion of the heat dissipation plate or the synthetic resin plate, and a recess is provided in the lower mold to accommodate at least a portion of the heat dissipation plate or the synthetic resin plate.
【0016】[0016]
【実施例】図1は本発明に係る半導体装置の製造方法の
実施例を説明するための説明図である。図において、1
はリードフレームで、図3に示すように、中心部に設け
られた4本のアーム4で支持されたダイパッド2と、ダ
イパッド2の周囲に所定の間隔を隔てて形成された多数
のインナリード3と、アーム4にそれぞれ設けられ、樹
脂の通路となる貫通穴5とからなっている。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is an explanatory diagram for explaining an embodiment of a method for manufacturing a semiconductor device according to the present invention. In the figure, 1
is a lead frame, as shown in FIG. 3, which includes a die pad 2 supported by four arms 4 provided at the center, and a number of inner leads 3 formed around the die pad 2 at predetermined intervals. and a through hole 5 provided in each arm 4 and serving as a resin passage.
【0017】このリードフレーム1のダイパッド2には
半導体素子10が搭載され、その各電極とこれに対応す
るインナリード3とはそれぞれワイヤ11で接続されて
いる。6はインナリード3の両面に、ワイヤ11の接続
部分を除いて設けられたダムバーで、例えばポリイミド
樹脂やエポキシ樹脂の如き樹脂を塗布した絶縁膜で形成
されている。A semiconductor element 10 is mounted on the die pad 2 of this lead frame 1, and each electrode of the semiconductor element 10 and the corresponding inner lead 3 are connected by wires 11, respectively. Dam bars 6 are provided on both sides of the inner lead 3, excluding the connection portion of the wire 11, and are formed of an insulating film coated with a resin such as polyimide resin or epoxy resin.
【0018】20はリードフレーム1のインナリード3
の下面に達する大きさの放熱板で、銅板の如く熱伝導の
良好な材料からなり、リードフレーム1の貫通穴5に対
応する位置にはそれぞれ樹脂導入穴21が設けられてい
る。なお、実施例では放熱板20の厚さは1mmであっ
た。20 is the inner lead 3 of the lead frame 1
The heat dissipation plate is large enough to reach the lower surface of the lead frame 1, and is made of a material with good thermal conductivity such as a copper plate, and has resin introduction holes 21 at positions corresponding to the through holes 5 of the lead frame 1. In addition, in the example, the thickness of the heat sink 20 was 1 mm.
【0019】31はパッケージの形状に整合した例えば
台形状の凹部32が設けられた上型、33は空気抜き穴
である。35は放熱板20が嵌合する凹部36を有する
下型で、放熱板20の樹脂導入穴21に対応してそれぞ
れ樹脂注入口37が設けられている。Reference numeral 31 designates an upper mold provided with, for example, a trapezoidal recess 32 that matches the shape of the package, and 33 designates an air vent hole. A lower mold 35 has a recess 36 into which the heat sink 20 fits, and resin injection ports 37 are provided corresponding to the resin introduction holes 21 of the heat sink 20, respectively.
【0020】このようなパッケージング装置においては
、先ず、放熱板20を下型35の凹部36内に挿入し、
ついで放熱板20上に半導体素子10が搭載されたリー
ドフレーム1を載置する。このとき、リードフレーム1
の各貫通穴5、基板20の各樹脂導入穴21及び下型3
5の樹脂注入口37はそれぞれ整合しており、放熱板2
0と各インナリード3との間にはダムバー6がそれぞれ
介装され、絶縁されている。ついで上型31を下降させ
、リードフレーム1を挾持する。In such a packaging device, first, the heat sink 20 is inserted into the recess 36 of the lower mold 35, and then
Next, the lead frame 1 on which the semiconductor element 10 is mounted is placed on the heat sink 20. At this time, lead frame 1
each through hole 5 of , each resin introduction hole 21 of substrate 20 and lower mold 3
The resin injection ports 37 of 5 are aligned with each other, and the heat sink 2
A dam bar 6 is interposed between each inner lead 3 and each inner lead 3 to provide insulation. Then, the upper mold 31 is lowered to clamp the lead frame 1.
【0021】この状態で4か所に設けた樹脂注入口37
から例えばエポキシ樹脂の如きパッケージ用の樹脂を注
入すれば、樹脂40は樹脂導入穴21、貫通穴5を経て
上型31の凹部32内に隈なく充填され、半導体素子1
0、ワイヤ11、ダイパッド2及びインナリード3を完
全にパッケージする。樹脂40が乾燥固化したのち上型
31及び下型35を除去すれば、図2に示すような半導
体装置が得られる。In this state, the resin injection ports 37 provided at four locations
When a packaging resin such as epoxy resin is injected into the resin, the resin 40 passes through the resin introduction hole 21 and the through hole 5, and is completely filled into the recess 32 of the upper mold 31, thereby sealing the semiconductor element 1.
0, wires 11, die pads 2 and inner leads 3 are completely packaged. After the resin 40 is dried and solidified, the upper mold 31 and the lower mold 35 are removed, and a semiconductor device as shown in FIG. 2 is obtained.
【0022】パッケージングに際しては、インナリード
3の表面に設けたダムバー6は、樹脂がインナリード3
に沿って流出するのを防止する。また、放熱板20の樹
脂導入穴21内にも樹脂40が充填されるので、樹脂4
0と放熱板20との密着性を高め、両者の結合をさらに
強化することができる。なお、このようにして製造した
半導体装置は、通常放熱板20を上にして基板等に実装
される。When packaging, the dam bar 6 provided on the surface of the inner lead 3 is made of resin.
Prevent leakage along the Furthermore, since the resin introduction hole 21 of the heat sink 20 is also filled with the resin 40, the resin 40
It is possible to improve the adhesion between the heat dissipation plate 20 and the heat dissipation plate 20, and further strengthen the bond between the two. Note that the semiconductor device manufactured in this manner is usually mounted on a substrate or the like with the heat sink 20 facing upward.
【0023】上記の説明では、半導体素子10が搭載さ
れワイヤボンデイングされたリードフレーム1を、下型
35の凹部36に入れられた放熱板20上に載置する場
合について説明したが、放熱板20上にリードフレーム
1を載置してからダイパッド2上に半導体素子10を搭
載してワイヤボンデングし、あるいはダイパッド2に半
導体素子10を搭載して放熱板20上に載置し、しかる
のちワイヤボンデングしてもよく、また、放熱板20を
下型35の凹部36に入れる前にこれらの作業を行ない
、あるいは凹部36に入れてから行なうなど、適宜変更
することができる。さらに、放熱板20を下型35の凹
部36挿入する場合について述べたが、下型35の凹部
36を省略して平坦に形成し、その上に放熱板20を載
置するようにしてもよい。In the above description, the lead frame 1 on which the semiconductor element 10 is mounted and wire bonded is placed on the heat sink 20 placed in the recess 36 of the lower die 35. After placing the lead frame 1 thereon, the semiconductor element 10 is placed on the die pad 2 and wire bonding is performed, or the semiconductor element 10 is placed on the die pad 2 and placed on the heat sink 20, and then wire bonding is performed. Bonding may be carried out, or these operations may be performed before the heat sink 20 is placed in the recess 36 of the lower mold 35, or after the heat sink 20 is placed in the recess 36, or other changes may be made as appropriate. Furthermore, although the case has been described in which the heat dissipation plate 20 is inserted into the recess 36 of the lower mold 35, the recess 36 of the lower mold 35 may be omitted and formed flat, and the heat dissipation plate 20 may be placed on top of it. .
【0024】上記のような製造方法によれば、半導体素
子10はダイパッド2を介して放熱板20上に載置され
ており、樹脂40はダイパッド2の四方から注入される
ので、パッケージングに際してダイパッド2や半導体素
子10が移動するおそれがなく、気泡や樹脂の未充填を
生じることもない。また、放熱板20の一方の側だけに
パッケージを施してあるので、高さが低くなり、薄形化
することができる。さらに、半導体素子10の一方の面
はダイパッド2を介して放熱板20に接しており、使用
時には放熱板20は大気中に露出しているので、放熱効
果を大幅に高めることができる。According to the manufacturing method described above, the semiconductor element 10 is placed on the heat sink 20 via the die pad 2, and the resin 40 is injected from all sides of the die pad 2. There is no fear that the semiconductor element 2 or the semiconductor element 10 will move, and no air bubbles or unfilled resin will occur. Moreover, since the package is provided only on one side of the heat sink 20, the height can be reduced and the thickness can be reduced. Further, one surface of the semiconductor element 10 is in contact with the heat sink 20 via the die pad 2, and the heat sink 20 is exposed to the atmosphere during use, so that the heat radiation effect can be greatly enhanced.
【0025】図4は本発明の他の実施例の説明図である
。本実施例においては半導体素子10を直接放熱板20
上に搭載し、これにダイパッド2のないリードフレーム
1を載置してインナリード3とボンデングし、図1の実
施例の場合と同様に樹脂40でパッケージングしたもの
である。FIG. 4 is an explanatory diagram of another embodiment of the present invention. In this embodiment, the semiconductor element 10 is directly connected to the heat sink 20.
A lead frame 1 without a die pad 2 is placed thereon, bonded to the inner leads 3, and packaged with resin 40 in the same manner as in the embodiment shown in FIG.
【0026】本実施例によれば、半導体素子10を直接
放熱板20上に搭載したのでその高さをさらに低くする
ことができ、また放熱効果を一層高めることができる。According to this embodiment, since the semiconductor element 10 is directly mounted on the heat sink 20, its height can be further reduced, and the heat radiation effect can be further enhanced.
【0027】図5の実施例は放熱板20に凹部22を形
成し、この凹部22に半導体素子10の一部又は全部を
埋設したもので、高さをさらに低くできると共に、放熱
効果を高めることができる。In the embodiment shown in FIG. 5, a recess 22 is formed in the heat sink 20, and a part or all of the semiconductor element 10 is buried in the recess 22, so that the height can be further reduced and the heat radiation effect can be improved. Can be done.
【0028】上記の各実施例ではリードフレーム1に半
導体素子をボンディングしてパッケージする場合を示し
たが、図6に示すようにフレキシブルフィルムのフィン
ガー13に半導体素子10をボンディングしたTAB式
半導体装置にも本発明を実施することができる。即ち、
フィンガー13にボンディングされた半導体素子10を
、放熱板20に設けた凹部22内に収容し、図1の実施
例の要領でパッケージングする。この場合、放熱板20
と樹脂40との密着性をより高めるため、放熱板20の
下面の一部までパッケージングするようにしてもよい。In each of the above embodiments, the case where the semiconductor element is bonded to the lead frame 1 and packaged is shown, but as shown in FIG. The present invention can also be practiced. That is,
The semiconductor element 10 bonded to the finger 13 is accommodated in the recess 22 provided in the heat sink 20, and packaged in the same manner as in the embodiment shown in FIG. In this case, the heat sink 20
In order to further improve the adhesion between the heat dissipation plate 20 and the resin 40, a part of the lower surface of the heat dissipation plate 20 may be packaged.
【0029】以上のように本発明は、大気中に露出した
熱伝導の良好な材料からなる放熱板20に直接又はダイ
パッド2を介して半導体素子10を搭載するようにした
ので、放熱効果を著しく高めることができるが、半導体
素子10の種類や基板等への実装状態によってはさらに
放熱効果を高めたい場合がある。図7はこのような場合
の一例を示すもので、放熱板20にねじ穴23を設ける
と共に、一端に雄ねじ51を有し熱伝導率の高い材料か
らなる第2の放熱板50をねじ穴23に螺入したもので
ある。このように構成することにより放熱効果をより一
層向上させることができる。なお、放熱板20に第2の
放熱板50をねじ止めする代りに、接着剤を用いて接着
するなど、他の手段を用いてもよい。As described above, in the present invention, the semiconductor element 10 is mounted directly or via the die pad 2 on the heat dissipation plate 20 made of a material with good thermal conductivity and exposed to the atmosphere, so that the heat dissipation effect is significantly improved. However, depending on the type of the semiconductor element 10 and the mounting state on the substrate, there may be cases where it is desired to further increase the heat dissipation effect. FIG. 7 shows an example of such a case, in which a screw hole 23 is provided in the heat sink 20, and a second heat sink 50 having a male screw 51 at one end and made of a material with high thermal conductivity is inserted into the screw hole 23. It is screwed into. With this configuration, the heat dissipation effect can be further improved. Note that instead of screwing the second heat sink 50 to the heat sink 20, other means such as bonding with an adhesive may be used.
【0030】上記の説明では熱伝導の良好な材料からな
る放熱板20を用いて半導体装置を製造する例について
説明したが、半導体素子の種類や用途によっては、放熱
板に代えて熱硬化性樹脂等からなる合成樹脂板を用いて
もよい。In the above explanation, an example was explained in which a semiconductor device is manufactured using the heat sink 20 made of a material with good thermal conductivity. However, depending on the type and application of the semiconductor element, a thermosetting resin may be used instead of the heat sink. A synthetic resin plate made of, for example, may also be used.
【0031】[0031]
【発明の効果】以上の説明から明らかなように、本発明
は複数の樹脂導入口を有する放熱板又は合成樹脂板上に
直接若しくはダイパッドを介して半導体素子を搭載し、
又はTAB式半導体装置を載置して下型の樹脂注入口か
ら樹脂導入穴を介して上型内に樹脂を注入し、これらを
放熱板又は合成樹脂板と一体的にパッケージするように
したので、次のような効果を得ることができる。Effects of the Invention As is clear from the above description, the present invention provides a method for mounting a semiconductor element directly or via a die pad on a heat sink or synthetic resin plate having a plurality of resin inlet ports.
Alternatively, a TAB type semiconductor device is placed and resin is injected into the upper mold from the resin injection port of the lower mold through the resin introduction hole, and these are packaged integrally with the heat sink or synthetic resin plate. , the following effects can be obtained.
【0032】(1)複数の樹脂導入穴から樹脂を注入す
るようにしたので、半導体素子が移動したり、気泡を生
じたり、樹脂の未充填部分が発生したりするおそれがな
く、確実にパッケージを行なうことができる。(1) Since the resin is injected through multiple resin introduction holes, there is no risk of the semiconductor element moving, air bubbles, or unfilled areas of the resin, and the package is reliably packaged. can be done.
【0033】(2)放熱板を使用した場合は、放熱板は
大気中に露出しているので、使用時に半導体素子の放熱
効果を大幅に向上することができる。(2) When a heat sink is used, since the heat sink is exposed to the atmosphere, the heat dissipation effect of the semiconductor element can be greatly improved during use.
【0034】(3)放熱板又は合成樹脂板の一方の面だ
けにパッケージを施すようにしたので、全体を薄形化す
ることができ、特に放熱板又は合成樹脂板に凹部を設け
、この凹部に半導体素子を収容するようにした場合は、
厚さをさらに薄くすることができる。(3) Since the package is applied only to one side of the heat sink or synthetic resin plate, the overall thickness can be made thinner. In particular, by providing a recess in the heat sink or synthetic resin plate, If a semiconductor element is housed in the
The thickness can be further reduced.
【0035】(4)リードフレームのインナリードの両
面に絶縁膜を設けたので、下面の絶縁膜は放熱板とイン
ナリードとの間の絶縁を確保し、上面の絶縁膜はパッケ
ージに際して樹脂の流出を防止することができる。(4) Since insulating films are provided on both sides of the inner leads of the lead frame, the insulating film on the bottom side ensures insulation between the heat sink and the inner leads, and the insulating film on the top side prevents resin from flowing out during packaging. can be prevented.
【0036】(5)放熱板又は合成樹脂板に設けた樹脂
導入穴に、これらの上に形成したパッケージの樹脂が浸
入するので、放熱板又は合成樹脂板とパッケージとの結
合を強固にすることができる。(5) The resin of the package formed thereon infiltrates the resin introduction holes provided in the heat sink or synthetic resin plate, so that the bond between the heat sink or synthetic resin plate and the package is strengthened. Can be done.
【0037】(6)放熱板又は合成樹脂板にさらに別の
放熱板を取付ければ、放熱効果をさらに高めることがで
きる。(6) If another heat sink is attached to the heat sink or synthetic resin plate, the heat radiation effect can be further enhanced.
【図1】本発明に係る半導体装置の製造方法の実施例を
説明するための説明図である。FIG. 1 is an explanatory diagram for explaining an embodiment of a method for manufacturing a semiconductor device according to the present invention.
【図2】図1によって製造した半導体装置の一部を示す
断面図である。FIG. 2 is a cross-sectional view showing a part of the semiconductor device manufactured according to FIG. 1;
【図3】本発明に使用するリードフレームの一例の平面
図である。FIG. 3 is a plan view of an example of a lead frame used in the present invention.
【図4】本発明に係る半導体装置の他の実施例の断面図
である。FIG. 4 is a sectional view of another embodiment of the semiconductor device according to the present invention.
【図5】本発明に係る半導体装置の他の実施例の断面図
である。FIG. 5 is a sectional view of another embodiment of the semiconductor device according to the present invention.
【図6】本発明に係る半導体装置の他の実施例の断面図
である。FIG. 6 is a sectional view of another embodiment of the semiconductor device according to the present invention.
【図7】本発明に係る半導体装置の他の実施例の断面図
である。FIG. 7 is a sectional view of another embodiment of the semiconductor device according to the present invention.
【図8】従来の半導体装置の一例を示す断面図である。FIG. 8 is a cross-sectional view showing an example of a conventional semiconductor device.
【図9】図8の半導体装置の製造方法の一例を示す説明
図である。9 is an explanatory diagram showing an example of a method for manufacturing the semiconductor device of FIG. 8; FIG.
1 リードフレーム 2 ダイパッド 3 インナリード 5 貫通穴 6 ダムバー 10 半導体素子 11 ワイヤ 12 TAB式半導体装置 20 放熱板 21 樹脂導入穴 22 凹部 31 上型 32 凹部 35 下型 36 凹部 37 樹脂注入口 40 合成樹脂 50 放熱板 1 Lead frame 2 Die pad 3 Inner lead 5 Through hole 6 Dam bar 10 Semiconductor element 11 Wire 12 TAB type semiconductor device 20 Heat sink 21 Resin introduction hole 22 Recess 31 Upper mold 32 Recess 35 Lower mold 36 Recess 37 Resin injection port 40 Synthetic resin 50 Heat sink
Claims (13)
、ダイパッドに半導体素子が搭載されインナリードとそ
れぞれ接続されたリードフレームを載置し、前記半導体
素子を含むリードフレームを前記放熱板と一体的にパッ
ケージしたことを特徴とする半導体装置。1. A lead frame having a semiconductor element mounted on a die pad and each connected to an inner lead is placed on a heat sink having a plurality of resin introduction holes, and the lead frame containing the semiconductor element is connected to the heat sink. A semiconductor device characterized by being integrally packaged.
半導体素子を搭載して該半導体素子の電極を前記放熱板
上に載置されたリードフレームのインナリードとそれぞ
れ接続し、前記半導体素子を含むリードフレームを前記
放熱板と一体的にパッケージしたことを特徴とする半導
体装置。2. A semiconductor element is mounted on a heat sink having a plurality of resin introduction holes, electrodes of the semiconductor element are respectively connected to inner leads of a lead frame placed on the heat sink, and the semiconductor element is mounted on a heat sink having a plurality of resin introduction holes. What is claimed is: 1. A semiconductor device characterized in that a lead frame including a lead frame is integrally packaged with the heat sink.
TAB式半導体装置を載置し、該半導体装置を前記放熱
板と一体的にパッケージしたことを特徴とする半導体装
置。3. A semiconductor device characterized in that a TAB type semiconductor device is mounted on a heat sink having a plurality of resin introduction holes, and the semiconductor device is packaged integrally with the heat sink.
ことを特徴とする請求項1,2又は3記載の半導体装置
。4. The semiconductor device according to claim 1, wherein a synthetic resin plate is used in place of the heat sink.
少なくとも一部を収容する凹部を設けたことを特徴とす
る請求項1,2,3又は4記載の半導体装置。5. The semiconductor device according to claim 1, wherein the heat sink or the synthetic resin plate is provided with a recess for accommodating at least a portion of the semiconductor element.
取付けたことを特徴とする請求項1,2,3,4又は5
記載の半導体装置。[Claim 6] Claim 1, 2, 3, 4 or 5, characterized in that another heat sink is attached to the heat sink or the synthetic resin plate.
The semiconductor device described.
、ダイパッドに半導体素子が搭載されインナリードとそ
れぞれ接続されたリードフレームを載置し、前記放熱板
を、前記半導体素子等が収容される凹部を有する上型と
、前記放熱板の樹脂導入穴とそれぞれ整合する樹脂注入
口を有する下型との間に挾持し、前記樹脂注入口から樹
脂導入穴を介して前記上型の凹部に樹脂を注入すること
を特徴とする半導体装置の製造方法。7. A lead frame having a die pad on which a semiconductor element is mounted and each connected to an inner lead is placed on a heat sink having a plurality of resin introduction holes, and the heat sink is placed on a heat sink in which the semiconductor element and the like are housed. The resin is sandwiched between an upper mold having a concave portion and a lower mold having a resin injection port that is aligned with the resin introduction hole of the heat sink, and the resin is inserted into the recess of the upper mold from the resin injection port through the resin introduction hole. A method for manufacturing a semiconductor device, characterized by injecting resin.
ムに代えてTAB式半導体装置を用いたことを特徴とす
る請求項7記載の半導体装置の製造方法。8. The method of manufacturing a semiconductor device according to claim 7, wherein a TAB type semiconductor device is used in place of the lead frame on which the semiconductor element is mounted.
半導体素子を搭載すると共に前記放熱板上にインナリー
ドを有するリードフレームを載置してワイヤボンデイン
グし、前記放熱板を、前記半導体素子等が収容される凹
部を有する上型と、前記放熱板の樹脂導入穴とそれぞれ
整合する樹脂注入口を有する下型との間に挾持し、前記
樹脂注入口から樹脂導入穴を介して前記上型の凹部に樹
脂を注入することを特徴とする半導体装置の製造方法。9. A semiconductor element is mounted on a heat sink having a plurality of resin introduction holes, and a lead frame having an inner lead is placed on the heat sink and wire bonded, and the heat sink is attached to the semiconductor element. etc., and a lower mold having resin injection holes aligned with the resin introduction holes of the heat dissipation plate, and the upper A method for manufacturing a semiconductor device, comprising injecting a resin into a recessed part of a mold.
面に絶縁膜を設けたことを特徴とする請求項7又は9記
載の半導体装置の製造方法。10. The method of manufacturing a semiconductor device according to claim 7, wherein an insulating film is provided on both sides of the inner lead of the lead frame.
ことを特徴とする請求項7,8,9又は10記載の半導
体装置の製造方法。11. The method of manufacturing a semiconductor device according to claim 7, wherein a synthetic resin plate is used in place of the heat sink.
の少なくとも一部を収容する凹部を設けたことを特徴と
する請求項7,8,9,10又は11記載の半導体装置
の製造方法。12. The method of manufacturing a semiconductor device according to claim 7, wherein the heat sink or the synthetic resin plate is provided with a recess for accommodating at least a portion of the semiconductor element.
くとも一部が収容される凹部を設けたことを特徴とする
請求項7,8,9,10,11又は12記載の半導体装
置の製造方法。13. Manufacture of a semiconductor device according to claim 7, 8, 9, 10, 11 or 12, characterized in that the lower mold is provided with a recess in which at least a part of the heat sink or the synthetic resin plate is accommodated. Method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7120091A JPH04306865A (en) | 1991-04-03 | 1991-04-03 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7120091A JPH04306865A (en) | 1991-04-03 | 1991-04-03 | Semiconductor device and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04306865A true JPH04306865A (en) | 1992-10-29 |
Family
ID=13453797
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7120091A Pending JPH04306865A (en) | 1991-04-03 | 1991-04-03 | Semiconductor device and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04306865A (en) |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0794654A (en) * | 1993-09-20 | 1995-04-07 | Nec Corp | Lead frame for semiconductor device |
EP0657921A1 (en) * | 1993-12-06 | 1995-06-14 | Fujitsu Limited | Semiconductor device and method of producing the same |
WO1996001495A1 (en) * | 1994-07-01 | 1996-01-18 | Fico B.V. | Method, carrier and mould parts for encapsulating a chip |
JPH0831985A (en) * | 1994-07-05 | 1996-02-02 | Internatl Business Mach Corp <Ibm> | Semiconductor device and manufacture of semiconductor device |
JPH08148517A (en) * | 1994-11-21 | 1996-06-07 | Rohm Co Ltd | Semiconductor device |
US6111306A (en) * | 1993-12-06 | 2000-08-29 | Fujitsu Limited | Semiconductor device and method of producing the same and semiconductor device unit and method of producing the same |
KR20030001039A (en) * | 2001-06-28 | 2003-01-06 | 동부전자 주식회사 | Semiconductor encapsulation structure |
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JP2009152280A (en) * | 2007-12-19 | 2009-07-09 | Denso Corp | Mold package and manufacturing method thereof |
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-
1991
- 1991-04-03 JP JP7120091A patent/JPH04306865A/en active Pending
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Publication number | Priority date | Publication date | Assignee | Title |
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JPH0794654A (en) * | 1993-09-20 | 1995-04-07 | Nec Corp | Lead frame for semiconductor device |
US6111306A (en) * | 1993-12-06 | 2000-08-29 | Fujitsu Limited | Semiconductor device and method of producing the same and semiconductor device unit and method of producing the same |
EP0657921A1 (en) * | 1993-12-06 | 1995-06-14 | Fujitsu Limited | Semiconductor device and method of producing the same |
US5679978A (en) * | 1993-12-06 | 1997-10-21 | Fujitsu Limited | Semiconductor device having resin gate hole through substrate for resin encapsulation |
US6379997B1 (en) | 1993-12-06 | 2002-04-30 | Fujitsu Limited | Semiconductor device and method of producing the same and semiconductor device unit and method of producing the same |
US5804467A (en) * | 1993-12-06 | 1998-09-08 | Fujistsu Limited | Semiconductor device and method of producing the same |
WO1996001495A1 (en) * | 1994-07-01 | 1996-01-18 | Fico B.V. | Method, carrier and mould parts for encapsulating a chip |
NL9401104A (en) * | 1994-07-01 | 1996-02-01 | Fico Bv | Method, carrier and mold parts for encapsulating a chip. |
JPH0831985A (en) * | 1994-07-05 | 1996-02-02 | Internatl Business Mach Corp <Ibm> | Semiconductor device and manufacture of semiconductor device |
JPH08148517A (en) * | 1994-11-21 | 1996-06-07 | Rohm Co Ltd | Semiconductor device |
JP2726011B2 (en) * | 1994-11-21 | 1998-03-11 | ローム株式会社 | Semiconductor device |
KR20030001039A (en) * | 2001-06-28 | 2003-01-06 | 동부전자 주식회사 | Semiconductor encapsulation structure |
JP4896010B2 (en) * | 2005-03-31 | 2012-03-14 | スパンション エルエルシー | Multilayer semiconductor device and manufacturing method thereof |
EP2043166A1 (en) * | 2007-09-27 | 2009-04-01 | Samsung Electro-Mechanics Co., Ltd. | Method of manufacturing light emitting diode package |
JP2009088520A (en) * | 2007-09-27 | 2009-04-23 | Samsung Electro Mech Co Ltd | Method of manufacturing light-emitting diode package |
US8202746B2 (en) | 2007-09-27 | 2012-06-19 | Samsung Led Co., Ltd. | Method of manufacturing LED package for formation of molding member |
KR101349605B1 (en) * | 2007-09-27 | 2014-01-09 | 삼성전자주식회사 | Method for forming the light emitting device package |
JP2009152280A (en) * | 2007-12-19 | 2009-07-09 | Denso Corp | Mold package and manufacturing method thereof |
WO2010057041A2 (en) * | 2008-11-14 | 2010-05-20 | Triquint Semiconductor, Inc. | Package including proximately-positioned lead frame |
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US8288845B2 (en) | 2008-11-14 | 2012-10-16 | Triquint Semiconductor, Inc. | Package including proximately-positioned lead frame |
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